mediatek-jpeg-decoder.yaml 1.9 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: MediaTek JPEG Decoder
  7. maintainers:
  8. - Xia Jiang <xia.jiang@mediatek.com>
  9. description: |-
  10. Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
  11. properties:
  12. compatible:
  13. oneOf:
  14. - items:
  15. - enum:
  16. - mediatek,mt8173-jpgdec
  17. - mediatek,mt2701-jpgdec
  18. - items:
  19. - enum:
  20. - mediatek,mt7623-jpgdec
  21. - mediatek,mt8188-jpgdec
  22. - const: mediatek,mt2701-jpgdec
  23. reg:
  24. maxItems: 1
  25. interrupts:
  26. maxItems: 1
  27. clocks:
  28. maxItems: 2
  29. minItems: 2
  30. clock-names:
  31. items:
  32. - const: jpgdec-smi
  33. - const: jpgdec
  34. power-domains:
  35. maxItems: 1
  36. iommus:
  37. maxItems: 2
  38. description: |
  39. Points to the respective IOMMU block with master port as argument, see
  40. Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
  41. Ports are according to the HW.
  42. required:
  43. - compatible
  44. - reg
  45. - interrupts
  46. - clocks
  47. - clock-names
  48. - power-domains
  49. - iommus
  50. additionalProperties: false
  51. examples:
  52. - |
  53. #include <dt-bindings/clock/mt2701-clk.h>
  54. #include <dt-bindings/interrupt-controller/arm-gic.h>
  55. #include <dt-bindings/memory/mt2701-larb-port.h>
  56. #include <dt-bindings/power/mt2701-power.h>
  57. jpegdec: jpegdec@15004000 {
  58. compatible = "mediatek,mt2701-jpgdec";
  59. reg = <0x15004000 0x1000>;
  60. interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
  61. clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
  62. <&imgsys CLK_IMG_JPGDEC>;
  63. clock-names = "jpgdec-smi",
  64. "jpgdec";
  65. power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
  66. iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
  67. <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
  68. };