mediatek-jpeg-encoder.yaml 1.8 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: MediaTek JPEG Encoder
  7. maintainers:
  8. - Xia Jiang <xia.jiang@mediatek.com>
  9. description: |-
  10. MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
  11. properties:
  12. compatible:
  13. items:
  14. - enum:
  15. - mediatek,mt2701-jpgenc
  16. - mediatek,mt8183-jpgenc
  17. - mediatek,mt8186-jpgenc
  18. - mediatek,mt8188-jpgenc
  19. - const: mediatek,mtk-jpgenc
  20. reg:
  21. maxItems: 1
  22. interrupts:
  23. maxItems: 1
  24. clocks:
  25. maxItems: 1
  26. clock-names:
  27. items:
  28. - const: jpgenc
  29. power-domains:
  30. maxItems: 1
  31. iommus:
  32. minItems: 2
  33. maxItems: 4
  34. description: |
  35. Points to the respective IOMMU block with master port as argument, see
  36. Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
  37. Ports are according to the HW.
  38. required:
  39. - compatible
  40. - reg
  41. - interrupts
  42. - clocks
  43. - clock-names
  44. - power-domains
  45. - iommus
  46. additionalProperties: false
  47. examples:
  48. - |
  49. #include <dt-bindings/clock/mt2701-clk.h>
  50. #include <dt-bindings/interrupt-controller/arm-gic.h>
  51. #include <dt-bindings/memory/mt2701-larb-port.h>
  52. #include <dt-bindings/power/mt2701-power.h>
  53. jpegenc: jpegenc@1500a000 {
  54. compatible = "mediatek,mt2701-jpgenc",
  55. "mediatek,mtk-jpgenc";
  56. reg = <0x1500a000 0x1000>;
  57. interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
  58. clocks = <&imgsys CLK_IMG_VENC>;
  59. clock-names = "jpgenc";
  60. power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
  61. iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
  62. <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
  63. };