mmdc.yaml 1.1 KB

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  1. # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/memory-controllers/fsl/mmdc.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: Freescale Multi Mode DDR controller (MMDC)
  7. maintainers:
  8. - Shawn Guo <shawnguo@kernel.org>
  9. - Sascha Hauer <s.hauer@pengutronix.de>
  10. - Fabio Estevam <festevam@gmail.com>
  11. properties:
  12. compatible:
  13. oneOf:
  14. - const: fsl,imx6q-mmdc
  15. - items:
  16. - enum:
  17. - fsl,imx6qp-mmdc
  18. - fsl,imx6sl-mmdc
  19. - fsl,imx6sll-mmdc
  20. - fsl,imx6sx-mmdc
  21. - fsl,imx6ul-mmdc
  22. - fsl,imx7ulp-mmdc
  23. - const: fsl,imx6q-mmdc
  24. reg:
  25. maxItems: 1
  26. clocks:
  27. maxItems: 1
  28. required:
  29. - compatible
  30. - reg
  31. additionalProperties: false
  32. examples:
  33. - |
  34. #include <dt-bindings/clock/imx6qdl-clock.h>
  35. memory-controller@21b0000 {
  36. compatible = "fsl,imx6q-mmdc";
  37. reg = <0x021b0000 0x4000>;
  38. clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
  39. };
  40. memory-controller@21b4000 {
  41. compatible = "fsl,imx6q-mmdc";
  42. reg = <0x021b4000 0x4000>;
  43. };