mtd-physmap.yaml 5.6 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. %YAML 1.2
  3. ---
  4. $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
  5. $schema: http://devicetree.org/meta-schemas/core.yaml#
  6. title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
  7. maintainers:
  8. - Rob Herring <robh@kernel.org>
  9. description: |
  10. Flash chips (Memory Technology Devices) are often used for solid state
  11. file systems on embedded devices.
  12. allOf:
  13. - $ref: mtd.yaml#
  14. - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
  15. properties:
  16. compatible:
  17. oneOf:
  18. - items:
  19. - enum:
  20. - amd,s29gl01gp
  21. - amd,s29gl032a
  22. - amd,s29gl256n
  23. - amd,s29gl512n
  24. - arm,versatile-flash
  25. - arm,vexpress-flash
  26. - cortina,gemini-flash
  27. - cypress,hyperflash
  28. - ge,imp3a-firmware-mirror
  29. - ge,imp3a-paged-flash
  30. - gef,ppc9a-firmware-mirror
  31. - gef,ppc9a-paged-flash
  32. - gef,sbc310-firmware-mirror
  33. - gef,sbc310-paged-flash
  34. - gef,sbc610-firmware-mirror
  35. - gef,sbc610-paged-flash
  36. - intel,28f128j3
  37. - intel,dt28f160
  38. - intel,ixp4xx-flash
  39. - intel,JS28F128
  40. - intel,JS28F640
  41. - intel,PC28F640P30T85
  42. - numonyx,js28f00a
  43. - numonyx,js28f128
  44. - sst,sst39vf320
  45. - xlnx,xps-mch-emc-2.00.a
  46. - enum:
  47. - cfi-flash
  48. - jedec-flash
  49. - items:
  50. - enum:
  51. - cypress,cy7c1019dv33-10zsxi
  52. - arm,vexpress-psram
  53. - const: mtd-ram
  54. - enum:
  55. - cfi-flash
  56. - jedec-flash
  57. - mtd-ram
  58. - mtd-rom
  59. reg:
  60. description: |
  61. It's possible to (optionally) define multiple "reg" tuples so that
  62. non-identical chips can be described in one node.
  63. minItems: 1
  64. maxItems: 8
  65. bank-width:
  66. description: Width (in bytes) of the bank. Equal to the device width times
  67. the number of interleaved chips.
  68. $ref: /schemas/types.yaml#/definitions/uint32
  69. enum: [ 1, 2, 4 ]
  70. device-width:
  71. description:
  72. Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
  73. $ref: /schemas/types.yaml#/definitions/uint32
  74. enum: [ 1, 2 ]
  75. no-unaligned-direct-access:
  76. type: boolean
  77. description: |
  78. Disables the default direct mapping of the flash.
  79. On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems
  80. with JFFS2 usage, as the local bus (LPB) doesn't support unaligned
  81. accesses as implemented in the JFFS2 code via memcpy(). By defining
  82. "no-unaligned-direct-access", the flash will not be exposed directly to
  83. the MTD users (e.g. JFFS2) any more.
  84. linux,mtd-name:
  85. description:
  86. Allows specifying the mtd name for retro capability with physmap-flash
  87. drivers as boot loader pass the mtd partition via the old device name
  88. physmap-flash.
  89. $ref: /schemas/types.yaml#/definitions/string
  90. use-advanced-sector-protection:
  91. type: boolean
  92. description: |
  93. Enables support for the advanced sector protection (Spansion: PPB -
  94. Persistent Protection Bits) locking.
  95. erase-size:
  96. description: The chip's physical erase block size in bytes.
  97. $ref: /schemas/types.yaml#/definitions/uint32
  98. addr-gpios:
  99. description:
  100. List of GPIO descriptors that will be used to address the MSBs address
  101. lines. The order goes from LSB to MSB.
  102. minItems: 1
  103. maxItems: 8
  104. '#address-cells':
  105. const: 1
  106. '#size-cells':
  107. const: 1
  108. big-endian: true
  109. little-endian: true
  110. required:
  111. - compatible
  112. - reg
  113. if:
  114. properties:
  115. compatible:
  116. contains:
  117. const: cortina,gemini-flash
  118. then:
  119. properties:
  120. syscon:
  121. $ref: /schemas/types.yaml#/definitions/phandle
  122. description:
  123. Phandle to the syscon controller
  124. required:
  125. - syscon
  126. # FIXME: A parent bus may define timing properties
  127. additionalProperties: true
  128. examples:
  129. - |
  130. flash@ff000000 {
  131. compatible = "cfi-flash";
  132. reg = <0xff000000 0x01000000>;
  133. bank-width = <4>;
  134. device-width = <1>;
  135. #address-cells = <1>;
  136. #size-cells = <1>;
  137. ranges = <0 0xff000000 0x01000000>;
  138. fs@0 {
  139. label = "fs";
  140. reg = <0 0xf80000>;
  141. };
  142. firmware@f80000 {
  143. label = "firmware";
  144. reg = <0xf80000 0x80000>;
  145. read-only;
  146. };
  147. };
  148. - |
  149. /* An example with multiple "reg" tuples */
  150. flash@0 {
  151. compatible = "intel,PC28F640P30T85", "cfi-flash";
  152. reg = <0x00000000 0x02000000>,
  153. <0x02000000 0x02000000>;
  154. bank-width = <2>;
  155. #address-cells = <1>;
  156. #size-cells = <1>;
  157. ranges = <0 0 0x04000000>;
  158. partition@0 {
  159. label = "test-part1";
  160. reg = <0 0x04000000>;
  161. };
  162. };
  163. - |
  164. /* An example using SRAM */
  165. bus {
  166. #address-cells = <2>;
  167. #size-cells = <1>;
  168. sram@2,0 {
  169. compatible = "mtd-ram";
  170. reg = <2 0 0x00200000>;
  171. bank-width = <2>;
  172. };
  173. };
  174. - |
  175. /* An example using addr-gpios */
  176. #include <dt-bindings/gpio/gpio.h>
  177. flash@20000000 {
  178. compatible = "cfi-flash";
  179. reg = <0x20000000 0x02000000>;
  180. bank-width = <2>;
  181. addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  182. #address-cells = <1>;
  183. #size-cells = <1>;
  184. ranges = <0 0x00000000 0x02000000>,
  185. <1 0x02000000 0x02000000>;
  186. partition@0 {
  187. label = "test-part1";
  188. reg = <0 0x04000000>;
  189. };
  190. };
  191. ...