altr,msi-controller.yaml 1.4 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  2. # Copyright (C) 2015, 2024, Intel Corporation
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/altr,msi-controller.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: Altera PCIe MSI controller
  8. maintainers:
  9. - Matthew Gerlach <matthew.gerlach@linux.intel.com>
  10. properties:
  11. compatible:
  12. enum:
  13. - altr,msi-1.0
  14. reg:
  15. items:
  16. - description: CSR registers
  17. - description: Vectors slave port region
  18. reg-names:
  19. items:
  20. - const: csr
  21. - const: vector_slave
  22. interrupts:
  23. maxItems: 1
  24. msi-controller: true
  25. num-vectors:
  26. description: number of vectors
  27. $ref: /schemas/types.yaml#/definitions/uint32
  28. minimum: 1
  29. maximum: 32
  30. required:
  31. - compatible
  32. - reg
  33. - reg-names
  34. - interrupts
  35. - msi-controller
  36. - num-vectors
  37. allOf:
  38. - $ref: /schemas/interrupt-controller/msi-controller.yaml#
  39. unevaluatedProperties: false
  40. examples:
  41. - |
  42. #include <dt-bindings/interrupt-controller/arm-gic.h>
  43. #include <dt-bindings/interrupt-controller/irq.h>
  44. msi@ff200000 {
  45. compatible = "altr,msi-1.0";
  46. reg = <0xff200000 0x00000010>,
  47. <0xff200010 0x00000080>;
  48. reg-names = "csr", "vector_slave";
  49. interrupt-parent = <&hps_0_arm_gic_0>;
  50. interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
  51. msi-controller;
  52. num-vectors = <32>;
  53. };