qcom-tsens.yaml 11 KB

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  1. # SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. # Copyright 2019 Linaro Ltd.
  3. %YAML 1.2
  4. ---
  5. $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
  6. $schema: http://devicetree.org/meta-schemas/core.yaml#
  7. title: QCOM SoC Temperature Sensor (TSENS)
  8. maintainers:
  9. - Amit Kucheria <amitk@kernel.org>
  10. description: |
  11. QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
  12. three distinct major versions of the IP that is supported by a single driver.
  13. The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
  14. everything before v1 when there was no versioning information.
  15. properties:
  16. compatible:
  17. oneOf:
  18. - description: msm8960 TSENS based
  19. items:
  20. - enum:
  21. - qcom,ipq8064-tsens
  22. - qcom,msm8960-tsens
  23. - description: v0.1 of TSENS
  24. items:
  25. - enum:
  26. - qcom,mdm9607-tsens
  27. - qcom,msm8226-tsens
  28. - qcom,msm8909-tsens
  29. - qcom,msm8916-tsens
  30. - qcom,msm8939-tsens
  31. - qcom,msm8974-tsens
  32. - const: qcom,tsens-v0_1
  33. - description: v1 of TSENS
  34. items:
  35. - enum:
  36. - qcom,msm8956-tsens
  37. - qcom,msm8976-tsens
  38. - qcom,qcs404-tsens
  39. - const: qcom,tsens-v1
  40. - description: v2 of TSENS
  41. items:
  42. - enum:
  43. - qcom,msm8953-tsens
  44. - qcom,msm8996-tsens
  45. - qcom,msm8998-tsens
  46. - qcom,qcm2290-tsens
  47. - qcom,sa8255p-tsens
  48. - qcom,sa8775p-tsens
  49. - qcom,sc7180-tsens
  50. - qcom,sc7280-tsens
  51. - qcom,sc8180x-tsens
  52. - qcom,sc8280xp-tsens
  53. - qcom,sdm630-tsens
  54. - qcom,sdm845-tsens
  55. - qcom,sm6115-tsens
  56. - qcom,sm6350-tsens
  57. - qcom,sm6375-tsens
  58. - qcom,sm8150-tsens
  59. - qcom,sm8250-tsens
  60. - qcom,sm8350-tsens
  61. - qcom,sm8450-tsens
  62. - qcom,sm8550-tsens
  63. - qcom,sm8650-tsens
  64. - qcom,x1e80100-tsens
  65. - const: qcom,tsens-v2
  66. - description: v2 of TSENS with combined interrupt
  67. enum:
  68. - qcom,ipq8074-tsens
  69. - description: v2 of TSENS with combined interrupt
  70. items:
  71. - enum:
  72. - qcom,ipq9574-tsens
  73. - const: qcom,ipq8074-tsens
  74. reg:
  75. items:
  76. - description: TM registers
  77. - description: SROT registers
  78. interrupts:
  79. minItems: 1
  80. maxItems: 2
  81. interrupt-names:
  82. minItems: 1
  83. maxItems: 2
  84. nvmem-cells:
  85. oneOf:
  86. - minItems: 1
  87. maxItems: 2
  88. description:
  89. Reference to an nvmem node for the calibration data
  90. - minItems: 5
  91. maxItems: 35
  92. description: |
  93. Reference to nvmem cells for the calibration mode, two calibration
  94. bases and two cells per each sensor
  95. # special case for msm8974 / apq8084
  96. - maxItems: 51
  97. description: |
  98. Reference to nvmem cells for the calibration mode, two calibration
  99. bases and two cells per each sensor, main and backup copies, plus use_backup cell
  100. nvmem-cell-names:
  101. oneOf:
  102. - minItems: 1
  103. items:
  104. - const: calib
  105. - enum:
  106. - calib_backup
  107. - calib_sel
  108. - minItems: 5
  109. items:
  110. - const: mode
  111. - const: base1
  112. - const: base2
  113. - pattern: '^s[0-9]+_p1$'
  114. - pattern: '^s[0-9]+_p2$'
  115. - pattern: '^s[0-9]+_p1$'
  116. - pattern: '^s[0-9]+_p2$'
  117. - pattern: '^s[0-9]+_p1$'
  118. - pattern: '^s[0-9]+_p2$'
  119. - pattern: '^s[0-9]+_p1$'
  120. - pattern: '^s[0-9]+_p2$'
  121. - pattern: '^s[0-9]+_p1$'
  122. - pattern: '^s[0-9]+_p2$'
  123. - pattern: '^s[0-9]+_p1$'
  124. - pattern: '^s[0-9]+_p2$'
  125. - pattern: '^s[0-9]+_p1$'
  126. - pattern: '^s[0-9]+_p2$'
  127. - pattern: '^s[0-9]+_p1$'
  128. - pattern: '^s[0-9]+_p2$'
  129. - pattern: '^s[0-9]+_p1$'
  130. - pattern: '^s[0-9]+_p2$'
  131. - pattern: '^s[0-9]+_p1$'
  132. - pattern: '^s[0-9]+_p2$'
  133. - pattern: '^s[0-9]+_p1$'
  134. - pattern: '^s[0-9]+_p2$'
  135. - pattern: '^s[0-9]+_p1$'
  136. - pattern: '^s[0-9]+_p2$'
  137. - pattern: '^s[0-9]+_p1$'
  138. - pattern: '^s[0-9]+_p2$'
  139. - pattern: '^s[0-9]+_p1$'
  140. - pattern: '^s[0-9]+_p2$'
  141. - pattern: '^s[0-9]+_p1$'
  142. - pattern: '^s[0-9]+_p2$'
  143. - pattern: '^s[0-9]+_p1$'
  144. - pattern: '^s[0-9]+_p2$'
  145. # special case for msm8974 / apq8084
  146. - items:
  147. - const: mode
  148. - const: base1
  149. - const: base2
  150. - const: use_backup
  151. - const: mode_backup
  152. - const: base1_backup
  153. - const: base2_backup
  154. - const: s0_p1
  155. - const: s0_p2
  156. - const: s1_p1
  157. - const: s1_p2
  158. - const: s2_p1
  159. - const: s2_p2
  160. - const: s3_p1
  161. - const: s3_p2
  162. - const: s4_p1
  163. - const: s4_p2
  164. - const: s5_p1
  165. - const: s5_p2
  166. - const: s6_p1
  167. - const: s6_p2
  168. - const: s7_p1
  169. - const: s7_p2
  170. - const: s8_p1
  171. - const: s8_p2
  172. - const: s9_p1
  173. - const: s9_p2
  174. - const: s10_p1
  175. - const: s10_p2
  176. - const: s0_p1_backup
  177. - const: s0_p2_backup
  178. - const: s1_p1_backup
  179. - const: s1_p2_backup
  180. - const: s2_p1_backup
  181. - const: s2_p2_backup
  182. - const: s3_p1_backup
  183. - const: s3_p2_backup
  184. - const: s4_p1_backup
  185. - const: s4_p2_backup
  186. - const: s5_p1_backup
  187. - const: s5_p2_backup
  188. - const: s6_p1_backup
  189. - const: s6_p2_backup
  190. - const: s7_p1_backup
  191. - const: s7_p2_backup
  192. - const: s8_p1_backup
  193. - const: s8_p2_backup
  194. - const: s9_p1_backup
  195. - const: s9_p2_backup
  196. - const: s10_p1_backup
  197. - const: s10_p2_backup
  198. "#qcom,sensors":
  199. description:
  200. Number of sensors enabled on this platform
  201. $ref: /schemas/types.yaml#/definitions/uint32
  202. minimum: 1
  203. maximum: 16
  204. "#thermal-sensor-cells":
  205. const: 1
  206. required:
  207. - compatible
  208. - interrupts
  209. - interrupt-names
  210. - "#qcom,sensors"
  211. allOf:
  212. - $ref: thermal-sensor.yaml#
  213. - if:
  214. properties:
  215. compatible:
  216. contains:
  217. enum:
  218. - qcom,ipq8064-tsens
  219. - qcom,msm8960-tsens
  220. - qcom,tsens-v0_1
  221. - qcom,tsens-v1
  222. then:
  223. properties:
  224. interrupts:
  225. items:
  226. - description: Combined interrupt if upper or lower threshold crossed
  227. interrupt-names:
  228. items:
  229. - const: uplow
  230. - if:
  231. properties:
  232. compatible:
  233. contains:
  234. const: qcom,tsens-v2
  235. then:
  236. properties:
  237. interrupts:
  238. items:
  239. - description: Combined interrupt if upper or lower threshold crossed
  240. - description: Interrupt if critical threshold crossed
  241. interrupt-names:
  242. items:
  243. - const: uplow
  244. - const: critical
  245. - if:
  246. properties:
  247. compatible:
  248. contains:
  249. enum:
  250. - qcom,ipq8074-tsens
  251. then:
  252. properties:
  253. interrupts:
  254. items:
  255. - description: Combined interrupt if upper, lower or critical thresholds crossed
  256. interrupt-names:
  257. items:
  258. - const: combined
  259. - if:
  260. properties:
  261. compatible:
  262. contains:
  263. enum:
  264. - qcom,ipq8074-tsens
  265. - qcom,tsens-v0_1
  266. - qcom,tsens-v1
  267. - qcom,tsens-v2
  268. then:
  269. required:
  270. - reg
  271. unevaluatedProperties: false
  272. examples:
  273. - |
  274. #include <dt-bindings/interrupt-controller/arm-gic.h>
  275. thermal-sensor {
  276. compatible = "qcom,ipq8064-tsens";
  277. nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
  278. nvmem-cell-names = "calib", "calib_backup";
  279. interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
  280. interrupt-names = "uplow";
  281. #qcom,sensors = <11>;
  282. #thermal-sensor-cells = <1>;
  283. };
  284. - |
  285. #include <dt-bindings/interrupt-controller/arm-gic.h>
  286. // Example 1 (new calibration data: for pre v1 IP):
  287. thermal-sensor@4a9000 {
  288. compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
  289. reg = <0x4a9000 0x1000>, /* TM */
  290. <0x4a8000 0x1000>; /* SROT */
  291. nvmem-cells = <&tsens_mode>,
  292. <&tsens_base1>, <&tsens_base2>,
  293. <&tsens_s0_p1>, <&tsens_s0_p2>,
  294. <&tsens_s1_p1>, <&tsens_s1_p2>,
  295. <&tsens_s2_p1>, <&tsens_s2_p2>,
  296. <&tsens_s4_p1>, <&tsens_s4_p2>,
  297. <&tsens_s5_p1>, <&tsens_s5_p2>;
  298. nvmem-cell-names = "mode",
  299. "base1", "base2",
  300. "s0_p1", "s0_p2",
  301. "s1_p1", "s1_p2",
  302. "s2_p1", "s2_p2",
  303. "s4_p1", "s4_p2",
  304. "s5_p1", "s5_p2";
  305. interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
  306. interrupt-names = "uplow";
  307. #qcom,sensors = <5>;
  308. #thermal-sensor-cells = <1>;
  309. };
  310. - |
  311. #include <dt-bindings/interrupt-controller/arm-gic.h>
  312. // Example 1 (legacy: for pre v1 IP):
  313. tsens1: thermal-sensor@4a9000 {
  314. compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
  315. reg = <0x4a9000 0x1000>, /* TM */
  316. <0x4a8000 0x1000>; /* SROT */
  317. nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
  318. nvmem-cell-names = "calib", "calib_sel";
  319. interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
  320. interrupt-names = "uplow";
  321. #qcom,sensors = <5>;
  322. #thermal-sensor-cells = <1>;
  323. };
  324. - |
  325. #include <dt-bindings/interrupt-controller/arm-gic.h>
  326. // Example 2 (for any platform containing v1 of the TSENS IP):
  327. tsens2: thermal-sensor@4a9000 {
  328. compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
  329. reg = <0x004a9000 0x1000>, /* TM */
  330. <0x004a8000 0x1000>; /* SROT */
  331. nvmem-cells = <&tsens_caldata>;
  332. nvmem-cell-names = "calib";
  333. interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
  334. interrupt-names = "uplow";
  335. #qcom,sensors = <10>;
  336. #thermal-sensor-cells = <1>;
  337. };
  338. - |
  339. #include <dt-bindings/interrupt-controller/arm-gic.h>
  340. // Example 3 (for any platform containing v2 of the TSENS IP):
  341. tsens3: thermal-sensor@c263000 {
  342. compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
  343. reg = <0xc263000 0x1ff>,
  344. <0xc222000 0x1ff>;
  345. interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
  346. <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
  347. interrupt-names = "uplow", "critical";
  348. #qcom,sensors = <13>;
  349. #thermal-sensor-cells = <1>;
  350. };
  351. - |
  352. #include <dt-bindings/interrupt-controller/arm-gic.h>
  353. // Example 4 (for any IPQ8074 based SoC-s):
  354. tsens4: thermal-sensor@4a9000 {
  355. compatible = "qcom,ipq8074-tsens";
  356. reg = <0x4a9000 0x1000>,
  357. <0x4a8000 0x1000>;
  358. interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
  359. interrupt-names = "combined";
  360. #qcom,sensors = <16>;
  361. #thermal-sensor-cells = <1>;
  362. };
  363. ...