max31827.rst 5.6 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. Kernel driver max31827
  3. ======================
  4. Supported chips:
  5. * Maxim MAX31827
  6. Prefix: 'max31827'
  7. Addresses scanned: I2C 0x40 - 0x5f
  8. Datasheet: Publicly available at the Analog Devices website
  9. * Maxim MAX31828
  10. Prefix: 'max31828'
  11. Addresses scanned: I2C 0x40 - 0x5f
  12. Datasheet: Publicly available at the Analog Devices website
  13. * Maxim MAX31829
  14. Prefix: 'max31829'
  15. Addresses scanned: I2C 0x40 - 0x5f
  16. Datasheet: Publicly available at the Analog Devices website
  17. Authors:
  18. - Daniel Matyas <daniel.matyas@analog.com>
  19. Description
  20. -----------
  21. The chips supported by this driver are quite similar. The only difference
  22. between them is found in the default power-on behaviour of the chips. While the
  23. MAX31827's fault queue is set to 1, the other two chip's fault queue is set to
  24. 4. Besides this, the MAX31829's alarm active state is high, while the other two
  25. chip's alarms are active on low. It is important to note that the chips can be
  26. configured to operate in the same manner with 1 write operation to the
  27. configuration register. From here on, we will refer to all these chips as
  28. MAX31827.
  29. MAX31827 implements a temperature sensor with a 6 WLP packaging scheme. This
  30. sensor measures the temperature of the chip itself.
  31. MAX31827 has low and over temperature alarms with an effective value and a
  32. hysteresis value: -40 and -30 degrees for under temperature alarm and +100 and
  33. +90 degrees for over temperature alarm.
  34. The alarm can be configured in comparator and interrupt mode from the
  35. devicetree. In Comparator mode, the OT/UT status bits have a value of 1 when the
  36. temperature rises above the TH value or falls below TL, which is also subject to
  37. the Fault Queue selection. OT status returns to 0 when the temperature drops
  38. below the TH_HYST value or when shutdown mode is entered. Similarly, UT status
  39. returns to 0 when the temperature rises above TL_HYST value or when shutdown
  40. mode is entered.
  41. In interrupt mode exceeding TH also sets OT status to 1, which remains set until
  42. a read operation is performed on the configuration/status register (max or min
  43. attribute); at this point, it returns to 0. Once OT status is set to 1 from
  44. exceeding TH and reset, it is set to 1 again only when the temperature drops
  45. below TH_HYST. The output remains asserted until it is reset by a read. It is
  46. set again if the temperature rises above TH, and so on. The same logic applies
  47. to the operation of the UT status bit.
  48. Putting the MAX31827 into shutdown mode also resets the OT/UT status bits. Note
  49. that if the mode is changed while OT/UT status bits are set, an OT/UT status
  50. reset may be required before it begins to behave normally. To prevent this,
  51. it is recommended to perform a read of the configuration/status register to
  52. clear the status bits before changing the operating mode.
  53. The conversions can be manual with the one-shot functionality and automatic with
  54. a set frequency. When powered on, the chip measures temperatures with 1 conv/s.
  55. The conversion rate can be modified with update_interval attribute of the chip.
  56. Conversion/second = 1/update_interval. Thus, the available options according to
  57. the data sheet are:
  58. - 64000 (ms) = 1 conv/64 sec
  59. - 32000 (ms) = 1 conv/32 sec
  60. - 16000 (ms) = 1 conv/16 sec
  61. - 4000 (ms) = 1 conv/4 sec
  62. - 1000 (ms) = 1 conv/sec (default)
  63. - 250 (ms) = 4 conv/sec
  64. - 125 (ms) = 8 conv/sec
  65. Enabling the device when it is already enabled has the side effect of setting
  66. the conversion frequency to 1 conv/s. The conversion time varies depending on
  67. the resolution.
  68. The conversion time doubles with every bit of increased resolution. The
  69. available resolutions are:
  70. - 8 bit -> 8.75 ms conversion time
  71. - 9 bit -> 17.5 ms conversion time
  72. - 10 bit -> 35 ms conversion time
  73. - 12 bit (default) -> 140 ms conversion time
  74. There is a temp1_resolution attribute which indicates the unit change in the
  75. input temperature in milli-degrees C.
  76. - 1000 mC -> 8 bit
  77. - 500 mC -> 9 bit
  78. - 250 mC -> 10 bit
  79. - 62 mC -> 12 bit (default) - actually this is 62.5, but the fil returns 62
  80. When chip is in shutdown mode and a read operation is requested, one-shot is
  81. triggered, the device waits for <conversion time> ms, and only after that is
  82. the temperature value register read. Note that the conversion times are rounded
  83. up to the nearest possible integer.
  84. The LSB of the temperature values is 0.0625 degrees Celsius, but the values of
  85. the temperatures are displayed in milli-degrees. This means, that some data is
  86. lost. The step between 2 consecutive values is 62 or 63. This effect can be seen
  87. in the writing of alarm values too. For positive numbers the user-input value
  88. will always be rounded down to the nearest possible value, for negative numbers
  89. the user-input will always be rounded up to the nearest possible value.
  90. Bus timeout resets the I2C-compatible interface when SCL is low for more than
  91. 30ms (nominal).
  92. Alarm polarity determines if the active state of the alarm is low or high. The
  93. behavior for both settings is dependent on the Fault Queue setting. The ALARM
  94. pin is an open-drain output and requires a pullup resistor to operate.
  95. The Fault Queue bits select how many consecutive temperature faults must occur
  96. before overtemperature or undertemperature faults are indicated in the
  97. corresponding status bits.
  98. PEC Support
  99. -----------
  100. When reading a register value, the PEC byte is computed and sent by the chip.
  101. PEC on word data transaction respresents a signifcant increase in bandwitdh
  102. usage (+33% for both write and reads) in normal conditions.
  103. Since this operation implies there will be an extra delay to each
  104. transaction, PEC can be disabled or enabled through sysfs.
  105. Just write 1 to the "pec" file for enabling PEC and 0 for disabling it.