errata.rst 2.6 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. =======================================
  3. Known limitations of CPU virtualization
  4. =======================================
  5. Whenever perfect emulation of a CPU feature is impossible or too hard, KVM
  6. has to choose between not implementing the feature at all or introducing
  7. behavioral differences between virtual machines and bare metal systems.
  8. This file documents some of the known limitations that KVM has in
  9. virtualizing CPU features.
  10. x86
  11. ===
  12. ``KVM_GET_SUPPORTED_CPUID`` issues
  13. ----------------------------------
  14. x87 features
  15. ~~~~~~~~~~~~
  16. Unlike most other CPUID feature bits, CPUID[EAX=7,ECX=0]:EBX[6]
  17. (FDP_EXCPTN_ONLY) and CPUID[EAX=7,ECX=0]:EBX]13] (ZERO_FCS_FDS) are
  18. clear if the features are present and set if the features are not present.
  19. Clearing these bits in CPUID has no effect on the operation of the guest;
  20. if these bits are set on hardware, the features will not be present on
  21. any virtual machine that runs on that hardware.
  22. **Workaround:** It is recommended to always set these bits in guest CPUID.
  23. Note however that any software (e.g ``WIN87EM.DLL``) expecting these features
  24. to be present likely predates these CPUID feature bits, and therefore
  25. doesn't know to check for them anyway.
  26. Nested virtualization features
  27. ------------------------------
  28. TBD
  29. x2APIC
  30. ------
  31. When KVM_X2APIC_API_USE_32BIT_IDS is enabled, KVM activates a hack/quirk that
  32. allows sending events to a single vCPU using its x2APIC ID even if the target
  33. vCPU has legacy xAPIC enabled, e.g. to bring up hotplugged vCPUs via INIT-SIPI
  34. on VMs with > 255 vCPUs. A side effect of the quirk is that, if multiple vCPUs
  35. have the same physical APIC ID, KVM will deliver events targeting that APIC ID
  36. only to the vCPU with the lowest vCPU ID. If KVM_X2APIC_API_USE_32BIT_IDS is
  37. not enabled, KVM follows x86 architecture when processing interrupts (all vCPUs
  38. matching the target APIC ID receive the interrupt).
  39. MTRRs
  40. -----
  41. KVM does not virtualize guest MTRR memory types. KVM emulates accesses to MTRR
  42. MSRs, i.e. {RD,WR}MSR in the guest will behave as expected, but KVM does not
  43. honor guest MTRRs when determining the effective memory type, and instead
  44. treats all of guest memory as having Writeback (WB) MTRRs.
  45. CR0.CD
  46. ------
  47. KVM does not virtualize CR0.CD on Intel CPUs. Similar to MTRR MSRs, KVM
  48. emulates CR0.CD accesses so that loads and stores from/to CR0 behave as
  49. expected, but setting CR0.CD=1 has no impact on the cachaeability of guest
  50. memory.
  51. Note, this erratum does not affect AMD CPUs, which fully virtualize CR0.CD in
  52. hardware, i.e. put the CPU caches into "no fill" mode when CR0.CD=1, even when
  53. running in the guest.