aspeed-g6.dtsi 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. // Copyright 2019 IBM Corp.
  3. #include <dt-bindings/interrupt-controller/arm-gic.h>
  4. #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
  5. #include <dt-bindings/clock/ast2600-clock.h>
  6. / {
  7. model = "Aspeed BMC";
  8. compatible = "aspeed,ast2600";
  9. #address-cells = <1>;
  10. #size-cells = <1>;
  11. interrupt-parent = <&gic>;
  12. aliases {
  13. i2c0 = &i2c0;
  14. i2c1 = &i2c1;
  15. i2c2 = &i2c2;
  16. i2c3 = &i2c3;
  17. i2c4 = &i2c4;
  18. i2c5 = &i2c5;
  19. i2c6 = &i2c6;
  20. i2c7 = &i2c7;
  21. i2c8 = &i2c8;
  22. i2c9 = &i2c9;
  23. i2c10 = &i2c10;
  24. i2c11 = &i2c11;
  25. i2c12 = &i2c12;
  26. i2c13 = &i2c13;
  27. i2c14 = &i2c14;
  28. i2c15 = &i2c15;
  29. serial0 = &uart1;
  30. serial1 = &uart2;
  31. serial2 = &uart3;
  32. serial3 = &uart4;
  33. serial4 = &uart5;
  34. serial5 = &vuart1;
  35. serial6 = &vuart2;
  36. mdio0 = &mdio0;
  37. mdio1 = &mdio1;
  38. mdio2 = &mdio2;
  39. mdio3 = &mdio3;
  40. };
  41. cpus {
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. enable-method = "aspeed,ast2600-smp";
  45. cpu@f00 {
  46. compatible = "arm,cortex-a7";
  47. device_type = "cpu";
  48. reg = <0xf00>;
  49. };
  50. cpu@f01 {
  51. compatible = "arm,cortex-a7";
  52. device_type = "cpu";
  53. reg = <0xf01>;
  54. };
  55. };
  56. timer {
  57. compatible = "arm,armv7-timer";
  58. interrupt-parent = <&gic>;
  59. interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  60. <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  61. <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
  62. <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
  63. clocks = <&syscon ASPEED_CLK_HPLL>;
  64. arm,cpu-registers-not-fw-configured;
  65. always-on;
  66. };
  67. edac: sdram@1e6e0000 {
  68. compatible = "aspeed,ast2600-sdram-edac", "syscon";
  69. reg = <0x1e6e0000 0x174>;
  70. interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
  71. };
  72. ahb {
  73. compatible = "simple-bus";
  74. #address-cells = <1>;
  75. #size-cells = <1>;
  76. device_type = "soc";
  77. ranges;
  78. gic: interrupt-controller@40461000 {
  79. compatible = "arm,cortex-a7-gic";
  80. interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  81. #interrupt-cells = <3>;
  82. interrupt-controller;
  83. interrupt-parent = <&gic>;
  84. reg = <0x40461000 0x1000>,
  85. <0x40462000 0x1000>,
  86. <0x40464000 0x2000>,
  87. <0x40466000 0x2000>;
  88. };
  89. ahbc: bus@1e600000 {
  90. compatible = "aspeed,ast2600-ahbc", "syscon";
  91. reg = <0x1e600000 0x100>;
  92. };
  93. fmc: spi@1e620000 {
  94. reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. compatible = "aspeed,ast2600-fmc";
  98. clocks = <&syscon ASPEED_CLK_AHB>;
  99. status = "disabled";
  100. interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
  101. flash@0 {
  102. reg = < 0 >;
  103. compatible = "jedec,spi-nor";
  104. spi-max-frequency = <50000000>;
  105. spi-rx-bus-width = <2>;
  106. status = "disabled";
  107. };
  108. flash@1 {
  109. reg = < 1 >;
  110. compatible = "jedec,spi-nor";
  111. spi-max-frequency = <50000000>;
  112. spi-rx-bus-width = <2>;
  113. status = "disabled";
  114. };
  115. flash@2 {
  116. reg = < 2 >;
  117. compatible = "jedec,spi-nor";
  118. spi-max-frequency = <50000000>;
  119. spi-rx-bus-width = <2>;
  120. status = "disabled";
  121. };
  122. };
  123. spi1: spi@1e630000 {
  124. reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. compatible = "aspeed,ast2600-spi";
  128. clocks = <&syscon ASPEED_CLK_AHB>;
  129. status = "disabled";
  130. flash@0 {
  131. reg = < 0 >;
  132. compatible = "jedec,spi-nor";
  133. spi-max-frequency = <50000000>;
  134. spi-rx-bus-width = <2>;
  135. status = "disabled";
  136. };
  137. flash@1 {
  138. reg = < 1 >;
  139. compatible = "jedec,spi-nor";
  140. spi-max-frequency = <50000000>;
  141. spi-rx-bus-width = <2>;
  142. status = "disabled";
  143. };
  144. };
  145. spi2: spi@1e631000 {
  146. reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
  147. #address-cells = <1>;
  148. #size-cells = <0>;
  149. compatible = "aspeed,ast2600-spi";
  150. clocks = <&syscon ASPEED_CLK_AHB>;
  151. status = "disabled";
  152. flash@0 {
  153. reg = < 0 >;
  154. compatible = "jedec,spi-nor";
  155. spi-max-frequency = <50000000>;
  156. spi-rx-bus-width = <2>;
  157. status = "disabled";
  158. };
  159. flash@1 {
  160. reg = < 1 >;
  161. compatible = "jedec,spi-nor";
  162. spi-max-frequency = <50000000>;
  163. spi-rx-bus-width = <2>;
  164. status = "disabled";
  165. };
  166. flash@2 {
  167. reg = < 2 >;
  168. compatible = "jedec,spi-nor";
  169. spi-max-frequency = <50000000>;
  170. spi-rx-bus-width = <2>;
  171. status = "disabled";
  172. };
  173. };
  174. mdio0: mdio@1e650000 {
  175. compatible = "aspeed,ast2600-mdio";
  176. reg = <0x1e650000 0x8>;
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. status = "disabled";
  180. pinctrl-names = "default";
  181. pinctrl-0 = <&pinctrl_mdio1_default>;
  182. resets = <&syscon ASPEED_RESET_MII>;
  183. };
  184. mdio1: mdio@1e650008 {
  185. compatible = "aspeed,ast2600-mdio";
  186. reg = <0x1e650008 0x8>;
  187. #address-cells = <1>;
  188. #size-cells = <0>;
  189. status = "disabled";
  190. pinctrl-names = "default";
  191. pinctrl-0 = <&pinctrl_mdio2_default>;
  192. resets = <&syscon ASPEED_RESET_MII>;
  193. };
  194. mdio2: mdio@1e650010 {
  195. compatible = "aspeed,ast2600-mdio";
  196. reg = <0x1e650010 0x8>;
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. status = "disabled";
  200. pinctrl-names = "default";
  201. pinctrl-0 = <&pinctrl_mdio3_default>;
  202. resets = <&syscon ASPEED_RESET_MII>;
  203. };
  204. mdio3: mdio@1e650018 {
  205. compatible = "aspeed,ast2600-mdio";
  206. reg = <0x1e650018 0x8>;
  207. #address-cells = <1>;
  208. #size-cells = <0>;
  209. status = "disabled";
  210. pinctrl-names = "default";
  211. pinctrl-0 = <&pinctrl_mdio4_default>;
  212. resets = <&syscon ASPEED_RESET_MII>;
  213. };
  214. mac0: ethernet@1e660000 {
  215. compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
  216. reg = <0x1e660000 0x180>;
  217. interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
  218. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
  219. status = "disabled";
  220. };
  221. mac1: ethernet@1e680000 {
  222. compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
  223. reg = <0x1e680000 0x180>;
  224. interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
  225. clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
  226. status = "disabled";
  227. };
  228. mac2: ethernet@1e670000 {
  229. compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
  230. reg = <0x1e670000 0x180>;
  231. interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  232. clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
  233. status = "disabled";
  234. };
  235. mac3: ethernet@1e690000 {
  236. compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
  237. reg = <0x1e690000 0x180>;
  238. interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
  239. clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
  240. status = "disabled";
  241. };
  242. ehci0: usb@1e6a1000 {
  243. compatible = "aspeed,ast2600-ehci", "generic-ehci";
  244. reg = <0x1e6a1000 0x100>;
  245. interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
  246. clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&pinctrl_usb2ah_default>;
  249. status = "disabled";
  250. };
  251. ehci1: usb@1e6a3000 {
  252. compatible = "aspeed,ast2600-ehci", "generic-ehci";
  253. reg = <0x1e6a3000 0x100>;
  254. interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  255. clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
  256. pinctrl-names = "default";
  257. pinctrl-0 = <&pinctrl_usb2bh_default>;
  258. status = "disabled";
  259. };
  260. uhci: usb@1e6b0000 {
  261. compatible = "aspeed,ast2600-uhci", "generic-uhci";
  262. reg = <0x1e6b0000 0x100>;
  263. interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  264. #ports = <2>;
  265. clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
  266. status = "disabled";
  267. /*
  268. * No default pinmux, it will follow EHCI, use an
  269. * explicit pinmux override if EHCI is not enabled.
  270. */
  271. };
  272. vhub: usb-vhub@1e6a0000 {
  273. compatible = "aspeed,ast2600-usb-vhub";
  274. reg = <0x1e6a0000 0x350>;
  275. interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
  276. clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
  277. aspeed,vhub-downstream-ports = <7>;
  278. aspeed,vhub-generic-endpoints = <21>;
  279. pinctrl-names = "default";
  280. pinctrl-0 = <&pinctrl_usb2ad_default>;
  281. status = "disabled";
  282. };
  283. udc: usb@1e6a2000 {
  284. compatible = "aspeed,ast2600-udc";
  285. reg = <0x1e6a2000 0x300>;
  286. interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  287. clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
  288. pinctrl-names = "default";
  289. pinctrl-0 = <&pinctrl_usb2bd_default>;
  290. status = "disabled";
  291. };
  292. apb {
  293. compatible = "simple-bus";
  294. #address-cells = <1>;
  295. #size-cells = <1>;
  296. ranges;
  297. hace: crypto@1e6d0000 {
  298. compatible = "aspeed,ast2600-hace";
  299. reg = <0x1e6d0000 0x200>;
  300. interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  301. clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
  302. resets = <&syscon ASPEED_RESET_HACE>;
  303. };
  304. syscon: syscon@1e6e2000 {
  305. compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
  306. reg = <0x1e6e2000 0x1000>;
  307. ranges = <0 0x1e6e2000 0x1000>;
  308. #address-cells = <1>;
  309. #size-cells = <1>;
  310. #clock-cells = <1>;
  311. #reset-cells = <1>;
  312. pinctrl: pinctrl {
  313. compatible = "aspeed,ast2600-pinctrl";
  314. };
  315. silicon-id@14 {
  316. compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
  317. reg = <0x14 0x4 0x5b0 0x8>;
  318. };
  319. smp-memram@180 {
  320. compatible = "aspeed,ast2600-smpmem";
  321. reg = <0x180 0x40>;
  322. };
  323. scu_ic0: interrupt-controller@560 {
  324. #interrupt-cells = <1>;
  325. compatible = "aspeed,ast2600-scu-ic0";
  326. reg = <0x560 0x4>;
  327. interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
  328. interrupt-controller;
  329. };
  330. scu_ic1: interrupt-controller@570 {
  331. #interrupt-cells = <1>;
  332. compatible = "aspeed,ast2600-scu-ic1";
  333. reg = <0x570 0x4>;
  334. interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
  335. interrupt-controller;
  336. };
  337. };
  338. rng: hwrng@1e6e2524 {
  339. compatible = "timeriomem_rng";
  340. reg = <0x1e6e2524 0x4>;
  341. period = <1>;
  342. quality = <100>;
  343. };
  344. gfx: display@1e6e6000 {
  345. compatible = "aspeed,ast2600-gfx", "syscon";
  346. reg = <0x1e6e6000 0x1000>;
  347. reg-io-width = <4>;
  348. clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
  349. resets = <&syscon ASPEED_RESET_GRAPHICS>;
  350. syscon = <&syscon>;
  351. status = "disabled";
  352. interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
  353. };
  354. adc0: adc@1e6e9000 {
  355. compatible = "aspeed,ast2600-adc0";
  356. reg = <0x1e6e9000 0x100>;
  357. clocks = <&syscon ASPEED_CLK_APB2>;
  358. resets = <&syscon ASPEED_RESET_ADC>;
  359. interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
  360. #io-channel-cells = <1>;
  361. status = "disabled";
  362. };
  363. adc1: adc@1e6e9100 {
  364. compatible = "aspeed,ast2600-adc1";
  365. reg = <0x1e6e9100 0x100>;
  366. clocks = <&syscon ASPEED_CLK_APB2>;
  367. resets = <&syscon ASPEED_RESET_ADC>;
  368. interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
  369. #io-channel-cells = <1>;
  370. status = "disabled";
  371. };
  372. sbc: secure-boot-controller@1e6f2000 {
  373. compatible = "aspeed,ast2600-sbc";
  374. reg = <0x1e6f2000 0x1000>;
  375. };
  376. acry: crypto@1e6fa000 {
  377. compatible = "aspeed,ast2600-acry";
  378. reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
  379. interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
  380. clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
  381. aspeed,ahbc = <&ahbc>;
  382. };
  383. video: video@1e700000 {
  384. compatible = "aspeed,ast2600-video-engine";
  385. reg = <0x1e700000 0x1000>;
  386. clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
  387. <&syscon ASPEED_CLK_GATE_ECLK>;
  388. clock-names = "vclk", "eclk";
  389. interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  390. status = "disabled";
  391. };
  392. gpio0: gpio@1e780000 {
  393. #gpio-cells = <2>;
  394. gpio-controller;
  395. compatible = "aspeed,ast2600-gpio";
  396. reg = <0x1e780000 0x400>;
  397. interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
  398. gpio-ranges = <&pinctrl 0 0 208>;
  399. ngpios = <208>;
  400. clocks = <&syscon ASPEED_CLK_APB2>;
  401. interrupt-controller;
  402. #interrupt-cells = <2>;
  403. };
  404. sgpiom0: sgpiom@1e780500 {
  405. #gpio-cells = <2>;
  406. gpio-controller;
  407. compatible = "aspeed,ast2600-sgpiom";
  408. reg = <0x1e780500 0x100>;
  409. interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
  410. clocks = <&syscon ASPEED_CLK_APB2>;
  411. #interrupt-cells = <2>;
  412. interrupt-controller;
  413. bus-frequency = <12000000>;
  414. pinctrl-names = "default";
  415. pinctrl-0 = <&pinctrl_sgpm1_default>;
  416. status = "disabled";
  417. };
  418. sgpiom1: sgpiom@1e780600 {
  419. #gpio-cells = <2>;
  420. gpio-controller;
  421. compatible = "aspeed,ast2600-sgpiom";
  422. reg = <0x1e780600 0x100>;
  423. interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
  424. clocks = <&syscon ASPEED_CLK_APB2>;
  425. #interrupt-cells = <2>;
  426. interrupt-controller;
  427. bus-frequency = <12000000>;
  428. pinctrl-names = "default";
  429. pinctrl-0 = <&pinctrl_sgpm2_default>;
  430. status = "disabled";
  431. };
  432. gpio1: gpio@1e780800 {
  433. #gpio-cells = <2>;
  434. gpio-controller;
  435. compatible = "aspeed,ast2600-gpio";
  436. reg = <0x1e780800 0x800>;
  437. interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
  438. gpio-ranges = <&pinctrl 0 208 36>;
  439. ngpios = <36>;
  440. clocks = <&syscon ASPEED_CLK_APB1>;
  441. interrupt-controller;
  442. #interrupt-cells = <2>;
  443. };
  444. rtc: rtc@1e781000 {
  445. compatible = "aspeed,ast2600-rtc";
  446. reg = <0x1e781000 0x18>;
  447. interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
  448. status = "disabled";
  449. };
  450. timer: timer@1e782000 {
  451. compatible = "aspeed,ast2600-timer";
  452. reg = <0x1e782000 0x90>;
  453. interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
  454. <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
  455. <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
  456. <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
  457. <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
  458. <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
  459. <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
  460. <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
  461. clocks = <&syscon ASPEED_CLK_APB1>;
  462. clock-names = "PCLK";
  463. status = "disabled";
  464. };
  465. uart1: serial@1e783000 {
  466. compatible = "ns16550a";
  467. reg = <0x1e783000 0x20>;
  468. reg-shift = <2>;
  469. reg-io-width = <4>;
  470. interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
  471. clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
  472. resets = <&lpc_reset 4>;
  473. no-loopback-test;
  474. pinctrl-names = "default";
  475. pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
  476. status = "disabled";
  477. };
  478. uart5: serial@1e784000 {
  479. compatible = "ns16550a";
  480. reg = <0x1e784000 0x1000>;
  481. reg-shift = <2>;
  482. interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
  483. clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
  484. no-loopback-test;
  485. };
  486. wdt1: watchdog@1e785000 {
  487. compatible = "aspeed,ast2600-wdt";
  488. reg = <0x1e785000 0x40>;
  489. };
  490. wdt2: watchdog@1e785040 {
  491. compatible = "aspeed,ast2600-wdt";
  492. reg = <0x1e785040 0x40>;
  493. status = "disabled";
  494. };
  495. wdt3: watchdog@1e785080 {
  496. compatible = "aspeed,ast2600-wdt";
  497. reg = <0x1e785080 0x40>;
  498. status = "disabled";
  499. };
  500. wdt4: watchdog@1e7850c0 {
  501. compatible = "aspeed,ast2600-wdt";
  502. reg = <0x1e7850C0 0x40>;
  503. status = "disabled";
  504. };
  505. peci0: peci-controller@1e78b000 {
  506. compatible = "aspeed,ast2600-peci";
  507. reg = <0x1e78b000 0x100>;
  508. interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
  509. clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>;
  510. resets = <&syscon ASPEED_RESET_PECI>;
  511. cmd-timeout-ms = <1000>;
  512. clock-frequency = <1000000>;
  513. status = "disabled";
  514. };
  515. lpc: lpc@1e789000 {
  516. compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
  517. reg = <0x1e789000 0x1000>;
  518. reg-io-width = <4>;
  519. #address-cells = <1>;
  520. #size-cells = <1>;
  521. ranges = <0x0 0x1e789000 0x1000>;
  522. kcs1: kcs@24 {
  523. compatible = "aspeed,ast2500-kcs-bmc-v2";
  524. reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
  525. interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
  526. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  527. kcs_chan = <1>;
  528. status = "disabled";
  529. };
  530. kcs2: kcs@28 {
  531. compatible = "aspeed,ast2500-kcs-bmc-v2";
  532. reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
  533. interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
  534. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  535. status = "disabled";
  536. };
  537. kcs3: kcs@2c {
  538. compatible = "aspeed,ast2500-kcs-bmc-v2";
  539. reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
  540. interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
  541. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  542. status = "disabled";
  543. };
  544. kcs4: kcs@114 {
  545. compatible = "aspeed,ast2500-kcs-bmc-v2";
  546. reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
  547. interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
  548. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  549. status = "disabled";
  550. };
  551. lpc_ctrl: lpc-ctrl@80 {
  552. compatible = "aspeed,ast2600-lpc-ctrl";
  553. reg = <0x80 0x80>;
  554. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  555. status = "disabled";
  556. };
  557. lpc_snoop: lpc-snoop@80 {
  558. compatible = "aspeed,ast2600-lpc-snoop";
  559. reg = <0x80 0x80>;
  560. interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
  561. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  562. status = "disabled";
  563. };
  564. lhc: lhc@a0 {
  565. compatible = "aspeed,ast2600-lhc";
  566. reg = <0xa0 0x24 0xc8 0x8>;
  567. };
  568. lpc_reset: reset-controller@98 {
  569. compatible = "aspeed,ast2600-lpc-reset";
  570. reg = <0x98 0x4>;
  571. #reset-cells = <1>;
  572. };
  573. uart_routing: uart-routing@98 {
  574. compatible = "aspeed,ast2600-uart-routing";
  575. reg = <0x98 0x8>;
  576. status = "disabled";
  577. };
  578. ibt: ibt@140 {
  579. compatible = "aspeed,ast2600-ibt-bmc";
  580. reg = <0x140 0x18>;
  581. interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
  582. clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
  583. status = "disabled";
  584. };
  585. };
  586. sdc: sdc@1e740000 {
  587. compatible = "aspeed,ast2600-sd-controller";
  588. reg = <0x1e740000 0x100>;
  589. #address-cells = <1>;
  590. #size-cells = <1>;
  591. ranges = <0 0x1e740000 0x10000>;
  592. clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
  593. status = "disabled";
  594. sdhci0: sdhci@1e740100 {
  595. compatible = "aspeed,ast2600-sdhci", "sdhci";
  596. reg = <0x100 0x100>;
  597. interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
  598. sdhci,auto-cmd12;
  599. clocks = <&syscon ASPEED_CLK_SDIO>;
  600. status = "disabled";
  601. };
  602. sdhci1: sdhci@1e740200 {
  603. compatible = "aspeed,ast2600-sdhci", "sdhci";
  604. reg = <0x200 0x100>;
  605. interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
  606. sdhci,auto-cmd12;
  607. clocks = <&syscon ASPEED_CLK_SDIO>;
  608. status = "disabled";
  609. };
  610. };
  611. emmc_controller: sdc@1e750000 {
  612. compatible = "aspeed,ast2600-sd-controller";
  613. reg = <0x1e750000 0x100>;
  614. #address-cells = <1>;
  615. #size-cells = <1>;
  616. ranges = <0 0x1e750000 0x10000>;
  617. clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
  618. status = "disabled";
  619. emmc: sdhci@1e750100 {
  620. compatible = "aspeed,ast2600-sdhci";
  621. reg = <0x100 0x100>;
  622. sdhci,auto-cmd12;
  623. interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  624. clocks = <&syscon ASPEED_CLK_EMMC>;
  625. pinctrl-names = "default";
  626. pinctrl-0 = <&pinctrl_emmc_default>;
  627. };
  628. };
  629. vuart1: serial@1e787000 {
  630. compatible = "aspeed,ast2500-vuart";
  631. reg = <0x1e787000 0x40>;
  632. reg-shift = <2>;
  633. interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
  634. clocks = <&syscon ASPEED_CLK_APB1>;
  635. no-loopback-test;
  636. status = "disabled";
  637. };
  638. vuart3: serial@1e787800 {
  639. compatible = "aspeed,ast2500-vuart";
  640. reg = <0x1e787800 0x40>;
  641. reg-shift = <2>;
  642. interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
  643. clocks = <&syscon ASPEED_CLK_APB2>;
  644. no-loopback-test;
  645. status = "disabled";
  646. };
  647. vuart2: serial@1e788000 {
  648. compatible = "aspeed,ast2500-vuart";
  649. reg = <0x1e788000 0x40>;
  650. reg-shift = <2>;
  651. interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
  652. clocks = <&syscon ASPEED_CLK_APB1>;
  653. no-loopback-test;
  654. status = "disabled";
  655. };
  656. vuart4: serial@1e788800 {
  657. compatible = "aspeed,ast2500-vuart";
  658. reg = <0x1e788800 0x40>;
  659. reg-shift = <2>;
  660. interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
  661. clocks = <&syscon ASPEED_CLK_APB2>;
  662. no-loopback-test;
  663. status = "disabled";
  664. };
  665. uart2: serial@1e78d000 {
  666. compatible = "ns16550a";
  667. reg = <0x1e78d000 0x20>;
  668. reg-shift = <2>;
  669. reg-io-width = <4>;
  670. interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  671. clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
  672. resets = <&lpc_reset 5>;
  673. no-loopback-test;
  674. pinctrl-names = "default";
  675. pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
  676. status = "disabled";
  677. };
  678. uart3: serial@1e78e000 {
  679. compatible = "ns16550a";
  680. reg = <0x1e78e000 0x20>;
  681. reg-shift = <2>;
  682. reg-io-width = <4>;
  683. interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
  684. clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
  685. resets = <&lpc_reset 6>;
  686. no-loopback-test;
  687. pinctrl-names = "default";
  688. pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
  689. status = "disabled";
  690. };
  691. uart4: serial@1e78f000 {
  692. compatible = "ns16550a";
  693. reg = <0x1e78f000 0x20>;
  694. reg-shift = <2>;
  695. reg-io-width = <4>;
  696. interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
  697. clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
  698. resets = <&lpc_reset 7>;
  699. no-loopback-test;
  700. pinctrl-names = "default";
  701. pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
  702. status = "disabled";
  703. };
  704. uart6: serial@1e790000 {
  705. compatible = "ns16550a";
  706. reg = <0x1e790000 0x20>;
  707. reg-shift = <2>;
  708. reg-io-width = <4>;
  709. interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
  710. clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>;
  711. no-loopback-test;
  712. pinctrl-names = "default";
  713. pinctrl-0 = <&pinctrl_uart6_default>;
  714. status = "disabled";
  715. };
  716. uart7: serial@1e790100 {
  717. compatible = "ns16550a";
  718. reg = <0x1e790100 0x20>;
  719. reg-shift = <2>;
  720. reg-io-width = <4>;
  721. interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
  722. clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>;
  723. no-loopback-test;
  724. pinctrl-names = "default";
  725. pinctrl-0 = <&pinctrl_uart7_default>;
  726. status = "disabled";
  727. };
  728. uart8: serial@1e790200 {
  729. compatible = "ns16550a";
  730. reg = <0x1e790200 0x20>;
  731. reg-shift = <2>;
  732. reg-io-width = <4>;
  733. interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
  734. clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>;
  735. no-loopback-test;
  736. pinctrl-names = "default";
  737. pinctrl-0 = <&pinctrl_uart8_default>;
  738. status = "disabled";
  739. };
  740. uart9: serial@1e790300 {
  741. compatible = "ns16550a";
  742. reg = <0x1e790300 0x20>;
  743. reg-shift = <2>;
  744. reg-io-width = <4>;
  745. interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
  746. clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>;
  747. no-loopback-test;
  748. pinctrl-names = "default";
  749. pinctrl-0 = <&pinctrl_uart9_default>;
  750. status = "disabled";
  751. };
  752. i2c: bus@1e78a000 {
  753. compatible = "simple-bus";
  754. #address-cells = <1>;
  755. #size-cells = <1>;
  756. ranges = <0 0x1e78a000 0x1000>;
  757. };
  758. fsim0: fsi@1e79b000 {
  759. #interrupt-cells = <1>;
  760. compatible = "aspeed,ast2600-fsi-master", "fsi-master";
  761. reg = <0x1e79b000 0x94>;
  762. interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
  763. pinctrl-names = "default";
  764. pinctrl-0 = <&pinctrl_fsi1_default>;
  765. clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
  766. interrupt-controller;
  767. status = "disabled";
  768. };
  769. fsim1: fsi@1e79b100 {
  770. #interrupt-cells = <1>;
  771. compatible = "aspeed,ast2600-fsi-master", "fsi-master";
  772. reg = <0x1e79b100 0x94>;
  773. interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
  774. pinctrl-names = "default";
  775. pinctrl-0 = <&pinctrl_fsi2_default>;
  776. clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
  777. interrupt-controller;
  778. status = "disabled";
  779. };
  780. udma: dma-controller@1e79e000 {
  781. compatible = "aspeed,ast2600-udma";
  782. reg = <0x1e79e000 0x1000>;
  783. interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
  784. dma-channels = <28>;
  785. #dma-cells = <1>;
  786. status = "disabled";
  787. };
  788. };
  789. };
  790. };
  791. #include "aspeed-g6-pinctrl.dtsi"
  792. &i2c {
  793. i2c0: i2c@80 {
  794. #address-cells = <1>;
  795. #size-cells = <0>;
  796. reg = <0x80 0x80>;
  797. compatible = "aspeed,ast2600-i2c-bus";
  798. clocks = <&syscon ASPEED_CLK_APB2>;
  799. resets = <&syscon ASPEED_RESET_I2C>;
  800. interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
  801. bus-frequency = <100000>;
  802. pinctrl-names = "default";
  803. pinctrl-0 = <&pinctrl_i2c1_default>;
  804. status = "disabled";
  805. };
  806. i2c1: i2c@100 {
  807. #address-cells = <1>;
  808. #size-cells = <0>;
  809. reg = <0x100 0x80>;
  810. compatible = "aspeed,ast2600-i2c-bus";
  811. clocks = <&syscon ASPEED_CLK_APB2>;
  812. resets = <&syscon ASPEED_RESET_I2C>;
  813. interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
  814. bus-frequency = <100000>;
  815. pinctrl-names = "default";
  816. pinctrl-0 = <&pinctrl_i2c2_default>;
  817. status = "disabled";
  818. };
  819. i2c2: i2c@180 {
  820. #address-cells = <1>;
  821. #size-cells = <0>;
  822. reg = <0x180 0x80>;
  823. compatible = "aspeed,ast2600-i2c-bus";
  824. clocks = <&syscon ASPEED_CLK_APB2>;
  825. resets = <&syscon ASPEED_RESET_I2C>;
  826. interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
  827. bus-frequency = <100000>;
  828. pinctrl-names = "default";
  829. pinctrl-0 = <&pinctrl_i2c3_default>;
  830. status = "disabled";
  831. };
  832. i2c3: i2c@200 {
  833. #address-cells = <1>;
  834. #size-cells = <0>;
  835. reg = <0x200 0x80>;
  836. compatible = "aspeed,ast2600-i2c-bus";
  837. clocks = <&syscon ASPEED_CLK_APB2>;
  838. resets = <&syscon ASPEED_RESET_I2C>;
  839. interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
  840. bus-frequency = <100000>;
  841. pinctrl-names = "default";
  842. pinctrl-0 = <&pinctrl_i2c4_default>;
  843. status = "disabled";
  844. };
  845. i2c4: i2c@280 {
  846. #address-cells = <1>;
  847. #size-cells = <0>;
  848. reg = <0x280 0x80>;
  849. compatible = "aspeed,ast2600-i2c-bus";
  850. clocks = <&syscon ASPEED_CLK_APB2>;
  851. resets = <&syscon ASPEED_RESET_I2C>;
  852. interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
  853. bus-frequency = <100000>;
  854. pinctrl-names = "default";
  855. pinctrl-0 = <&pinctrl_i2c5_default>;
  856. status = "disabled";
  857. };
  858. i2c5: i2c@300 {
  859. #address-cells = <1>;
  860. #size-cells = <0>;
  861. reg = <0x300 0x80>;
  862. compatible = "aspeed,ast2600-i2c-bus";
  863. clocks = <&syscon ASPEED_CLK_APB2>;
  864. resets = <&syscon ASPEED_RESET_I2C>;
  865. interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
  866. bus-frequency = <100000>;
  867. pinctrl-names = "default";
  868. pinctrl-0 = <&pinctrl_i2c6_default>;
  869. status = "disabled";
  870. };
  871. i2c6: i2c@380 {
  872. #address-cells = <1>;
  873. #size-cells = <0>;
  874. reg = <0x380 0x80>;
  875. compatible = "aspeed,ast2600-i2c-bus";
  876. clocks = <&syscon ASPEED_CLK_APB2>;
  877. resets = <&syscon ASPEED_RESET_I2C>;
  878. interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
  879. bus-frequency = <100000>;
  880. pinctrl-names = "default";
  881. pinctrl-0 = <&pinctrl_i2c7_default>;
  882. status = "disabled";
  883. };
  884. i2c7: i2c@400 {
  885. #address-cells = <1>;
  886. #size-cells = <0>;
  887. reg = <0x400 0x80>;
  888. compatible = "aspeed,ast2600-i2c-bus";
  889. clocks = <&syscon ASPEED_CLK_APB2>;
  890. resets = <&syscon ASPEED_RESET_I2C>;
  891. interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
  892. bus-frequency = <100000>;
  893. pinctrl-names = "default";
  894. pinctrl-0 = <&pinctrl_i2c8_default>;
  895. status = "disabled";
  896. };
  897. i2c8: i2c@480 {
  898. #address-cells = <1>;
  899. #size-cells = <0>;
  900. reg = <0x480 0x80>;
  901. compatible = "aspeed,ast2600-i2c-bus";
  902. clocks = <&syscon ASPEED_CLK_APB2>;
  903. resets = <&syscon ASPEED_RESET_I2C>;
  904. interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
  905. bus-frequency = <100000>;
  906. pinctrl-names = "default";
  907. pinctrl-0 = <&pinctrl_i2c9_default>;
  908. status = "disabled";
  909. };
  910. i2c9: i2c@500 {
  911. #address-cells = <1>;
  912. #size-cells = <0>;
  913. reg = <0x500 0x80>;
  914. compatible = "aspeed,ast2600-i2c-bus";
  915. clocks = <&syscon ASPEED_CLK_APB2>;
  916. resets = <&syscon ASPEED_RESET_I2C>;
  917. interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
  918. bus-frequency = <100000>;
  919. pinctrl-names = "default";
  920. pinctrl-0 = <&pinctrl_i2c10_default>;
  921. status = "disabled";
  922. };
  923. i2c10: i2c@580 {
  924. #address-cells = <1>;
  925. #size-cells = <0>;
  926. reg = <0x580 0x80>;
  927. compatible = "aspeed,ast2600-i2c-bus";
  928. clocks = <&syscon ASPEED_CLK_APB2>;
  929. resets = <&syscon ASPEED_RESET_I2C>;
  930. interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
  931. bus-frequency = <100000>;
  932. pinctrl-names = "default";
  933. pinctrl-0 = <&pinctrl_i2c11_default>;
  934. status = "disabled";
  935. };
  936. i2c11: i2c@600 {
  937. #address-cells = <1>;
  938. #size-cells = <0>;
  939. reg = <0x600 0x80>;
  940. compatible = "aspeed,ast2600-i2c-bus";
  941. clocks = <&syscon ASPEED_CLK_APB2>;
  942. resets = <&syscon ASPEED_RESET_I2C>;
  943. interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
  944. bus-frequency = <100000>;
  945. pinctrl-names = "default";
  946. pinctrl-0 = <&pinctrl_i2c12_default>;
  947. status = "disabled";
  948. };
  949. i2c12: i2c@680 {
  950. #address-cells = <1>;
  951. #size-cells = <0>;
  952. reg = <0x680 0x80>;
  953. compatible = "aspeed,ast2600-i2c-bus";
  954. clocks = <&syscon ASPEED_CLK_APB2>;
  955. resets = <&syscon ASPEED_RESET_I2C>;
  956. interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
  957. bus-frequency = <100000>;
  958. pinctrl-names = "default";
  959. pinctrl-0 = <&pinctrl_i2c13_default>;
  960. status = "disabled";
  961. };
  962. i2c13: i2c@700 {
  963. #address-cells = <1>;
  964. #size-cells = <0>;
  965. reg = <0x700 0x80>;
  966. compatible = "aspeed,ast2600-i2c-bus";
  967. clocks = <&syscon ASPEED_CLK_APB2>;
  968. resets = <&syscon ASPEED_RESET_I2C>;
  969. interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
  970. bus-frequency = <100000>;
  971. pinctrl-names = "default";
  972. pinctrl-0 = <&pinctrl_i2c14_default>;
  973. status = "disabled";
  974. };
  975. i2c14: i2c@780 {
  976. #address-cells = <1>;
  977. #size-cells = <0>;
  978. reg = <0x780 0x80>;
  979. compatible = "aspeed,ast2600-i2c-bus";
  980. clocks = <&syscon ASPEED_CLK_APB2>;
  981. resets = <&syscon ASPEED_RESET_I2C>;
  982. interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
  983. bus-frequency = <100000>;
  984. pinctrl-names = "default";
  985. pinctrl-0 = <&pinctrl_i2c15_default>;
  986. status = "disabled";
  987. };
  988. i2c15: i2c@800 {
  989. #address-cells = <1>;
  990. #size-cells = <0>;
  991. reg = <0x800 0x80>;
  992. compatible = "aspeed,ast2600-i2c-bus";
  993. clocks = <&syscon ASPEED_CLK_APB2>;
  994. resets = <&syscon ASPEED_RESET_I2C>;
  995. interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
  996. bus-frequency = <100000>;
  997. pinctrl-names = "default";
  998. pinctrl-0 = <&pinctrl_i2c16_default>;
  999. status = "disabled";
  1000. };
  1001. };