gpio16xx.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * OMAP16xx specific gpio init
  4. *
  5. * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
  6. *
  7. * Author:
  8. * Charulatha V <charu@ti.com>
  9. */
  10. #include <linux/platform_data/gpio-omap.h>
  11. #include <linux/soc/ti/omap1-io.h>
  12. #include "hardware.h"
  13. #include "irqs.h"
  14. #include "soc.h"
  15. #define OMAP1610_GPIO1_BASE 0xfffbe400
  16. #define OMAP1610_GPIO2_BASE 0xfffbec00
  17. #define OMAP1610_GPIO3_BASE 0xfffbb400
  18. #define OMAP1610_GPIO4_BASE 0xfffbbc00
  19. #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
  20. /* smart idle, enable wakeup */
  21. #define SYSCONFIG_WORD 0x14
  22. /* mpu gpio */
  23. static struct resource omap16xx_mpu_gpio_resources[] = {
  24. {
  25. .start = OMAP1_MPUIO_VBASE,
  26. .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
  27. .flags = IORESOURCE_MEM,
  28. },
  29. {
  30. .start = INT_MPUIO,
  31. .flags = IORESOURCE_IRQ,
  32. },
  33. };
  34. static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
  35. .revision = USHRT_MAX,
  36. .direction = OMAP_MPUIO_IO_CNTL,
  37. .datain = OMAP_MPUIO_INPUT_LATCH,
  38. .dataout = OMAP_MPUIO_OUTPUT,
  39. .irqstatus = OMAP_MPUIO_GPIO_INT,
  40. .irqenable = OMAP_MPUIO_GPIO_MASKIT,
  41. .irqenable_inv = true,
  42. .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
  43. };
  44. static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
  45. .is_mpuio = true,
  46. .bank_width = 16,
  47. .bank_stride = 1,
  48. .regs = &omap16xx_mpuio_regs,
  49. };
  50. static struct platform_device omap16xx_mpu_gpio = {
  51. .name = "omap_gpio",
  52. .id = 0,
  53. .dev = {
  54. .platform_data = &omap16xx_mpu_gpio_config,
  55. },
  56. .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
  57. .resource = omap16xx_mpu_gpio_resources,
  58. };
  59. /* gpio1 */
  60. static struct resource omap16xx_gpio1_resources[] = {
  61. {
  62. .start = OMAP1610_GPIO1_BASE,
  63. .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
  64. .flags = IORESOURCE_MEM,
  65. },
  66. {
  67. .start = INT_GPIO_BANK1,
  68. .flags = IORESOURCE_IRQ,
  69. },
  70. };
  71. static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
  72. .revision = OMAP1610_GPIO_REVISION,
  73. .direction = OMAP1610_GPIO_DIRECTION,
  74. .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
  75. .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
  76. .datain = OMAP1610_GPIO_DATAIN,
  77. .dataout = OMAP1610_GPIO_DATAOUT,
  78. .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
  79. .irqenable = OMAP1610_GPIO_IRQENABLE1,
  80. .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
  81. .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
  82. .wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
  83. .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
  84. .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
  85. };
  86. static struct omap_gpio_platform_data omap16xx_gpio1_config = {
  87. .bank_width = 16,
  88. .regs = &omap16xx_gpio_regs,
  89. };
  90. static struct platform_device omap16xx_gpio1 = {
  91. .name = "omap_gpio",
  92. .id = 1,
  93. .dev = {
  94. .platform_data = &omap16xx_gpio1_config,
  95. },
  96. .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
  97. .resource = omap16xx_gpio1_resources,
  98. };
  99. /* gpio2 */
  100. static struct resource omap16xx_gpio2_resources[] = {
  101. {
  102. .start = OMAP1610_GPIO2_BASE,
  103. .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
  104. .flags = IORESOURCE_MEM,
  105. },
  106. {
  107. .start = INT_1610_GPIO_BANK2,
  108. .flags = IORESOURCE_IRQ,
  109. },
  110. };
  111. static struct omap_gpio_platform_data omap16xx_gpio2_config = {
  112. .bank_width = 16,
  113. .regs = &omap16xx_gpio_regs,
  114. };
  115. static struct platform_device omap16xx_gpio2 = {
  116. .name = "omap_gpio",
  117. .id = 2,
  118. .dev = {
  119. .platform_data = &omap16xx_gpio2_config,
  120. },
  121. .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
  122. .resource = omap16xx_gpio2_resources,
  123. };
  124. /* gpio3 */
  125. static struct resource omap16xx_gpio3_resources[] = {
  126. {
  127. .start = OMAP1610_GPIO3_BASE,
  128. .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
  129. .flags = IORESOURCE_MEM,
  130. },
  131. {
  132. .start = INT_1610_GPIO_BANK3,
  133. .flags = IORESOURCE_IRQ,
  134. },
  135. };
  136. static struct omap_gpio_platform_data omap16xx_gpio3_config = {
  137. .bank_width = 16,
  138. .regs = &omap16xx_gpio_regs,
  139. };
  140. static struct platform_device omap16xx_gpio3 = {
  141. .name = "omap_gpio",
  142. .id = 3,
  143. .dev = {
  144. .platform_data = &omap16xx_gpio3_config,
  145. },
  146. .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
  147. .resource = omap16xx_gpio3_resources,
  148. };
  149. /* gpio4 */
  150. static struct resource omap16xx_gpio4_resources[] = {
  151. {
  152. .start = OMAP1610_GPIO4_BASE,
  153. .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
  154. .flags = IORESOURCE_MEM,
  155. },
  156. {
  157. .start = INT_1610_GPIO_BANK4,
  158. .flags = IORESOURCE_IRQ,
  159. },
  160. };
  161. static struct omap_gpio_platform_data omap16xx_gpio4_config = {
  162. .bank_width = 16,
  163. .regs = &omap16xx_gpio_regs,
  164. };
  165. static struct platform_device omap16xx_gpio4 = {
  166. .name = "omap_gpio",
  167. .id = 4,
  168. .dev = {
  169. .platform_data = &omap16xx_gpio4_config,
  170. },
  171. .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
  172. .resource = omap16xx_gpio4_resources,
  173. };
  174. static struct platform_device *omap16xx_gpio_dev[] __initdata = {
  175. &omap16xx_mpu_gpio,
  176. &omap16xx_gpio1,
  177. &omap16xx_gpio2,
  178. &omap16xx_gpio3,
  179. &omap16xx_gpio4,
  180. };
  181. /*
  182. * omap16xx_gpio_init needs to be done before
  183. * machine_init functions access gpio APIs.
  184. * Hence omap16xx_gpio_init is a postcore_initcall.
  185. */
  186. static int __init omap16xx_gpio_init(void)
  187. {
  188. int i;
  189. void __iomem *base;
  190. struct resource *res;
  191. struct platform_device *pdev;
  192. struct omap_gpio_platform_data *pdata;
  193. if (!cpu_is_omap16xx())
  194. return -EINVAL;
  195. /*
  196. * Enable system clock for GPIO module.
  197. * The CAM_CLK_CTRL *is* really the right place.
  198. */
  199. omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
  200. ULPD_CAM_CLK_CTRL);
  201. for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
  202. pdev = omap16xx_gpio_dev[i];
  203. pdata = pdev->dev.platform_data;
  204. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  205. if (unlikely(!res)) {
  206. dev_err(&pdev->dev, "Invalid mem resource.\n");
  207. return -ENODEV;
  208. }
  209. base = ioremap(res->start, resource_size(res));
  210. if (unlikely(!base)) {
  211. dev_err(&pdev->dev, "ioremap failed.\n");
  212. return -ENOMEM;
  213. }
  214. __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
  215. iounmap(base);
  216. platform_device_register(omap16xx_gpio_dev[i]);
  217. }
  218. return 0;
  219. }
  220. postcore_initcall(omap16xx_gpio_init);