psci.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 - ARM Ltd
  4. * Author: Marc Zyngier <marc.zyngier@arm.com>
  5. */
  6. #include <linux/arm-smccc.h>
  7. #include <linux/preempt.h>
  8. #include <linux/kvm_host.h>
  9. #include <linux/uaccess.h>
  10. #include <linux/wait.h>
  11. #include <asm/cputype.h>
  12. #include <asm/kvm_emulate.h>
  13. #include <kvm/arm_psci.h>
  14. #include <kvm/arm_hypercalls.h>
  15. /*
  16. * This is an implementation of the Power State Coordination Interface
  17. * as described in ARM document number ARM DEN 0022A.
  18. */
  19. #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
  20. static unsigned long psci_affinity_mask(unsigned long affinity_level)
  21. {
  22. if (affinity_level <= 3)
  23. return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
  24. return 0;
  25. }
  26. static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
  27. {
  28. /*
  29. * NOTE: For simplicity, we make VCPU suspend emulation to be
  30. * same-as WFI (Wait-for-interrupt) emulation.
  31. *
  32. * This means for KVM the wakeup events are interrupts and
  33. * this is consistent with intended use of StateID as described
  34. * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
  35. *
  36. * Further, we also treat power-down request to be same as
  37. * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
  38. * specification (ARM DEN 0022A). This means all suspend states
  39. * for KVM will preserve the register state.
  40. */
  41. kvm_vcpu_wfi(vcpu);
  42. return PSCI_RET_SUCCESS;
  43. }
  44. static inline bool kvm_psci_valid_affinity(struct kvm_vcpu *vcpu,
  45. unsigned long affinity)
  46. {
  47. return !(affinity & ~MPIDR_HWID_BITMASK);
  48. }
  49. static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
  50. {
  51. struct vcpu_reset_state *reset_state;
  52. struct kvm *kvm = source_vcpu->kvm;
  53. struct kvm_vcpu *vcpu = NULL;
  54. int ret = PSCI_RET_SUCCESS;
  55. unsigned long cpu_id;
  56. cpu_id = smccc_get_arg1(source_vcpu);
  57. if (!kvm_psci_valid_affinity(source_vcpu, cpu_id))
  58. return PSCI_RET_INVALID_PARAMS;
  59. vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
  60. /*
  61. * Make sure the caller requested a valid CPU and that the CPU is
  62. * turned off.
  63. */
  64. if (!vcpu)
  65. return PSCI_RET_INVALID_PARAMS;
  66. spin_lock(&vcpu->arch.mp_state_lock);
  67. if (!kvm_arm_vcpu_stopped(vcpu)) {
  68. if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
  69. ret = PSCI_RET_ALREADY_ON;
  70. else
  71. ret = PSCI_RET_INVALID_PARAMS;
  72. goto out_unlock;
  73. }
  74. reset_state = &vcpu->arch.reset_state;
  75. reset_state->pc = smccc_get_arg2(source_vcpu);
  76. /* Propagate caller endianness */
  77. reset_state->be = kvm_vcpu_is_be(source_vcpu);
  78. /*
  79. * NOTE: We always update r0 (or x0) because for PSCI v0.1
  80. * the general purpose registers are undefined upon CPU_ON.
  81. */
  82. reset_state->r0 = smccc_get_arg3(source_vcpu);
  83. reset_state->reset = true;
  84. kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
  85. /*
  86. * Make sure the reset request is observed if the RUNNABLE mp_state is
  87. * observed.
  88. */
  89. smp_wmb();
  90. WRITE_ONCE(vcpu->arch.mp_state.mp_state, KVM_MP_STATE_RUNNABLE);
  91. kvm_vcpu_wake_up(vcpu);
  92. out_unlock:
  93. spin_unlock(&vcpu->arch.mp_state_lock);
  94. return ret;
  95. }
  96. static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
  97. {
  98. int matching_cpus = 0;
  99. unsigned long i, mpidr;
  100. unsigned long target_affinity;
  101. unsigned long target_affinity_mask;
  102. unsigned long lowest_affinity_level;
  103. struct kvm *kvm = vcpu->kvm;
  104. struct kvm_vcpu *tmp;
  105. target_affinity = smccc_get_arg1(vcpu);
  106. lowest_affinity_level = smccc_get_arg2(vcpu);
  107. if (!kvm_psci_valid_affinity(vcpu, target_affinity))
  108. return PSCI_RET_INVALID_PARAMS;
  109. /* Determine target affinity mask */
  110. target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
  111. if (!target_affinity_mask)
  112. return PSCI_RET_INVALID_PARAMS;
  113. /* Ignore other bits of target affinity */
  114. target_affinity &= target_affinity_mask;
  115. /*
  116. * If one or more VCPU matching target affinity are running
  117. * then ON else OFF
  118. */
  119. kvm_for_each_vcpu(i, tmp, kvm) {
  120. mpidr = kvm_vcpu_get_mpidr_aff(tmp);
  121. if ((mpidr & target_affinity_mask) == target_affinity) {
  122. matching_cpus++;
  123. if (!kvm_arm_vcpu_stopped(tmp))
  124. return PSCI_0_2_AFFINITY_LEVEL_ON;
  125. }
  126. }
  127. if (!matching_cpus)
  128. return PSCI_RET_INVALID_PARAMS;
  129. return PSCI_0_2_AFFINITY_LEVEL_OFF;
  130. }
  131. static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type, u64 flags)
  132. {
  133. unsigned long i;
  134. struct kvm_vcpu *tmp;
  135. /*
  136. * The KVM ABI specifies that a system event exit may call KVM_RUN
  137. * again and may perform shutdown/reboot at a later time that when the
  138. * actual request is made. Since we are implementing PSCI and a
  139. * caller of PSCI reboot and shutdown expects that the system shuts
  140. * down or reboots immediately, let's make sure that VCPUs are not run
  141. * after this call is handled and before the VCPUs have been
  142. * re-initialized.
  143. */
  144. kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
  145. spin_lock(&tmp->arch.mp_state_lock);
  146. WRITE_ONCE(tmp->arch.mp_state.mp_state, KVM_MP_STATE_STOPPED);
  147. spin_unlock(&tmp->arch.mp_state_lock);
  148. }
  149. kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
  150. memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
  151. vcpu->run->system_event.type = type;
  152. vcpu->run->system_event.ndata = 1;
  153. vcpu->run->system_event.data[0] = flags;
  154. vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
  155. }
  156. static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
  157. {
  158. kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN, 0);
  159. }
  160. static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
  161. {
  162. kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET, 0);
  163. }
  164. static void kvm_psci_system_reset2(struct kvm_vcpu *vcpu)
  165. {
  166. kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET,
  167. KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2);
  168. }
  169. static void kvm_psci_system_suspend(struct kvm_vcpu *vcpu)
  170. {
  171. struct kvm_run *run = vcpu->run;
  172. memset(&run->system_event, 0, sizeof(vcpu->run->system_event));
  173. run->system_event.type = KVM_SYSTEM_EVENT_SUSPEND;
  174. run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
  175. }
  176. static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
  177. {
  178. int i;
  179. /*
  180. * Zero the input registers' upper 32 bits. They will be fully
  181. * zeroed on exit, so we're fine changing them in place.
  182. */
  183. for (i = 1; i < 4; i++)
  184. vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
  185. }
  186. static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
  187. {
  188. /*
  189. * Prevent 32 bit guests from calling 64 bit PSCI functions.
  190. */
  191. if ((fn & PSCI_0_2_64BIT) && vcpu_mode_is_32bit(vcpu))
  192. return PSCI_RET_NOT_SUPPORTED;
  193. return 0;
  194. }
  195. static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
  196. {
  197. u32 psci_fn = smccc_get_function(vcpu);
  198. unsigned long val;
  199. int ret = 1;
  200. switch (psci_fn) {
  201. case PSCI_0_2_FN_PSCI_VERSION:
  202. /*
  203. * Bits[31:16] = Major Version = 0
  204. * Bits[15:0] = Minor Version = 2
  205. */
  206. val = KVM_ARM_PSCI_0_2;
  207. break;
  208. case PSCI_0_2_FN_CPU_SUSPEND:
  209. case PSCI_0_2_FN64_CPU_SUSPEND:
  210. val = kvm_psci_vcpu_suspend(vcpu);
  211. break;
  212. case PSCI_0_2_FN_CPU_OFF:
  213. kvm_arm_vcpu_power_off(vcpu);
  214. val = PSCI_RET_SUCCESS;
  215. break;
  216. case PSCI_0_2_FN_CPU_ON:
  217. kvm_psci_narrow_to_32bit(vcpu);
  218. fallthrough;
  219. case PSCI_0_2_FN64_CPU_ON:
  220. val = kvm_psci_vcpu_on(vcpu);
  221. break;
  222. case PSCI_0_2_FN_AFFINITY_INFO:
  223. kvm_psci_narrow_to_32bit(vcpu);
  224. fallthrough;
  225. case PSCI_0_2_FN64_AFFINITY_INFO:
  226. val = kvm_psci_vcpu_affinity_info(vcpu);
  227. break;
  228. case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
  229. /*
  230. * Trusted OS is MP hence does not require migration
  231. * or
  232. * Trusted OS is not present
  233. */
  234. val = PSCI_0_2_TOS_MP;
  235. break;
  236. case PSCI_0_2_FN_SYSTEM_OFF:
  237. kvm_psci_system_off(vcpu);
  238. /*
  239. * We shouldn't be going back to guest VCPU after
  240. * receiving SYSTEM_OFF request.
  241. *
  242. * If user space accidentally/deliberately resumes
  243. * guest VCPU after SYSTEM_OFF request then guest
  244. * VCPU should see internal failure from PSCI return
  245. * value. To achieve this, we preload r0 (or x0) with
  246. * PSCI return value INTERNAL_FAILURE.
  247. */
  248. val = PSCI_RET_INTERNAL_FAILURE;
  249. ret = 0;
  250. break;
  251. case PSCI_0_2_FN_SYSTEM_RESET:
  252. kvm_psci_system_reset(vcpu);
  253. /*
  254. * Same reason as SYSTEM_OFF for preloading r0 (or x0)
  255. * with PSCI return value INTERNAL_FAILURE.
  256. */
  257. val = PSCI_RET_INTERNAL_FAILURE;
  258. ret = 0;
  259. break;
  260. default:
  261. val = PSCI_RET_NOT_SUPPORTED;
  262. break;
  263. }
  264. smccc_set_retval(vcpu, val, 0, 0, 0);
  265. return ret;
  266. }
  267. static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)
  268. {
  269. unsigned long val = PSCI_RET_NOT_SUPPORTED;
  270. u32 psci_fn = smccc_get_function(vcpu);
  271. struct kvm *kvm = vcpu->kvm;
  272. u32 arg;
  273. int ret = 1;
  274. switch(psci_fn) {
  275. case PSCI_0_2_FN_PSCI_VERSION:
  276. val = minor == 0 ? KVM_ARM_PSCI_1_0 : KVM_ARM_PSCI_1_1;
  277. break;
  278. case PSCI_1_0_FN_PSCI_FEATURES:
  279. arg = smccc_get_arg1(vcpu);
  280. val = kvm_psci_check_allowed_function(vcpu, arg);
  281. if (val)
  282. break;
  283. val = PSCI_RET_NOT_SUPPORTED;
  284. switch(arg) {
  285. case PSCI_0_2_FN_PSCI_VERSION:
  286. case PSCI_0_2_FN_CPU_SUSPEND:
  287. case PSCI_0_2_FN64_CPU_SUSPEND:
  288. case PSCI_0_2_FN_CPU_OFF:
  289. case PSCI_0_2_FN_CPU_ON:
  290. case PSCI_0_2_FN64_CPU_ON:
  291. case PSCI_0_2_FN_AFFINITY_INFO:
  292. case PSCI_0_2_FN64_AFFINITY_INFO:
  293. case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
  294. case PSCI_0_2_FN_SYSTEM_OFF:
  295. case PSCI_0_2_FN_SYSTEM_RESET:
  296. case PSCI_1_0_FN_PSCI_FEATURES:
  297. case ARM_SMCCC_VERSION_FUNC_ID:
  298. val = 0;
  299. break;
  300. case PSCI_1_0_FN_SYSTEM_SUSPEND:
  301. case PSCI_1_0_FN64_SYSTEM_SUSPEND:
  302. if (test_bit(KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED, &kvm->arch.flags))
  303. val = 0;
  304. break;
  305. case PSCI_1_1_FN_SYSTEM_RESET2:
  306. case PSCI_1_1_FN64_SYSTEM_RESET2:
  307. if (minor >= 1)
  308. val = 0;
  309. break;
  310. }
  311. break;
  312. case PSCI_1_0_FN_SYSTEM_SUSPEND:
  313. kvm_psci_narrow_to_32bit(vcpu);
  314. fallthrough;
  315. case PSCI_1_0_FN64_SYSTEM_SUSPEND:
  316. /*
  317. * Return directly to userspace without changing the vCPU's
  318. * registers. Userspace depends on reading the SMCCC parameters
  319. * to implement SYSTEM_SUSPEND.
  320. */
  321. if (test_bit(KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED, &kvm->arch.flags)) {
  322. kvm_psci_system_suspend(vcpu);
  323. return 0;
  324. }
  325. break;
  326. case PSCI_1_1_FN_SYSTEM_RESET2:
  327. kvm_psci_narrow_to_32bit(vcpu);
  328. fallthrough;
  329. case PSCI_1_1_FN64_SYSTEM_RESET2:
  330. if (minor >= 1) {
  331. arg = smccc_get_arg1(vcpu);
  332. if (arg <= PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET ||
  333. arg >= PSCI_1_1_RESET_TYPE_VENDOR_START) {
  334. kvm_psci_system_reset2(vcpu);
  335. vcpu_set_reg(vcpu, 0, PSCI_RET_INTERNAL_FAILURE);
  336. return 0;
  337. }
  338. val = PSCI_RET_INVALID_PARAMS;
  339. break;
  340. }
  341. break;
  342. default:
  343. return kvm_psci_0_2_call(vcpu);
  344. }
  345. smccc_set_retval(vcpu, val, 0, 0, 0);
  346. return ret;
  347. }
  348. static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
  349. {
  350. u32 psci_fn = smccc_get_function(vcpu);
  351. unsigned long val;
  352. switch (psci_fn) {
  353. case KVM_PSCI_FN_CPU_OFF:
  354. kvm_arm_vcpu_power_off(vcpu);
  355. val = PSCI_RET_SUCCESS;
  356. break;
  357. case KVM_PSCI_FN_CPU_ON:
  358. val = kvm_psci_vcpu_on(vcpu);
  359. break;
  360. default:
  361. val = PSCI_RET_NOT_SUPPORTED;
  362. break;
  363. }
  364. smccc_set_retval(vcpu, val, 0, 0, 0);
  365. return 1;
  366. }
  367. /**
  368. * kvm_psci_call - handle PSCI call if r0 value is in range
  369. * @vcpu: Pointer to the VCPU struct
  370. *
  371. * Handle PSCI calls from guests through traps from HVC instructions.
  372. * The calling convention is similar to SMC calls to the secure world
  373. * where the function number is placed in r0.
  374. *
  375. * This function returns: > 0 (success), 0 (success but exit to user
  376. * space), and < 0 (errors)
  377. *
  378. * Errors:
  379. * -EINVAL: Unrecognized PSCI function
  380. */
  381. int kvm_psci_call(struct kvm_vcpu *vcpu)
  382. {
  383. u32 psci_fn = smccc_get_function(vcpu);
  384. int version = kvm_psci_version(vcpu);
  385. unsigned long val;
  386. val = kvm_psci_check_allowed_function(vcpu, psci_fn);
  387. if (val) {
  388. smccc_set_retval(vcpu, val, 0, 0, 0);
  389. return 1;
  390. }
  391. switch (version) {
  392. case KVM_ARM_PSCI_1_1:
  393. return kvm_psci_1_x_call(vcpu, 1);
  394. case KVM_ARM_PSCI_1_0:
  395. return kvm_psci_1_x_call(vcpu, 0);
  396. case KVM_ARM_PSCI_0_2:
  397. return kvm_psci_0_2_call(vcpu);
  398. case KVM_ARM_PSCI_0_1:
  399. return kvm_psci_0_1_call(vcpu);
  400. default:
  401. WARN_ONCE(1, "Unknown PSCI version %d", version);
  402. smccc_set_retval(vcpu, SMCCC_RET_NOT_SUPPORTED, 0, 0, 0);
  403. return 1;
  404. }
  405. }