sys_regs.h 6.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2012,2013 - ARM Ltd
  4. * Author: Marc Zyngier <marc.zyngier@arm.com>
  5. *
  6. * Derived from arch/arm/kvm/coproc.h
  7. * Copyright (C) 2012 - Virtual Open Systems and Columbia University
  8. * Authors: Christoffer Dall <c.dall@virtualopensystems.com>
  9. */
  10. #ifndef __ARM64_KVM_SYS_REGS_LOCAL_H__
  11. #define __ARM64_KVM_SYS_REGS_LOCAL_H__
  12. #include <linux/bsearch.h>
  13. #define reg_to_encoding(x) \
  14. sys_reg((u32)(x)->Op0, (u32)(x)->Op1, \
  15. (u32)(x)->CRn, (u32)(x)->CRm, (u32)(x)->Op2)
  16. struct sys_reg_params {
  17. u8 Op0;
  18. u8 Op1;
  19. u8 CRn;
  20. u8 CRm;
  21. u8 Op2;
  22. u64 regval;
  23. bool is_write;
  24. };
  25. #define encoding_to_params(reg) \
  26. ((struct sys_reg_params){ .Op0 = sys_reg_Op0(reg), \
  27. .Op1 = sys_reg_Op1(reg), \
  28. .CRn = sys_reg_CRn(reg), \
  29. .CRm = sys_reg_CRm(reg), \
  30. .Op2 = sys_reg_Op2(reg) })
  31. #define esr_sys64_to_params(esr) \
  32. ((struct sys_reg_params){ .Op0 = ((esr) >> 20) & 3, \
  33. .Op1 = ((esr) >> 14) & 0x7, \
  34. .CRn = ((esr) >> 10) & 0xf, \
  35. .CRm = ((esr) >> 1) & 0xf, \
  36. .Op2 = ((esr) >> 17) & 0x7, \
  37. .is_write = !((esr) & 1) })
  38. #define esr_cp1x_32_to_params(esr) \
  39. ((struct sys_reg_params){ .Op1 = ((esr) >> 14) & 0x7, \
  40. .CRn = ((esr) >> 10) & 0xf, \
  41. .CRm = ((esr) >> 1) & 0xf, \
  42. .Op2 = ((esr) >> 17) & 0x7, \
  43. .is_write = !((esr) & 1) })
  44. struct sys_reg_desc {
  45. /* Sysreg string for debug */
  46. const char *name;
  47. enum {
  48. AA32_DIRECT,
  49. AA32_LO,
  50. AA32_HI,
  51. } aarch32_map;
  52. /* MRS/MSR instruction which accesses it. */
  53. u8 Op0;
  54. u8 Op1;
  55. u8 CRn;
  56. u8 CRm;
  57. u8 Op2;
  58. /* Trapped access from guest, if non-NULL. */
  59. bool (*access)(struct kvm_vcpu *,
  60. struct sys_reg_params *,
  61. const struct sys_reg_desc *);
  62. /*
  63. * Initialization for vcpu. Return initialized value, or KVM
  64. * sanitized value for ID registers.
  65. */
  66. u64 (*reset)(struct kvm_vcpu *, const struct sys_reg_desc *);
  67. /* Index into sys_reg[], or 0 if we don't need to save it. */
  68. int reg;
  69. /* Value (usually reset value), or write mask for idregs */
  70. u64 val;
  71. /* Custom get/set_user functions, fallback to generic if NULL */
  72. int (*get_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
  73. u64 *val);
  74. int (*set_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
  75. u64 val);
  76. /* Return mask of REG_* runtime visibility overrides */
  77. unsigned int (*visibility)(const struct kvm_vcpu *vcpu,
  78. const struct sys_reg_desc *rd);
  79. };
  80. #define REG_HIDDEN (1 << 0) /* hidden from userspace and guest */
  81. #define REG_RAZ (1 << 1) /* RAZ from userspace and guest */
  82. #define REG_USER_WI (1 << 2) /* WI from userspace only */
  83. static __printf(2, 3)
  84. inline void print_sys_reg_msg(const struct sys_reg_params *p,
  85. char *fmt, ...)
  86. {
  87. va_list va;
  88. va_start(va, fmt);
  89. /* Look, we even formatted it for you to paste into the table! */
  90. kvm_pr_unimpl("%pV { Op0(%2u), Op1(%2u), CRn(%2u), CRm(%2u), Op2(%2u), func_%s },\n",
  91. &(struct va_format){ fmt, &va },
  92. p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read");
  93. va_end(va);
  94. }
  95. static inline void print_sys_reg_instr(const struct sys_reg_params *p)
  96. {
  97. /* GCC warns on an empty format string */
  98. print_sys_reg_msg(p, "%s", "");
  99. }
  100. static inline bool ignore_write(struct kvm_vcpu *vcpu,
  101. const struct sys_reg_params *p)
  102. {
  103. return true;
  104. }
  105. static inline bool read_zero(struct kvm_vcpu *vcpu,
  106. struct sys_reg_params *p)
  107. {
  108. p->regval = 0;
  109. return true;
  110. }
  111. /* Reset functions */
  112. static inline u64 reset_unknown(struct kvm_vcpu *vcpu,
  113. const struct sys_reg_desc *r)
  114. {
  115. BUG_ON(!r->reg);
  116. BUG_ON(r->reg >= NR_SYS_REGS);
  117. __vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL;
  118. return __vcpu_sys_reg(vcpu, r->reg);
  119. }
  120. static inline u64 reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
  121. {
  122. BUG_ON(!r->reg);
  123. BUG_ON(r->reg >= NR_SYS_REGS);
  124. __vcpu_sys_reg(vcpu, r->reg) = r->val;
  125. return __vcpu_sys_reg(vcpu, r->reg);
  126. }
  127. static inline unsigned int sysreg_visibility(const struct kvm_vcpu *vcpu,
  128. const struct sys_reg_desc *r)
  129. {
  130. if (likely(!r->visibility))
  131. return 0;
  132. return r->visibility(vcpu, r);
  133. }
  134. static inline bool sysreg_hidden(const struct kvm_vcpu *vcpu,
  135. const struct sys_reg_desc *r)
  136. {
  137. return sysreg_visibility(vcpu, r) & REG_HIDDEN;
  138. }
  139. static inline bool sysreg_visible_as_raz(const struct kvm_vcpu *vcpu,
  140. const struct sys_reg_desc *r)
  141. {
  142. return sysreg_visibility(vcpu, r) & REG_RAZ;
  143. }
  144. static inline bool sysreg_user_write_ignore(const struct kvm_vcpu *vcpu,
  145. const struct sys_reg_desc *r)
  146. {
  147. return sysreg_visibility(vcpu, r) & REG_USER_WI;
  148. }
  149. static inline int cmp_sys_reg(const struct sys_reg_desc *i1,
  150. const struct sys_reg_desc *i2)
  151. {
  152. BUG_ON(i1 == i2);
  153. if (!i1)
  154. return 1;
  155. else if (!i2)
  156. return -1;
  157. if (i1->Op0 != i2->Op0)
  158. return i1->Op0 - i2->Op0;
  159. if (i1->Op1 != i2->Op1)
  160. return i1->Op1 - i2->Op1;
  161. if (i1->CRn != i2->CRn)
  162. return i1->CRn - i2->CRn;
  163. if (i1->CRm != i2->CRm)
  164. return i1->CRm - i2->CRm;
  165. return i1->Op2 - i2->Op2;
  166. }
  167. static inline int match_sys_reg(const void *key, const void *elt)
  168. {
  169. const unsigned long pval = (unsigned long)key;
  170. const struct sys_reg_desc *r = elt;
  171. return pval - reg_to_encoding(r);
  172. }
  173. static inline const struct sys_reg_desc *
  174. find_reg(const struct sys_reg_params *params, const struct sys_reg_desc table[],
  175. unsigned int num)
  176. {
  177. unsigned long pval = reg_to_encoding(params);
  178. return __inline_bsearch((void *)pval, table, num, sizeof(table[0]), match_sys_reg);
  179. }
  180. const struct sys_reg_desc *get_reg_by_id(u64 id,
  181. const struct sys_reg_desc table[],
  182. unsigned int num);
  183. int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
  184. int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
  185. int kvm_sys_reg_get_user(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg,
  186. const struct sys_reg_desc table[], unsigned int num);
  187. int kvm_sys_reg_set_user(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg,
  188. const struct sys_reg_desc table[], unsigned int num);
  189. bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index);
  190. int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu);
  191. #define AA32(_x) .aarch32_map = AA32_##_x
  192. #define Op0(_x) .Op0 = _x
  193. #define Op1(_x) .Op1 = _x
  194. #define CRn(_x) .CRn = _x
  195. #define CRm(_x) .CRm = _x
  196. #define Op2(_x) .Op2 = _x
  197. #define SYS_DESC(reg) \
  198. .name = #reg, \
  199. Op0(sys_reg_Op0(reg)), Op1(sys_reg_Op1(reg)), \
  200. CRn(sys_reg_CRn(reg)), CRm(sys_reg_CRm(reg)), \
  201. Op2(sys_reg_Op2(reg))
  202. #define CP15_SYS_DESC(reg) \
  203. .name = #reg, \
  204. .aarch32_map = AA32_DIRECT, \
  205. Op0(0), Op1(sys_reg_Op1(reg)), \
  206. CRn(sys_reg_CRn(reg)), CRm(sys_reg_CRm(reg)), \
  207. Op2(sys_reg_Op2(reg))
  208. #endif /* __ARM64_KVM_SYS_REGS_LOCAL_H__ */