elf.c 9.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2014 Imagination Technologies
  4. * Author: Paul Burton <paul.burton@mips.com>
  5. */
  6. #include <linux/binfmts.h>
  7. #include <linux/elf.h>
  8. #include <linux/export.h>
  9. #include <linux/sched.h>
  10. #include <asm/cpu-features.h>
  11. #include <asm/cpu-info.h>
  12. #include <asm/fpu.h>
  13. #ifdef CONFIG_MIPS_FP_SUPPORT
  14. /* Whether to accept legacy-NaN and 2008-NaN user binaries. */
  15. bool mips_use_nan_legacy;
  16. bool mips_use_nan_2008;
  17. /* FPU modes */
  18. enum {
  19. FP_FRE,
  20. FP_FR0,
  21. FP_FR1,
  22. };
  23. /**
  24. * struct mode_req - ABI FPU mode requirements
  25. * @single: The program being loaded needs an FPU but it will only issue
  26. * single precision instructions meaning that it can execute in
  27. * either FR0 or FR1.
  28. * @soft: The soft(-float) requirement means that the program being
  29. * loaded needs has no FPU dependency at all (i.e. it has no
  30. * FPU instructions).
  31. * @fr1: The program being loaded depends on FPU being in FR=1 mode.
  32. * @frdefault: The program being loaded depends on the default FPU mode.
  33. * That is FR0 for O32 and FR1 for N32/N64.
  34. * @fre: The program being loaded depends on FPU with FRE=1. This mode is
  35. * a bridge which uses FR=1 whilst still being able to maintain
  36. * full compatibility with pre-existing code using the O32 FP32
  37. * ABI.
  38. *
  39. * More information about the FP ABIs can be found here:
  40. *
  41. * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
  42. *
  43. */
  44. struct mode_req {
  45. bool single;
  46. bool soft;
  47. bool fr1;
  48. bool frdefault;
  49. bool fre;
  50. };
  51. static const struct mode_req fpu_reqs[] = {
  52. [MIPS_ABI_FP_ANY] = { true, true, true, true, true },
  53. [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true },
  54. [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false },
  55. [MIPS_ABI_FP_SOFT] = { false, true, false, false, false },
  56. [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
  57. [MIPS_ABI_FP_XX] = { false, false, true, true, true },
  58. [MIPS_ABI_FP_64] = { false, false, true, false, false },
  59. [MIPS_ABI_FP_64A] = { false, false, true, false, true }
  60. };
  61. /*
  62. * Mode requirements when .MIPS.abiflags is not present in the ELF.
  63. * Not present means that everything is acceptable except FR1.
  64. */
  65. static struct mode_req none_req = { true, true, false, true, true };
  66. int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
  67. bool is_interp, struct arch_elf_state *state)
  68. {
  69. union {
  70. struct elf32_hdr e32;
  71. struct elf64_hdr e64;
  72. } *ehdr = _ehdr;
  73. struct elf32_phdr *phdr32 = _phdr;
  74. struct elf64_phdr *phdr64 = _phdr;
  75. struct mips_elf_abiflags_v0 abiflags;
  76. bool elf32;
  77. u32 flags;
  78. int ret;
  79. loff_t pos;
  80. elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
  81. flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
  82. /* Let's see if this is an O32 ELF */
  83. if (elf32) {
  84. if (flags & EF_MIPS_FP64) {
  85. /*
  86. * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
  87. * later if needed
  88. */
  89. if (is_interp)
  90. state->interp_fp_abi = MIPS_ABI_FP_OLD_64;
  91. else
  92. state->fp_abi = MIPS_ABI_FP_OLD_64;
  93. }
  94. if (phdr32->p_type != PT_MIPS_ABIFLAGS)
  95. return 0;
  96. if (phdr32->p_filesz < sizeof(abiflags))
  97. return -EINVAL;
  98. pos = phdr32->p_offset;
  99. } else {
  100. if (phdr64->p_type != PT_MIPS_ABIFLAGS)
  101. return 0;
  102. if (phdr64->p_filesz < sizeof(abiflags))
  103. return -EINVAL;
  104. pos = phdr64->p_offset;
  105. }
  106. ret = kernel_read(elf, &abiflags, sizeof(abiflags), &pos);
  107. if (ret < 0)
  108. return ret;
  109. if (ret != sizeof(abiflags))
  110. return -EIO;
  111. /* Record the required FP ABIs for use by mips_check_elf */
  112. if (is_interp)
  113. state->interp_fp_abi = abiflags.fp_abi;
  114. else
  115. state->fp_abi = abiflags.fp_abi;
  116. return 0;
  117. }
  118. int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
  119. struct arch_elf_state *state)
  120. {
  121. union {
  122. struct elf32_hdr e32;
  123. struct elf64_hdr e64;
  124. } *ehdr = _ehdr;
  125. union {
  126. struct elf32_hdr e32;
  127. struct elf64_hdr e64;
  128. } *iehdr = _interp_ehdr;
  129. struct mode_req prog_req, interp_req;
  130. int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
  131. bool elf32;
  132. u32 flags;
  133. elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
  134. flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags;
  135. /*
  136. * Determine the NaN personality, reject the binary if not allowed.
  137. * Also ensure that any interpreter matches the executable.
  138. */
  139. if (flags & EF_MIPS_NAN2008) {
  140. if (mips_use_nan_2008)
  141. state->nan_2008 = 1;
  142. else
  143. return -ENOEXEC;
  144. } else {
  145. if (mips_use_nan_legacy)
  146. state->nan_2008 = 0;
  147. else
  148. return -ENOEXEC;
  149. }
  150. if (has_interpreter) {
  151. bool ielf32;
  152. u32 iflags;
  153. ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32;
  154. iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags;
  155. if ((flags ^ iflags) & EF_MIPS_NAN2008)
  156. return -ELIBBAD;
  157. }
  158. if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
  159. return 0;
  160. fp_abi = state->fp_abi;
  161. if (has_interpreter) {
  162. interp_fp_abi = state->interp_fp_abi;
  163. abi0 = min(fp_abi, interp_fp_abi);
  164. abi1 = max(fp_abi, interp_fp_abi);
  165. } else {
  166. abi0 = abi1 = fp_abi;
  167. }
  168. if (elf32 && !(flags & EF_MIPS_ABI2)) {
  169. /* Default to a mode capable of running code expecting FR=0 */
  170. state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
  171. /* Allow all ABIs we know about */
  172. max_abi = MIPS_ABI_FP_64A;
  173. } else {
  174. /* MIPS64 code always uses FR=1, thus the default is easy */
  175. state->overall_fp_mode = FP_FR1;
  176. /* Disallow access to the various FPXX & FP64 ABIs */
  177. max_abi = MIPS_ABI_FP_SOFT;
  178. }
  179. if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
  180. (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
  181. return -ELIBBAD;
  182. /* It's time to determine the FPU mode requirements */
  183. prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
  184. interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
  185. /*
  186. * Check whether the program's and interp's ABIs have a matching FPU
  187. * mode requirement.
  188. */
  189. prog_req.single = interp_req.single && prog_req.single;
  190. prog_req.soft = interp_req.soft && prog_req.soft;
  191. prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
  192. prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
  193. prog_req.fre = interp_req.fre && prog_req.fre;
  194. /*
  195. * Determine the desired FPU mode
  196. *
  197. * Decision making:
  198. *
  199. * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This
  200. * means that we have a combination of program and interpreter
  201. * that inherently require the hybrid FP mode.
  202. * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
  203. * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
  204. * instructions so we don't care about the mode. We will simply use
  205. * the one preferred by the hardware. In fpxx case, that ABI can
  206. * handle both FR=1 and FR=0, so, again, we simply choose the one
  207. * preferred by the hardware. Next, if we only use single-precision
  208. * FPU instructions, and the default ABI FPU mode is not good
  209. * (ie single + any ABI combination), we set again the FPU mode to the
  210. * one is preferred by the hardware. Next, if we know that the code
  211. * will only use single-precision instructions, shown by single being
  212. * true but frdefault being false, then we again set the FPU mode to
  213. * the one that is preferred by the hardware.
  214. * - We want FP_FR1 if that's the only matching mode and the default one
  215. * is not good.
  216. * - Return with -ELIBADD if we can't find a matching FPU mode.
  217. */
  218. if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
  219. state->overall_fp_mode = FP_FRE;
  220. else if ((prog_req.fr1 && prog_req.frdefault) ||
  221. (prog_req.single && !prog_req.frdefault))
  222. /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
  223. state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
  224. cpu_has_mips_r2_r6) ?
  225. FP_FR1 : FP_FR0;
  226. else if (prog_req.fr1)
  227. state->overall_fp_mode = FP_FR1;
  228. else if (!prog_req.fre && !prog_req.frdefault &&
  229. !prog_req.fr1 && !prog_req.single && !prog_req.soft)
  230. return -ELIBBAD;
  231. return 0;
  232. }
  233. static inline void set_thread_fp_mode(int hybrid, int regs32)
  234. {
  235. if (hybrid)
  236. set_thread_flag(TIF_HYBRID_FPREGS);
  237. else
  238. clear_thread_flag(TIF_HYBRID_FPREGS);
  239. if (regs32)
  240. set_thread_flag(TIF_32BIT_FPREGS);
  241. else
  242. clear_thread_flag(TIF_32BIT_FPREGS);
  243. }
  244. void mips_set_personality_fp(struct arch_elf_state *state)
  245. {
  246. /*
  247. * This function is only ever called for O32 ELFs so we should
  248. * not be worried about N32/N64 binaries.
  249. */
  250. if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
  251. return;
  252. switch (state->overall_fp_mode) {
  253. case FP_FRE:
  254. set_thread_fp_mode(1, 0);
  255. break;
  256. case FP_FR0:
  257. set_thread_fp_mode(0, 1);
  258. break;
  259. case FP_FR1:
  260. set_thread_fp_mode(0, 0);
  261. break;
  262. default:
  263. BUG();
  264. }
  265. }
  266. /*
  267. * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode
  268. * in FCSR according to the ELF NaN personality.
  269. */
  270. void mips_set_personality_nan(struct arch_elf_state *state)
  271. {
  272. struct cpuinfo_mips *c = &boot_cpu_data;
  273. struct task_struct *t = current;
  274. /* Do this early so t->thread.fpu.fcr31 won't be clobbered in case
  275. * we are preempted before the lose_fpu(0) in start_thread.
  276. */
  277. lose_fpu(0);
  278. t->thread.fpu.fcr31 = c->fpu_csr31;
  279. switch (state->nan_2008) {
  280. case 0:
  281. if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
  282. t->thread.fpu.fcr31 &= ~FPU_CSR_NAN2008;
  283. if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
  284. t->thread.fpu.fcr31 &= ~FPU_CSR_ABS2008;
  285. break;
  286. case 1:
  287. if (!(c->fpu_msk31 & FPU_CSR_NAN2008))
  288. t->thread.fpu.fcr31 |= FPU_CSR_NAN2008;
  289. if (!(c->fpu_msk31 & FPU_CSR_ABS2008))
  290. t->thread.fpu.fcr31 |= FPU_CSR_ABS2008;
  291. break;
  292. default:
  293. BUG();
  294. }
  295. }
  296. #endif /* CONFIG_MIPS_FP_SUPPORT */
  297. int mips_elf_read_implies_exec(void *elf_ex, int exstack)
  298. {
  299. /*
  300. * Set READ_IMPLIES_EXEC only on non-NX systems that
  301. * do not request a specific state via PT_GNU_STACK.
  302. */
  303. return (!cpu_has_rixi && exstack == EXSTACK_DEFAULT);
  304. }
  305. EXPORT_SYMBOL(mips_elf_read_implies_exec);