registers.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
  4. */
  5. #ifndef _ASM_NIOS2_REGISTERS_H
  6. #define _ASM_NIOS2_REGISTERS_H
  7. #ifndef __ASSEMBLY__
  8. #include <asm/cpuinfo.h>
  9. #endif
  10. /* control register numbers */
  11. #define CTL_FSTATUS 0
  12. #define CTL_ESTATUS 1
  13. #define CTL_BSTATUS 2
  14. #define CTL_IENABLE 3
  15. #define CTL_IPENDING 4
  16. #define CTL_CPUID 5
  17. #define CTL_RSV1 6
  18. #define CTL_EXCEPTION 7
  19. #define CTL_PTEADDR 8
  20. #define CTL_TLBACC 9
  21. #define CTL_TLBMISC 10
  22. #define CTL_RSV2 11
  23. #define CTL_BADADDR 12
  24. #define CTL_CONFIG 13
  25. #define CTL_MPUBASE 14
  26. #define CTL_MPUACC 15
  27. /* access control registers using GCC builtins */
  28. #define RDCTL(r) __builtin_rdctl(r)
  29. #define WRCTL(r, v) __builtin_wrctl(r, v)
  30. /* status register bits */
  31. #define STATUS_PIE (1 << 0) /* processor interrupt enable */
  32. #define STATUS_U (1 << 1) /* user mode */
  33. #define STATUS_EH (1 << 2) /* Exception mode */
  34. /* estatus register bits */
  35. #define ESTATUS_EPIE (1 << 0) /* processor interrupt enable */
  36. #define ESTATUS_EU (1 << 1) /* user mode */
  37. #define ESTATUS_EH (1 << 2) /* Exception mode */
  38. /* tlbmisc register bits */
  39. #define TLBMISC_PID_SHIFT 4
  40. #ifndef __ASSEMBLY__
  41. #define TLBMISC_PID_MASK ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
  42. #endif
  43. #define TLBMISC_WAY_MASK 0xf
  44. #define TLBMISC_WAY_SHIFT 20
  45. #define TLBMISC_PID (TLBMISC_PID_MASK << TLBMISC_PID_SHIFT) /* TLB PID */
  46. #define TLBMISC_WE (1 << 18) /* TLB write enable */
  47. #define TLBMISC_RD (1 << 19) /* TLB read */
  48. #define TLBMISC_WAY (TLBMISC_WAY_MASK << TLBMISC_WAY_SHIFT) /* TLB way */
  49. #endif /* _ASM_NIOS2_REGISTERS_H */