irq.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Code to handle x86 style IRQs plus some generic interrupt stuff.
  4. *
  5. * Copyright (C) 1992 Linus Torvalds
  6. * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
  7. * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
  8. * Copyright (C) 1999-2000 Grant Grundler
  9. * Copyright (c) 2005 Matthew Wilcox
  10. */
  11. #include <linux/bitops.h>
  12. #include <linux/errno.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/kernel_stat.h>
  16. #include <linux/seq_file.h>
  17. #include <linux/types.h>
  18. #include <linux/sched/task_stack.h>
  19. #include <asm/io.h>
  20. #include <asm/softirq_stack.h>
  21. #include <asm/smp.h>
  22. #include <asm/ldcw.h>
  23. #undef PARISC_IRQ_CR16_COUNTS
  24. #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
  25. /* Bits in EIEM correlate with cpu_irq_action[].
  26. ** Numbered *Big Endian*! (ie bit 0 is MSB)
  27. */
  28. static volatile unsigned long cpu_eiem = 0;
  29. /*
  30. ** local ACK bitmap ... habitually set to 1, but reset to zero
  31. ** between ->ack() and ->end() of the interrupt to prevent
  32. ** re-interruption of a processing interrupt.
  33. */
  34. static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
  35. static void cpu_mask_irq(struct irq_data *d)
  36. {
  37. unsigned long eirr_bit = EIEM_MASK(d->irq);
  38. cpu_eiem &= ~eirr_bit;
  39. /* Do nothing on the other CPUs. If they get this interrupt,
  40. * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't
  41. * handle it, and the set_eiem() at the bottom will ensure it
  42. * then gets disabled */
  43. }
  44. static void __cpu_unmask_irq(unsigned int irq)
  45. {
  46. unsigned long eirr_bit = EIEM_MASK(irq);
  47. cpu_eiem |= eirr_bit;
  48. /* This is just a simple NOP IPI. But what it does is cause
  49. * all the other CPUs to do a set_eiem(cpu_eiem) at the end
  50. * of the interrupt handler */
  51. smp_send_all_nop();
  52. }
  53. static void cpu_unmask_irq(struct irq_data *d)
  54. {
  55. __cpu_unmask_irq(d->irq);
  56. }
  57. void cpu_ack_irq(struct irq_data *d)
  58. {
  59. unsigned long mask = EIEM_MASK(d->irq);
  60. int cpu = smp_processor_id();
  61. /* Clear in EIEM so we can no longer process */
  62. per_cpu(local_ack_eiem, cpu) &= ~mask;
  63. /* disable the interrupt */
  64. set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
  65. /* and now ack it */
  66. mtctl(mask, 23);
  67. }
  68. void cpu_eoi_irq(struct irq_data *d)
  69. {
  70. unsigned long mask = EIEM_MASK(d->irq);
  71. int cpu = smp_processor_id();
  72. /* set it in the eiems---it's no longer in process */
  73. per_cpu(local_ack_eiem, cpu) |= mask;
  74. /* enable the interrupt */
  75. set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
  76. }
  77. #ifdef CONFIG_SMP
  78. int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
  79. {
  80. int cpu_dest;
  81. /* timer and ipi have to always be received on all CPUs */
  82. if (irqd_is_per_cpu(d))
  83. return -EINVAL;
  84. cpu_dest = cpumask_first_and(dest, cpu_online_mask);
  85. if (cpu_dest >= nr_cpu_ids)
  86. cpu_dest = cpumask_first(cpu_online_mask);
  87. return cpu_dest;
  88. }
  89. #endif
  90. static struct irq_chip cpu_interrupt_type = {
  91. .name = "CPU",
  92. .irq_mask = cpu_mask_irq,
  93. .irq_unmask = cpu_unmask_irq,
  94. .irq_ack = cpu_ack_irq,
  95. .irq_eoi = cpu_eoi_irq,
  96. /* XXX: Needs to be written. We managed without it so far, but
  97. * we really ought to write it.
  98. */
  99. .irq_retrigger = NULL,
  100. };
  101. DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
  102. #define irq_stats(x) (&per_cpu(irq_stat, x))
  103. /*
  104. * /proc/interrupts printing for arch specific interrupts
  105. */
  106. int arch_show_interrupts(struct seq_file *p, int prec)
  107. {
  108. int j;
  109. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  110. seq_printf(p, "%*s: ", prec, "STK");
  111. for_each_online_cpu(j)
  112. seq_printf(p, "%10u ", irq_stats(j)->kernel_stack_usage);
  113. seq_puts(p, " Kernel stack usage\n");
  114. # ifdef CONFIG_IRQSTACKS
  115. seq_printf(p, "%*s: ", prec, "IST");
  116. for_each_online_cpu(j)
  117. seq_printf(p, "%10u ", irq_stats(j)->irq_stack_usage);
  118. seq_puts(p, " Interrupt stack usage\n");
  119. # endif
  120. #endif
  121. #ifdef CONFIG_SMP
  122. if (num_online_cpus() > 1) {
  123. seq_printf(p, "%*s: ", prec, "RES");
  124. for_each_online_cpu(j)
  125. seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
  126. seq_puts(p, " Rescheduling interrupts\n");
  127. seq_printf(p, "%*s: ", prec, "CAL");
  128. for_each_online_cpu(j)
  129. seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
  130. seq_puts(p, " Function call interrupts\n");
  131. }
  132. #endif
  133. seq_printf(p, "%*s: ", prec, "UAH");
  134. for_each_online_cpu(j)
  135. seq_printf(p, "%10u ", irq_stats(j)->irq_unaligned_count);
  136. seq_puts(p, " Unaligned access handler traps\n");
  137. seq_printf(p, "%*s: ", prec, "FPA");
  138. for_each_online_cpu(j)
  139. seq_printf(p, "%10u ", irq_stats(j)->irq_fpassist_count);
  140. seq_puts(p, " Floating point assist traps\n");
  141. seq_printf(p, "%*s: ", prec, "TLB");
  142. for_each_online_cpu(j)
  143. seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
  144. seq_puts(p, " TLB shootdowns\n");
  145. return 0;
  146. }
  147. int show_interrupts(struct seq_file *p, void *v)
  148. {
  149. int i = *(loff_t *) v, j;
  150. unsigned long flags;
  151. if (i == 0) {
  152. seq_puts(p, " ");
  153. for_each_online_cpu(j)
  154. seq_printf(p, " CPU%d", j);
  155. #ifdef PARISC_IRQ_CR16_COUNTS
  156. seq_printf(p, " [min/avg/max] (CPU cycle counts)");
  157. #endif
  158. seq_putc(p, '\n');
  159. }
  160. if (i < NR_IRQS) {
  161. struct irq_desc *desc = irq_to_desc(i);
  162. struct irqaction *action;
  163. raw_spin_lock_irqsave(&desc->lock, flags);
  164. action = desc->action;
  165. if (!action)
  166. goto skip;
  167. seq_printf(p, "%3d: ", i);
  168. for_each_online_cpu(j)
  169. seq_printf(p, "%10u ", irq_desc_kstat_cpu(desc, j));
  170. seq_printf(p, " %14s", irq_desc_get_chip(desc)->name);
  171. #ifndef PARISC_IRQ_CR16_COUNTS
  172. seq_printf(p, " %s", action->name);
  173. while ((action = action->next))
  174. seq_printf(p, ", %s", action->name);
  175. #else
  176. for ( ;action; action = action->next) {
  177. unsigned int k, avg, min, max;
  178. min = max = action->cr16_hist[0];
  179. for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
  180. int hist = action->cr16_hist[k];
  181. if (hist) {
  182. avg += hist;
  183. } else
  184. break;
  185. if (hist > max) max = hist;
  186. if (hist < min) min = hist;
  187. }
  188. avg /= k;
  189. seq_printf(p, " %s[%d/%d/%d]", action->name,
  190. min,avg,max);
  191. }
  192. #endif
  193. seq_putc(p, '\n');
  194. skip:
  195. raw_spin_unlock_irqrestore(&desc->lock, flags);
  196. }
  197. if (i == NR_IRQS)
  198. arch_show_interrupts(p, 3);
  199. return 0;
  200. }
  201. /*
  202. ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
  203. ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
  204. **
  205. ** To use txn_XXX() interfaces, get a Virtual IRQ first.
  206. ** Then use that to get the Transaction address and data.
  207. */
  208. int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
  209. {
  210. if (irq_has_action(irq))
  211. return -EBUSY;
  212. if (irq_get_chip(irq) != &cpu_interrupt_type)
  213. return -EBUSY;
  214. /* for iosapic interrupts */
  215. if (type) {
  216. irq_set_chip_and_handler(irq, type, handle_percpu_irq);
  217. irq_set_chip_data(irq, data);
  218. __cpu_unmask_irq(irq);
  219. }
  220. return 0;
  221. }
  222. int txn_claim_irq(int irq)
  223. {
  224. return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
  225. }
  226. /*
  227. * The bits_wide parameter accommodates the limitations of the HW/SW which
  228. * use these bits:
  229. * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
  230. * V-class (EPIC): 6 bits
  231. * N/L/A-class (iosapic): 8 bits
  232. * PCI 2.2 MSI: 16 bits
  233. * Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric)
  234. *
  235. * On the service provider side:
  236. * o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
  237. * o PA 2.0 wide mode 6-bits (per processor)
  238. * o IA64 8-bits (0-256 total)
  239. *
  240. * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
  241. * by the processor...and the N/L-class I/O subsystem supports more bits than
  242. * PA2.0 has. The first case is the problem.
  243. */
  244. int txn_alloc_irq(unsigned int bits_wide)
  245. {
  246. int irq;
  247. /* never return irq 0 cause that's the interval timer */
  248. for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
  249. if (cpu_claim_irq(irq, NULL, NULL) < 0)
  250. continue;
  251. if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
  252. continue;
  253. return irq;
  254. }
  255. /* unlikely, but be prepared */
  256. return -1;
  257. }
  258. unsigned long txn_affinity_addr(unsigned int irq, int cpu)
  259. {
  260. #ifdef CONFIG_SMP
  261. struct irq_data *d = irq_get_irq_data(irq);
  262. irq_data_update_affinity(d, cpumask_of(cpu));
  263. #endif
  264. return per_cpu(cpu_data, cpu).txn_addr;
  265. }
  266. unsigned long txn_alloc_addr(unsigned int virt_irq)
  267. {
  268. static int next_cpu = -1;
  269. next_cpu++; /* assign to "next" CPU we want this bugger on */
  270. /* validate entry */
  271. while ((next_cpu < nr_cpu_ids) &&
  272. (!per_cpu(cpu_data, next_cpu).txn_addr ||
  273. !cpu_online(next_cpu)))
  274. next_cpu++;
  275. if (next_cpu >= nr_cpu_ids)
  276. next_cpu = 0; /* nothing else, assign monarch */
  277. return txn_affinity_addr(virt_irq, next_cpu);
  278. }
  279. unsigned int txn_alloc_data(unsigned int virt_irq)
  280. {
  281. return virt_irq - CPU_IRQ_BASE;
  282. }
  283. static inline int eirr_to_irq(unsigned long eirr)
  284. {
  285. int bit = fls_long(eirr);
  286. return (BITS_PER_LONG - bit) + TIMER_IRQ;
  287. }
  288. #ifdef CONFIG_IRQSTACKS
  289. /*
  290. * IRQ STACK - used for irq handler
  291. */
  292. #ifdef CONFIG_64BIT
  293. #define IRQ_STACK_SIZE (4096 << 4) /* 64k irq stack size */
  294. #else
  295. #define IRQ_STACK_SIZE (4096 << 3) /* 32k irq stack size */
  296. #endif
  297. union irq_stack_union {
  298. unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
  299. volatile unsigned int slock[4];
  300. volatile unsigned int lock[1];
  301. };
  302. static DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
  303. .slock = { 1,1,1,1 },
  304. };
  305. #endif
  306. int sysctl_panic_on_stackoverflow = 1;
  307. static inline void stack_overflow_check(struct pt_regs *regs)
  308. {
  309. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  310. #define STACK_MARGIN (256*6)
  311. unsigned long stack_start = (unsigned long) task_stack_page(current);
  312. unsigned long sp = regs->gr[30];
  313. unsigned long stack_usage;
  314. unsigned int *last_usage;
  315. int cpu = smp_processor_id();
  316. /* if sr7 != 0, we interrupted a userspace process which we do not want
  317. * to check for stack overflow. We will only check the kernel stack. */
  318. if (regs->sr[7])
  319. return;
  320. /* exit if already in panic */
  321. if (sysctl_panic_on_stackoverflow < 0)
  322. return;
  323. /* calculate kernel stack usage */
  324. stack_usage = sp - stack_start;
  325. #ifdef CONFIG_IRQSTACKS
  326. if (likely(stack_usage <= THREAD_SIZE))
  327. goto check_kernel_stack; /* found kernel stack */
  328. /* check irq stack usage */
  329. stack_start = (unsigned long) &per_cpu(irq_stack_union, cpu).stack;
  330. stack_usage = sp - stack_start;
  331. last_usage = &per_cpu(irq_stat.irq_stack_usage, cpu);
  332. if (unlikely(stack_usage > *last_usage))
  333. *last_usage = stack_usage;
  334. if (likely(stack_usage < (IRQ_STACK_SIZE - STACK_MARGIN)))
  335. return;
  336. pr_emerg("stackcheck: %s will most likely overflow irq stack "
  337. "(sp:%lx, stk bottom-top:%lx-%lx)\n",
  338. current->comm, sp, stack_start, stack_start + IRQ_STACK_SIZE);
  339. goto panic_check;
  340. check_kernel_stack:
  341. #endif
  342. /* check kernel stack usage */
  343. last_usage = &per_cpu(irq_stat.kernel_stack_usage, cpu);
  344. if (unlikely(stack_usage > *last_usage))
  345. *last_usage = stack_usage;
  346. if (likely(stack_usage < (THREAD_SIZE - STACK_MARGIN)))
  347. return;
  348. pr_emerg("stackcheck: %s will most likely overflow kernel stack "
  349. "(sp:%lx, stk bottom-top:%lx-%lx)\n",
  350. current->comm, sp, stack_start, stack_start + THREAD_SIZE);
  351. #ifdef CONFIG_IRQSTACKS
  352. panic_check:
  353. #endif
  354. if (sysctl_panic_on_stackoverflow) {
  355. sysctl_panic_on_stackoverflow = -1; /* disable further checks */
  356. panic("low stack detected by irq handler - check messages\n");
  357. }
  358. #endif
  359. }
  360. #ifdef CONFIG_IRQSTACKS
  361. /* in entry.S: */
  362. void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
  363. static void execute_on_irq_stack(void *func, unsigned long param1)
  364. {
  365. union irq_stack_union *union_ptr;
  366. unsigned long irq_stack;
  367. volatile unsigned int *irq_stack_in_use;
  368. union_ptr = &per_cpu(irq_stack_union, smp_processor_id());
  369. irq_stack = (unsigned long) &union_ptr->stack;
  370. irq_stack = ALIGN(irq_stack + sizeof(irq_stack_union.slock),
  371. FRAME_ALIGN); /* align for stack frame usage */
  372. /* We may be called recursive. If we are already using the irq stack,
  373. * just continue to use it. Use spinlocks to serialize
  374. * the irq stack usage.
  375. */
  376. irq_stack_in_use = (volatile unsigned int *)__ldcw_align(union_ptr);
  377. if (!__ldcw(irq_stack_in_use)) {
  378. void (*direct_call)(unsigned long p1) = func;
  379. /* We are using the IRQ stack already.
  380. * Do direct call on current stack. */
  381. direct_call(param1);
  382. return;
  383. }
  384. /* This is where we switch to the IRQ stack. */
  385. call_on_stack(param1, func, irq_stack);
  386. /* free up irq stack usage. */
  387. *irq_stack_in_use = 1;
  388. }
  389. #ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
  390. void do_softirq_own_stack(void)
  391. {
  392. execute_on_irq_stack(__do_softirq, 0);
  393. }
  394. #endif
  395. #endif /* CONFIG_IRQSTACKS */
  396. /* ONLY called from entry.S:intr_extint() */
  397. asmlinkage void do_cpu_irq_mask(struct pt_regs *regs)
  398. {
  399. struct pt_regs *old_regs;
  400. unsigned long eirr_val;
  401. int irq, cpu = smp_processor_id();
  402. struct irq_data *irq_data;
  403. #ifdef CONFIG_SMP
  404. cpumask_t dest;
  405. #endif
  406. old_regs = set_irq_regs(regs);
  407. local_irq_disable();
  408. irq_enter_rcu();
  409. eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu);
  410. if (!eirr_val)
  411. goto set_out;
  412. irq = eirr_to_irq(eirr_val);
  413. irq_data = irq_get_irq_data(irq);
  414. /* Filter out spurious interrupts, mostly from serial port at bootup */
  415. if (unlikely(!irq_desc_has_action(irq_data_to_desc(irq_data))))
  416. goto set_out;
  417. #ifdef CONFIG_SMP
  418. cpumask_copy(&dest, irq_data_get_affinity_mask(irq_data));
  419. if (irqd_is_per_cpu(irq_data) &&
  420. !cpumask_test_cpu(smp_processor_id(), &dest)) {
  421. int cpu = cpumask_first(&dest);
  422. printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
  423. irq, smp_processor_id(), cpu);
  424. gsc_writel(irq + CPU_IRQ_BASE,
  425. per_cpu(cpu_data, cpu).hpa);
  426. goto set_out;
  427. }
  428. #endif
  429. stack_overflow_check(regs);
  430. #ifdef CONFIG_IRQSTACKS
  431. execute_on_irq_stack(&generic_handle_irq, irq);
  432. #else
  433. generic_handle_irq(irq);
  434. #endif /* CONFIG_IRQSTACKS */
  435. out:
  436. irq_exit_rcu();
  437. set_irq_regs(old_regs);
  438. return;
  439. set_out:
  440. set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
  441. goto out;
  442. }
  443. static void claim_cpu_irqs(void)
  444. {
  445. unsigned long flags = IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL;
  446. int i;
  447. for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
  448. irq_set_chip_and_handler(i, &cpu_interrupt_type,
  449. handle_percpu_irq);
  450. }
  451. irq_set_handler(TIMER_IRQ, handle_percpu_irq);
  452. if (request_irq(TIMER_IRQ, timer_interrupt, flags, "timer", NULL))
  453. pr_err("Failed to register timer interrupt\n");
  454. #ifdef CONFIG_SMP
  455. irq_set_handler(IPI_IRQ, handle_percpu_irq);
  456. if (request_irq(IPI_IRQ, ipi_interrupt, IRQF_PERCPU, "IPI", NULL))
  457. pr_err("Failed to register IPI interrupt\n");
  458. #endif
  459. }
  460. void init_IRQ(void)
  461. {
  462. local_irq_disable(); /* PARANOID - should already be disabled */
  463. mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
  464. #ifdef CONFIG_SMP
  465. if (!cpu_eiem) {
  466. claim_cpu_irqs();
  467. cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
  468. }
  469. #else
  470. claim_cpu_irqs();
  471. cpu_eiem = EIEM_MASK(TIMER_IRQ);
  472. #endif
  473. set_eiem(cpu_eiem); /* EIEM : enable all external intr */
  474. }