processor.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Initial setup-routines for HP 9000 based hardware.
  4. *
  5. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  6. * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
  7. * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
  8. * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
  9. * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
  10. * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
  11. *
  12. * Initial PA-RISC Version: 04-23-1999 by Helge Deller
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/init.h>
  16. #include <linux/mm.h>
  17. #include <linux/module.h>
  18. #include <linux/seq_file.h>
  19. #include <linux/random.h>
  20. #include <linux/slab.h>
  21. #include <linux/cpu.h>
  22. #include <asm/topology.h>
  23. #include <asm/param.h>
  24. #include <asm/cache.h>
  25. #include <asm/hardware.h> /* for register_parisc_driver() stuff */
  26. #include <asm/processor.h>
  27. #include <asm/page.h>
  28. #include <asm/pdc.h>
  29. #include <asm/smp.h>
  30. #include <asm/pdcpat.h>
  31. #include <asm/irq.h> /* for struct irq_region */
  32. #include <asm/parisc-device.h>
  33. struct system_cpuinfo_parisc boot_cpu_data __ro_after_init;
  34. EXPORT_SYMBOL(boot_cpu_data);
  35. #ifdef CONFIG_PA8X00
  36. int _parisc_requires_coherency __ro_after_init;
  37. EXPORT_SYMBOL(_parisc_requires_coherency);
  38. #endif
  39. DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
  40. /*
  41. ** PARISC CPU driver - claim "device" and initialize CPU data structures.
  42. **
  43. ** Consolidate per CPU initialization into (mostly) one module.
  44. ** Monarch CPU will initialize boot_cpu_data which shouldn't
  45. ** change once the system has booted.
  46. **
  47. ** The callback *should* do per-instance initialization of
  48. ** everything including the monarch. "Per CPU" init code in
  49. ** setup.c:start_parisc() has migrated here and start_parisc()
  50. ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
  51. **
  52. ** The goal of consolidating CPU initialization into one place is
  53. ** to make sure all CPUs get initialized the same way.
  54. ** The code path not shared is how PDC hands control of the CPU to the OS.
  55. ** The initialization of OS data structures is the same (done below).
  56. */
  57. /**
  58. * init_percpu_prof - enable/setup per cpu profiling hooks.
  59. * @cpunum: The processor instance.
  60. *
  61. * FIXME: doesn't do much yet...
  62. */
  63. static void
  64. init_percpu_prof(unsigned long cpunum)
  65. {
  66. }
  67. /**
  68. * processor_probe - Determine if processor driver should claim this device.
  69. * @dev: The device which has been found.
  70. *
  71. * Determine if processor driver should claim this chip (return 0) or not
  72. * (return 1). If so, initialize the chip and tell other partners in crime
  73. * they have work to do.
  74. */
  75. static int __init processor_probe(struct parisc_device *dev)
  76. {
  77. unsigned long txn_addr;
  78. unsigned long cpuid;
  79. struct cpuinfo_parisc *p;
  80. struct pdc_pat_cpu_num cpu_info = { };
  81. #ifdef CONFIG_SMP
  82. if (num_online_cpus() >= nr_cpu_ids) {
  83. printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
  84. return 1;
  85. }
  86. #else
  87. if (boot_cpu_data.cpu_count > 0) {
  88. printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
  89. return 1;
  90. }
  91. #endif
  92. /* logical CPU ID and update global counter
  93. * May get overwritten by PAT code.
  94. */
  95. cpuid = boot_cpu_data.cpu_count;
  96. txn_addr = dev->hpa.start; /* for legacy PDC */
  97. cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
  98. #ifdef CONFIG_64BIT
  99. if (is_pdc_pat()) {
  100. ulong status;
  101. unsigned long bytecnt;
  102. pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
  103. pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
  104. if (!pa_pdc_cell)
  105. panic("couldn't allocate memory for PDC_PAT_CELL!");
  106. status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
  107. dev->mod_index, PA_VIEW, pa_pdc_cell);
  108. BUG_ON(PDC_OK != status);
  109. /* verify it's the same as what do_pat_inventory() found */
  110. BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
  111. BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
  112. txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
  113. kfree(pa_pdc_cell);
  114. /* get the cpu number */
  115. status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
  116. BUG_ON(PDC_OK != status);
  117. pr_info("Logical CPU #%lu is physical cpu #%lu at location "
  118. "0x%lx with hpa %pa\n",
  119. cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
  120. &dev->hpa.start);
  121. #undef USE_PAT_CPUID
  122. #ifdef USE_PAT_CPUID
  123. /* We need contiguous numbers for cpuid. Firmware's notion
  124. * of cpuid is for physical CPUs and we just don't care yet.
  125. * We'll care when we need to query PAT PDC about a CPU *after*
  126. * boot time (ie shutdown a CPU from an OS perspective).
  127. */
  128. if (cpu_info.cpu_num >= NR_CPUS) {
  129. printk(KERN_WARNING "IGNORING CPU at %pa,"
  130. " cpu_slot_id > NR_CPUS"
  131. " (%ld > %d)\n",
  132. &dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
  133. /* Ignore CPU since it will only crash */
  134. boot_cpu_data.cpu_count--;
  135. return 1;
  136. } else {
  137. cpuid = cpu_info.cpu_num;
  138. }
  139. #endif
  140. }
  141. #endif
  142. p = &per_cpu(cpu_data, cpuid);
  143. boot_cpu_data.cpu_count++;
  144. /* initialize counters - CPU 0 gets it_value set in time_init() */
  145. if (cpuid)
  146. memset(p, 0, sizeof(struct cpuinfo_parisc));
  147. p->dev = dev; /* Save IODC data in case we need it */
  148. p->hpa = dev->hpa.start; /* save CPU hpa */
  149. p->cpuid = cpuid; /* save CPU id */
  150. p->txn_addr = txn_addr; /* save CPU IRQ address */
  151. p->cpu_num = cpu_info.cpu_num;
  152. p->cpu_loc = cpu_info.cpu_loc;
  153. store_cpu_topology(cpuid);
  154. #ifdef CONFIG_SMP
  155. /*
  156. ** FIXME: review if any other initialization is clobbered
  157. ** for boot_cpu by the above memset().
  158. */
  159. init_percpu_prof(cpuid);
  160. #endif
  161. /*
  162. ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
  163. ** OS control. RENDEZVOUS is the default state - see mem_set above.
  164. ** p->state = STATE_RENDEZVOUS;
  165. */
  166. #if 0
  167. /* CPU 0 IRQ table is statically allocated/initialized */
  168. if (cpuid) {
  169. struct irqaction actions[];
  170. /*
  171. ** itimer and ipi IRQ handlers are statically initialized in
  172. ** arch/parisc/kernel/irq.c. ie Don't need to register them.
  173. */
  174. actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
  175. if (!actions) {
  176. /* not getting it's own table, share with monarch */
  177. actions = cpu_irq_actions[0];
  178. }
  179. cpu_irq_actions[cpuid] = actions;
  180. }
  181. #endif
  182. /*
  183. * Bring this CPU up now! (ignore bootstrap cpuid == 0)
  184. */
  185. #ifdef CONFIG_SMP
  186. if (cpuid) {
  187. set_cpu_present(cpuid, true);
  188. add_cpu(cpuid);
  189. }
  190. #endif
  191. return 0;
  192. }
  193. /**
  194. * collect_boot_cpu_data - Fill the boot_cpu_data structure.
  195. *
  196. * This function collects and stores the generic processor information
  197. * in the boot_cpu_data structure.
  198. */
  199. void __init collect_boot_cpu_data(void)
  200. {
  201. unsigned long cr16_seed;
  202. char orig_prod_num[64], current_prod_num[64], serial_no[64];
  203. memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
  204. cr16_seed = get_cycles();
  205. add_device_randomness(&cr16_seed, sizeof(cr16_seed));
  206. boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
  207. /* get CPU-Model Information... */
  208. #define p ((unsigned long *)&boot_cpu_data.pdc.model)
  209. if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
  210. printk(KERN_INFO
  211. "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
  212. p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9]);
  213. add_device_randomness(&boot_cpu_data.pdc.model,
  214. sizeof(boot_cpu_data.pdc.model));
  215. }
  216. #undef p
  217. if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
  218. printk(KERN_INFO "vers %08lx\n",
  219. boot_cpu_data.pdc.versions);
  220. add_device_randomness(&boot_cpu_data.pdc.versions,
  221. sizeof(boot_cpu_data.pdc.versions));
  222. }
  223. if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
  224. printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
  225. (boot_cpu_data.pdc.cpuid >> 5) & 127,
  226. boot_cpu_data.pdc.cpuid & 31,
  227. boot_cpu_data.pdc.cpuid);
  228. add_device_randomness(&boot_cpu_data.pdc.cpuid,
  229. sizeof(boot_cpu_data.pdc.cpuid));
  230. }
  231. if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
  232. printk(KERN_INFO "capabilities 0x%lx\n",
  233. boot_cpu_data.pdc.capabilities);
  234. if (pdc_model_sysmodel(OS_ID_HPUX, boot_cpu_data.pdc.sys_model_name) == PDC_OK)
  235. pr_info("HP-UX model name: %s\n",
  236. boot_cpu_data.pdc.sys_model_name);
  237. serial_no[0] = 0;
  238. if (pdc_model_sysmodel(OS_ID_MPEXL, serial_no) == PDC_OK &&
  239. serial_no[0])
  240. pr_info("MPE/iX model name: %s\n", serial_no);
  241. dump_stack_set_arch_desc("%s", boot_cpu_data.pdc.sys_model_name);
  242. boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
  243. boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
  244. boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
  245. boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
  246. boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
  247. #ifdef CONFIG_PA8X00
  248. _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
  249. (boot_cpu_data.cpu_type == mako2);
  250. #endif
  251. if (pdc_model_platform_info(orig_prod_num, current_prod_num, serial_no) == PDC_OK) {
  252. printk(KERN_INFO "product %s, original product %s, S/N: %s\n",
  253. current_prod_num[0] ? current_prod_num : "n/a",
  254. orig_prod_num, serial_no);
  255. add_device_randomness(orig_prod_num, strlen(orig_prod_num));
  256. add_device_randomness(current_prod_num, strlen(current_prod_num));
  257. add_device_randomness(serial_no, strlen(serial_no));
  258. }
  259. }
  260. /**
  261. * init_per_cpu - Handle individual processor initializations.
  262. * @cpunum: logical processor number.
  263. *
  264. * This function handles initialization for *every* CPU
  265. * in the system:
  266. *
  267. * o Set "default" CPU width for trap handlers
  268. *
  269. * o Enable FP coprocessor
  270. * REVISIT: this could be done in the "code 22" trap handler.
  271. * (frowands idea - that way we know which processes need FP
  272. * registers saved on the interrupt stack.)
  273. * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
  274. * formatted printing of %lx for example (double divides I think)
  275. *
  276. * o Enable CPU profiling hooks.
  277. */
  278. int init_per_cpu(int cpunum)
  279. {
  280. int ret;
  281. struct pdc_coproc_cfg coproc_cfg;
  282. set_firmware_width();
  283. ret = pdc_coproc_cfg(&coproc_cfg);
  284. if(ret >= 0 && coproc_cfg.ccr_functional) {
  285. mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
  286. /* FWIW, FP rev/model is a more accurate way to determine
  287. ** CPU type. CPU rev/model has some ambiguous cases.
  288. */
  289. per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
  290. per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
  291. if (cpunum == 0)
  292. printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
  293. cpunum, coproc_cfg.revision, coproc_cfg.model);
  294. /*
  295. ** store status register to stack (hopefully aligned)
  296. ** and clear the T-bit.
  297. */
  298. asm volatile ("fstd %fr0,8(%sp)");
  299. } else {
  300. printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
  301. " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
  302. #ifdef CONFIG_64BIT
  303. "Halting Machine - FP required\n"
  304. #endif
  305. , coproc_cfg.ccr_functional);
  306. #ifdef CONFIG_64BIT
  307. mdelay(100); /* previous chars get pushed to console */
  308. panic("FP CoProc not reported");
  309. #endif
  310. }
  311. /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
  312. init_percpu_prof(cpunum);
  313. btlb_init_per_cpu();
  314. return ret;
  315. }
  316. /*
  317. * Display CPU info for all CPUs.
  318. */
  319. int
  320. show_cpuinfo (struct seq_file *m, void *v)
  321. {
  322. unsigned long cpu;
  323. char cpu_name[60], *p;
  324. /* strip PA path from CPU name to not confuse lscpu */
  325. strscpy(cpu_name, per_cpu(cpu_data, 0).dev->name, sizeof(cpu_name));
  326. p = strrchr(cpu_name, '[');
  327. if (p)
  328. *(--p) = 0;
  329. for_each_online_cpu(cpu) {
  330. #ifdef CONFIG_SMP
  331. const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
  332. if (0 == cpuinfo->hpa)
  333. continue;
  334. #endif
  335. seq_printf(m, "processor\t: %lu\n"
  336. "cpu family\t: PA-RISC %s\n",
  337. cpu, boot_cpu_data.family_name);
  338. seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
  339. /* cpu MHz */
  340. seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
  341. boot_cpu_data.cpu_hz / 1000000,
  342. boot_cpu_data.cpu_hz % 1000000 );
  343. #ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
  344. seq_printf(m, "physical id\t: %d\n",
  345. topology_physical_package_id(cpu));
  346. seq_printf(m, "siblings\t: %d\n",
  347. cpumask_weight(topology_core_cpumask(cpu)));
  348. seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
  349. #endif
  350. seq_printf(m, "capabilities\t:");
  351. if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
  352. seq_puts(m, " os32");
  353. if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
  354. seq_puts(m, " os64");
  355. if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
  356. seq_puts(m, " iopdir_fdc");
  357. switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
  358. case PDC_MODEL_NVA_SUPPORTED:
  359. seq_puts(m, " nva_supported");
  360. break;
  361. case PDC_MODEL_NVA_SLOW:
  362. seq_puts(m, " nva_slow");
  363. break;
  364. case PDC_MODEL_NVA_UNSUPPORTED:
  365. seq_puts(m, " needs_equivalent_aliasing");
  366. break;
  367. }
  368. seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
  369. seq_printf(m, "model\t\t: %s - %s\n",
  370. boot_cpu_data.pdc.sys_model_name,
  371. cpu_name);
  372. seq_printf(m, "hversion\t: 0x%08x\n"
  373. "sversion\t: 0x%08x\n",
  374. boot_cpu_data.hversion,
  375. boot_cpu_data.sversion );
  376. /* print cachesize info */
  377. show_cache_info(m);
  378. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  379. loops_per_jiffy / (500000 / HZ),
  380. loops_per_jiffy / (5000 / HZ) % 100);
  381. seq_printf(m, "software id\t: %ld\n\n",
  382. boot_cpu_data.pdc.model.sw_id);
  383. }
  384. return 0;
  385. }
  386. static const struct parisc_device_id processor_tbl[] __initconst = {
  387. { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
  388. { 0, }
  389. };
  390. static struct parisc_driver cpu_driver __refdata = {
  391. .name = "CPU",
  392. .id_table = processor_tbl,
  393. .probe = processor_probe
  394. };
  395. /**
  396. * processor_init - Processor initialization procedure.
  397. *
  398. * Register this driver.
  399. */
  400. void __init processor_init(void)
  401. {
  402. reset_cpu_topology();
  403. register_parisc_driver(&cpu_driver);
  404. }