microwatt.dts 3.4 KB

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  1. /dts-v1/;
  2. / {
  3. #size-cells = <0x02>;
  4. #address-cells = <0x02>;
  5. model-name = "microwatt";
  6. compatible = "microwatt-soc";
  7. aliases {
  8. serial0 = &UART0;
  9. };
  10. reserved-memory {
  11. #size-cells = <0x02>;
  12. #address-cells = <0x02>;
  13. ranges;
  14. };
  15. memory@0 {
  16. device_type = "memory";
  17. reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
  18. };
  19. clocks {
  20. sys_clk: litex_sys_clk {
  21. #clock-cells = <0>;
  22. compatible = "fixed-clock";
  23. clock-frequency = <100000000>;
  24. };
  25. };
  26. cpus {
  27. #size-cells = <0x00>;
  28. #address-cells = <0x01>;
  29. ibm,powerpc-cpu-features {
  30. display-name = "Microwatt";
  31. isa = <3000>;
  32. device_type = "cpu-features";
  33. compatible = "ibm,powerpc-cpu-features";
  34. mmu-radix {
  35. isa = <3000>;
  36. usable-privilege = <2>;
  37. };
  38. little-endian {
  39. isa = <2050>;
  40. usable-privilege = <3>;
  41. hwcap-bit-nr = <1>;
  42. };
  43. cache-inhibited-large-page {
  44. isa = <2040>;
  45. usable-privilege = <2>;
  46. };
  47. fixed-point-v3 {
  48. isa = <3000>;
  49. usable-privilege = <3>;
  50. };
  51. no-execute {
  52. isa = <2010>;
  53. usable-privilege = <2>;
  54. };
  55. floating-point {
  56. hwcap-bit-nr = <27>;
  57. isa = <0>;
  58. usable-privilege = <3>;
  59. };
  60. };
  61. PowerPC,Microwatt@0 {
  62. i-cache-sets = <2>;
  63. ibm,dec-bits = <64>;
  64. reservation-granule-size = <64>;
  65. clock-frequency = <100000000>;
  66. timebase-frequency = <100000000>;
  67. i-tlb-sets = <1>;
  68. ibm,ppc-interrupt-server#s = <0>;
  69. i-cache-block-size = <64>;
  70. d-cache-block-size = <64>;
  71. d-cache-sets = <2>;
  72. i-tlb-size = <64>;
  73. cpu-version = <0x990000>;
  74. status = "okay";
  75. i-cache-size = <0x1000>;
  76. ibm,processor-radix-AP-encodings = <0x0c 0xa0000010 0x20000015 0x4000001e>;
  77. tlb-size = <0>;
  78. tlb-sets = <0>;
  79. device_type = "cpu";
  80. d-tlb-size = <128>;
  81. d-tlb-sets = <2>;
  82. reg = <0>;
  83. general-purpose;
  84. 64-bit;
  85. d-cache-size = <0x1000>;
  86. ibm,chip-id = <0>;
  87. ibm,mmu-lpid-bits = <12>;
  88. ibm,mmu-pid-bits = <20>;
  89. };
  90. };
  91. soc@c0000000 {
  92. compatible = "simple-bus";
  93. #address-cells = <1>;
  94. #size-cells = <1>;
  95. interrupt-parent = <&ICS>;
  96. ranges = <0 0 0xc0000000 0x40000000>;
  97. interrupt-controller@4000 {
  98. compatible = "openpower,xics-presentation", "ibm,ppc-xicp";
  99. ibm,interrupt-server-ranges = <0x0 0x1>;
  100. reg = <0x4000 0x100>;
  101. };
  102. ICS: interrupt-controller@5000 {
  103. compatible = "openpower,xics-sources";
  104. interrupt-controller;
  105. interrupt-ranges = <0x10 0x10>;
  106. reg = <0x5000 0x100>;
  107. #address-cells = <0>;
  108. #size-cells = <0>;
  109. #interrupt-cells = <2>;
  110. };
  111. UART0: serial@2000 {
  112. device_type = "serial";
  113. compatible = "ns16550";
  114. reg = <0x2000 0x8>;
  115. clock-frequency = <100000000>;
  116. current-speed = <115200>;
  117. reg-shift = <2>;
  118. fifo-size = <16>;
  119. interrupts = <0x10 0x1>;
  120. };
  121. ethernet@8020000 {
  122. compatible = "litex,liteeth";
  123. reg = <0x8021000 0x100
  124. 0x8020800 0x100
  125. 0x8030000 0x2000>;
  126. reg-names = "mac", "mido", "buffer";
  127. litex,rx-slots = <2>;
  128. litex,tx-slots = <2>;
  129. litex,slot-size = <0x800>;
  130. interrupts = <0x11 0x1>;
  131. };
  132. mmc@8040000 {
  133. compatible = "litex,mmc";
  134. reg = <0x8042800 0x800
  135. 0x8041000 0x800
  136. 0x8040800 0x800
  137. 0x8042000 0x800
  138. 0x8041800 0x800>;
  139. reg-names = "phy", "core", "reader", "writer", "irq";
  140. bus-width = <4>;
  141. interrupts = <0x13 1>;
  142. cap-sd-highspeed;
  143. clocks = <&sys_clk>;
  144. };
  145. };
  146. chosen {
  147. bootargs = "";
  148. ibm,architecture-vec-5 = [19 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00
  149. 00 00 00 00 00 00 00 00 40 00 40];
  150. stdout-path = &UART0;
  151. };
  152. };