stx_gp3.c 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Based on MPC8560 ADS and arch/ppc stx_gp3 ports
  4. *
  5. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  6. *
  7. * Copyright 2008 Freescale Semiconductor Inc.
  8. *
  9. * Dan Malek <dan@embeddededge.com>
  10. * Copyright 2004 Embedded Edge, LLC
  11. *
  12. * Copied from mpc8560_ads.c
  13. * Copyright 2002, 2003 Motorola Inc.
  14. *
  15. * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
  16. * Copyright 2004-2005 MontaVista Software, Inc.
  17. */
  18. #include <linux/stddef.h>
  19. #include <linux/kernel.h>
  20. #include <linux/pci.h>
  21. #include <linux/kdev_t.h>
  22. #include <linux/delay.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/of.h>
  25. #include <asm/time.h>
  26. #include <asm/machdep.h>
  27. #include <asm/pci-bridge.h>
  28. #include <asm/mpic.h>
  29. #include <mm/mmu_decl.h>
  30. #include <asm/udbg.h>
  31. #include <sysdev/fsl_soc.h>
  32. #include <sysdev/fsl_pci.h>
  33. #include "mpc85xx.h"
  34. #ifdef CONFIG_CPM2
  35. #include <asm/cpm2.h>
  36. #endif /* CONFIG_CPM2 */
  37. static void __init stx_gp3_pic_init(void)
  38. {
  39. struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
  40. 0, 256, " OpenPIC ");
  41. BUG_ON(mpic == NULL);
  42. mpic_init(mpic);
  43. mpc85xx_cpm2_pic_init();
  44. }
  45. /*
  46. * Setup the architecture
  47. */
  48. static void __init stx_gp3_setup_arch(void)
  49. {
  50. if (ppc_md.progress)
  51. ppc_md.progress("stx_gp3_setup_arch()", 0);
  52. fsl_pci_assign_primary();
  53. #ifdef CONFIG_CPM2
  54. cpm2_reset();
  55. #endif
  56. }
  57. static void stx_gp3_show_cpuinfo(struct seq_file *m)
  58. {
  59. uint pvid, svid, phid1;
  60. pvid = mfspr(SPRN_PVR);
  61. svid = mfspr(SPRN_SVR);
  62. seq_printf(m, "Vendor\t\t: RPC Electronics STx\n");
  63. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  64. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  65. /* Display cpu Pll setting */
  66. phid1 = mfspr(SPRN_HID1);
  67. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  68. }
  69. machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
  70. define_machine(stx_gp3) {
  71. .name = "STX GP3",
  72. .compatible = "stx,gp3-8560",
  73. .setup_arch = stx_gp3_setup_arch,
  74. .init_IRQ = stx_gp3_pic_init,
  75. .show_cpuinfo = stx_gp3_show_cpuinfo,
  76. .get_irq = mpic_get_irq,
  77. .progress = udbg_progress,
  78. };