Kconfig 8.3 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. menu "Platform support"
  3. source "arch/powerpc/platforms/powernv/Kconfig"
  4. source "arch/powerpc/platforms/pseries/Kconfig"
  5. source "arch/powerpc/platforms/chrp/Kconfig"
  6. source "arch/powerpc/platforms/512x/Kconfig"
  7. source "arch/powerpc/platforms/52xx/Kconfig"
  8. source "arch/powerpc/platforms/powermac/Kconfig"
  9. source "arch/powerpc/platforms/maple/Kconfig"
  10. source "arch/powerpc/platforms/pasemi/Kconfig"
  11. source "arch/powerpc/platforms/ps3/Kconfig"
  12. source "arch/powerpc/platforms/cell/Kconfig"
  13. source "arch/powerpc/platforms/8xx/Kconfig"
  14. source "arch/powerpc/platforms/82xx/Kconfig"
  15. source "arch/powerpc/platforms/83xx/Kconfig"
  16. source "arch/powerpc/platforms/85xx/Kconfig"
  17. source "arch/powerpc/platforms/86xx/Kconfig"
  18. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  19. source "arch/powerpc/platforms/44x/Kconfig"
  20. source "arch/powerpc/platforms/amigaone/Kconfig"
  21. source "arch/powerpc/platforms/book3s/Kconfig"
  22. source "arch/powerpc/platforms/microwatt/Kconfig"
  23. config KVM_GUEST
  24. bool "KVM Guest support"
  25. select EPAPR_PARAVIRT
  26. help
  27. This option enables various optimizations for running under the KVM
  28. hypervisor. Overhead for the kernel when not running inside KVM should
  29. be minimal.
  30. In case of doubt, say Y
  31. config EPAPR_PARAVIRT
  32. bool "ePAPR para-virtualization support"
  33. help
  34. Enables ePAPR para-virtualization support for guests.
  35. In case of doubt, say Y
  36. config PPC_HASH_MMU_NATIVE
  37. bool
  38. depends on PPC_BOOK3S
  39. help
  40. Support for running natively on the hardware, i.e. without
  41. a hypervisor. This option is not user-selectable but should
  42. be selected by all platforms that need it.
  43. config PPC_OF_BOOT_TRAMPOLINE
  44. bool "Support booting from Open Firmware or yaboot"
  45. depends on PPC_BOOK3S_32 || PPC64
  46. select RELOCATABLE if PPC64
  47. default y
  48. help
  49. Support from booting from Open Firmware or yaboot using an
  50. Open Firmware client interface. This enables the kernel to
  51. communicate with open firmware to retrieve system information
  52. such as the device tree.
  53. In case of doubt, say Y
  54. config PPC_DT_CPU_FTRS
  55. bool "Device-tree based CPU feature discovery & setup"
  56. depends on PPC_BOOK3S_64
  57. default y
  58. help
  59. This enables code to use a new device tree binding for describing CPU
  60. compatibility and features. Saying Y here will attempt to use the new
  61. binding if the firmware provides it. Currently only the skiboot
  62. firmware provides this binding.
  63. If you're not sure say Y.
  64. config UDBG_RTAS_CONSOLE
  65. bool "RTAS based debug console"
  66. depends on PPC_RTAS
  67. config PPC_SMP_MUXED_IPI
  68. bool
  69. help
  70. Select this option if your platform supports SMP and your
  71. interrupt controller provides less than 4 interrupts to each
  72. cpu. This will enable the generic code to multiplex the 4
  73. messages on to one ipi.
  74. config IPIC
  75. bool
  76. config MPIC
  77. bool
  78. config MPIC_TIMER
  79. bool "MPIC Global Timer"
  80. depends on MPIC && FSL_SOC
  81. help
  82. The MPIC global timer is a hardware timer inside the
  83. Freescale PIC complying with OpenPIC standard. When the
  84. specified interval times out, the hardware timer generates
  85. an interrupt. The driver currently is only tested on fsl
  86. chip, but it can potentially support other global timers
  87. complying with the OpenPIC standard.
  88. config FSL_MPIC_TIMER_WAKEUP
  89. tristate "Freescale MPIC global timer wakeup driver"
  90. depends on FSL_SOC && MPIC_TIMER && PM
  91. help
  92. The driver provides a way to wake up the system by MPIC
  93. timer.
  94. e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
  95. config PPC_EPAPR_HV_PIC
  96. bool
  97. select EPAPR_PARAVIRT
  98. config MPIC_WEIRD
  99. bool
  100. config MPIC_MSGR
  101. bool "MPIC message register support"
  102. depends on MPIC
  103. help
  104. Enables support for the MPIC message registers. These
  105. registers are used for inter-processor communication.
  106. config PPC_I8259
  107. bool
  108. config U3_DART
  109. bool
  110. depends on PPC64
  111. config PPC_RTAS
  112. bool
  113. config RTAS_ERROR_LOGGING
  114. bool
  115. depends on PPC_RTAS
  116. config PPC_RTAS_DAEMON
  117. bool
  118. depends on PPC_RTAS
  119. config RTAS_PROC
  120. bool "Proc interface to RTAS"
  121. depends on PPC_RTAS && PROC_FS
  122. default y
  123. config RTAS_FLASH
  124. tristate "Firmware flash interface"
  125. depends on PPC64 && RTAS_PROC
  126. config MMIO_NVRAM
  127. bool
  128. config MPIC_U3_HT_IRQS
  129. bool
  130. config MPIC_BROKEN_REGREAD
  131. bool
  132. depends on MPIC
  133. help
  134. This option enables a MPIC driver workaround for some chips
  135. that have a bug that causes some interrupt source information
  136. to not read back properly. It is safe to use on other chips as
  137. well, but enabling it uses about 8KB of memory to keep copies
  138. of the register contents in software.
  139. config EEH
  140. bool
  141. depends on (PPC_POWERNV || PPC_PSERIES) && PCI
  142. default y
  143. config PPC_MPC106
  144. bool
  145. config PPC_970_NAP
  146. bool
  147. config PPC_P7_NAP
  148. bool
  149. config PPC_BOOK3S_IDLE
  150. def_bool y
  151. depends on (PPC_970_NAP || PPC_P7_NAP)
  152. config PPC_INDIRECT_PIO
  153. bool
  154. select GENERIC_IOMAP
  155. config PPC_INDIRECT_MMIO
  156. bool
  157. config PPC_IO_WORKAROUNDS
  158. bool
  159. source "drivers/cpufreq/Kconfig"
  160. menu "CPUIdle driver"
  161. source "drivers/cpuidle/Kconfig"
  162. endmenu
  163. config TAU
  164. bool "On-chip CPU temperature sensor support"
  165. depends on PPC_BOOK3S_32
  166. help
  167. G3 and G4 processors have an on-chip temperature sensor called the
  168. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  169. temperature within 2-4 degrees Celsius. This option shows the current
  170. on-die temperature in /proc/cpuinfo if the cpu supports it.
  171. Unfortunately, this sensor is very inaccurate when uncalibrated, so
  172. don't assume the cpu temp is actually what /proc/cpuinfo says it is.
  173. config TAU_INT
  174. bool "Interrupt driven TAU driver (EXPERIMENTAL)"
  175. depends on TAU
  176. help
  177. The TAU supports an interrupt driven mode which causes an interrupt
  178. whenever the temperature goes out of range. This is the fastest way
  179. to get notified the temp has exceeded a range. With this option off,
  180. a timer is used to re-check the temperature periodically.
  181. If in doubt, say N here.
  182. config TAU_AVERAGE
  183. bool "Average high and low temp"
  184. depends on TAU
  185. help
  186. The TAU hardware can compare the temperature to an upper and lower
  187. bound. The default behavior is to show both the upper and lower
  188. bound in /proc/cpuinfo. If the range is large, the temperature is
  189. either changing a lot, or the TAU hardware is broken (likely on some
  190. G4's). If the range is small (around 4 degrees), the temperature is
  191. relatively stable. If you say Y here, a single temperature value,
  192. halfway between the upper and lower bounds, will be reported in
  193. /proc/cpuinfo.
  194. If in doubt, say N here.
  195. config QE_GPIO
  196. bool "QE GPIO support"
  197. depends on QUICC_ENGINE
  198. select GPIOLIB
  199. select OF_GPIO_MM_GPIOCHIP
  200. help
  201. Say Y here if you're going to use hardware that connects to the
  202. QE GPIOs.
  203. config CPM2
  204. bool "Enable support for the CPM2 (Communications Processor Module)"
  205. depends on (FSL_SOC_BOOKE && PPC32) || PPC_82xx
  206. select CPM
  207. select HAVE_PCI
  208. select GPIOLIB
  209. select OF_GPIO_MM_GPIOCHIP
  210. help
  211. The CPM2 (Communications Processor Module) is a coprocessor on
  212. embedded CPUs made by Freescale. Selecting this option means that
  213. you wish to build a kernel for a machine with a CPM2 coprocessor
  214. on it (826x, 827x, 8560).
  215. config FSL_ULI1575
  216. bool "ULI1575 PCIe south bridge support"
  217. depends on FSL_SOC_BOOKE || PPC_86xx
  218. depends on PCI
  219. select FSL_PCI
  220. select GENERIC_ISA_DMA
  221. help
  222. Supports for the ULI1575 PCIe south bridge that exists on some
  223. Freescale reference boards. The boards all use the ULI in pretty
  224. much the same way.
  225. config CPM
  226. bool
  227. select GENERIC_ALLOCATOR
  228. config OF_RTC
  229. bool
  230. help
  231. Uses information from the OF or flattened device tree to instantiate
  232. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  233. config GEN_RTC
  234. bool "Use the platform RTC operations from user space"
  235. select RTC_CLASS
  236. select RTC_DRV_GENERIC
  237. help
  238. This option provides backwards compatibility with the old gen_rtc.ko
  239. module that was traditionally used for old PowerPC machines.
  240. Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
  241. replacing their get_rtc_time/set_rtc_time callbacks with
  242. a proper RTC device driver.
  243. config MCU_MPC8349EMITX
  244. bool "MPC8349E-mITX MCU driver"
  245. depends on I2C=y && PPC_83xx
  246. select GPIOLIB
  247. help
  248. Say Y here to enable soft power-off functionality on the Freescale
  249. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  250. also register MCU GPIOs with the generic GPIO API, so you'll able
  251. to use MCU pins as GPIOs.
  252. endmenu