processor.c 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2008
  4. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
  5. */
  6. #define KMSG_COMPONENT "cpu"
  7. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  8. #include <linux/stop_machine.h>
  9. #include <linux/bitops.h>
  10. #include <linux/kernel.h>
  11. #include <linux/random.h>
  12. #include <linux/sched/mm.h>
  13. #include <linux/init.h>
  14. #include <linux/seq_file.h>
  15. #include <linux/mm_types.h>
  16. #include <linux/delay.h>
  17. #include <linux/cpu.h>
  18. #include <linux/smp.h>
  19. #include <asm/text-patching.h>
  20. #include <asm/diag.h>
  21. #include <asm/facility.h>
  22. #include <asm/elf.h>
  23. #include <asm/lowcore.h>
  24. #include <asm/param.h>
  25. #include <asm/sclp.h>
  26. #include <asm/smp.h>
  27. unsigned long __read_mostly elf_hwcap;
  28. char elf_platform[ELF_PLATFORM_SIZE];
  29. struct cpu_info {
  30. unsigned int cpu_mhz_dynamic;
  31. unsigned int cpu_mhz_static;
  32. struct cpuid cpu_id;
  33. };
  34. static DEFINE_PER_CPU(struct cpu_info, cpu_info);
  35. static DEFINE_PER_CPU(int, cpu_relax_retry);
  36. static bool machine_has_cpu_mhz;
  37. void __init cpu_detect_mhz_feature(void)
  38. {
  39. if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL)
  40. machine_has_cpu_mhz = true;
  41. }
  42. static void update_cpu_mhz(void *arg)
  43. {
  44. unsigned long mhz;
  45. struct cpu_info *c;
  46. mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
  47. c = this_cpu_ptr(&cpu_info);
  48. c->cpu_mhz_dynamic = mhz >> 32;
  49. c->cpu_mhz_static = mhz & 0xffffffff;
  50. }
  51. void s390_update_cpu_mhz(void)
  52. {
  53. s390_adjust_jiffies();
  54. if (machine_has_cpu_mhz)
  55. on_each_cpu(update_cpu_mhz, NULL, 0);
  56. }
  57. void notrace stop_machine_yield(const struct cpumask *cpumask)
  58. {
  59. int cpu, this_cpu;
  60. this_cpu = smp_processor_id();
  61. if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) {
  62. __this_cpu_write(cpu_relax_retry, 0);
  63. cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false);
  64. if (cpu >= nr_cpu_ids)
  65. return;
  66. if (arch_vcpu_is_preempted(cpu))
  67. smp_yield_cpu(cpu);
  68. }
  69. }
  70. static void do_sync_core(void *info)
  71. {
  72. sync_core();
  73. }
  74. void text_poke_sync(void)
  75. {
  76. on_each_cpu(do_sync_core, NULL, 1);
  77. }
  78. void text_poke_sync_lock(void)
  79. {
  80. cpus_read_lock();
  81. text_poke_sync();
  82. cpus_read_unlock();
  83. }
  84. /*
  85. * cpu_init - initializes state that is per-CPU.
  86. */
  87. void cpu_init(void)
  88. {
  89. struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id);
  90. get_cpu_id(id);
  91. if (machine_has_cpu_mhz)
  92. update_cpu_mhz(NULL);
  93. mmgrab(&init_mm);
  94. current->active_mm = &init_mm;
  95. BUG_ON(current->mm);
  96. enter_lazy_tlb(&init_mm, current);
  97. }
  98. static void show_facilities(struct seq_file *m)
  99. {
  100. unsigned int bit;
  101. seq_puts(m, "facilities :");
  102. for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT)
  103. seq_printf(m, " %d", bit);
  104. seq_putc(m, '\n');
  105. }
  106. static void show_cpu_summary(struct seq_file *m, void *v)
  107. {
  108. static const char *hwcap_str[] = {
  109. [HWCAP_NR_ESAN3] = "esan3",
  110. [HWCAP_NR_ZARCH] = "zarch",
  111. [HWCAP_NR_STFLE] = "stfle",
  112. [HWCAP_NR_MSA] = "msa",
  113. [HWCAP_NR_LDISP] = "ldisp",
  114. [HWCAP_NR_EIMM] = "eimm",
  115. [HWCAP_NR_DFP] = "dfp",
  116. [HWCAP_NR_HPAGE] = "edat",
  117. [HWCAP_NR_ETF3EH] = "etf3eh",
  118. [HWCAP_NR_HIGH_GPRS] = "highgprs",
  119. [HWCAP_NR_TE] = "te",
  120. [HWCAP_NR_VXRS] = "vx",
  121. [HWCAP_NR_VXRS_BCD] = "vxd",
  122. [HWCAP_NR_VXRS_EXT] = "vxe",
  123. [HWCAP_NR_GS] = "gs",
  124. [HWCAP_NR_VXRS_EXT2] = "vxe2",
  125. [HWCAP_NR_VXRS_PDE] = "vxp",
  126. [HWCAP_NR_SORT] = "sort",
  127. [HWCAP_NR_DFLT] = "dflt",
  128. [HWCAP_NR_VXRS_PDE2] = "vxp2",
  129. [HWCAP_NR_NNPA] = "nnpa",
  130. [HWCAP_NR_PCI_MIO] = "pcimio",
  131. [HWCAP_NR_SIE] = "sie",
  132. };
  133. int i, cpu;
  134. BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX);
  135. seq_printf(m, "vendor_id : IBM/S390\n"
  136. "# processors : %i\n"
  137. "bogomips per cpu: %lu.%02lu\n",
  138. num_online_cpus(), loops_per_jiffy/(500000/HZ),
  139. (loops_per_jiffy/(5000/HZ))%100);
  140. seq_printf(m, "max thread id : %d\n", smp_cpu_mtid);
  141. seq_puts(m, "features\t: ");
  142. for (i = 0; i < ARRAY_SIZE(hwcap_str); i++)
  143. if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
  144. seq_printf(m, "%s ", hwcap_str[i]);
  145. seq_puts(m, "\n");
  146. show_facilities(m);
  147. show_cacheinfo(m);
  148. for_each_online_cpu(cpu) {
  149. struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu);
  150. seq_printf(m, "processor %d: "
  151. "version = %02X, "
  152. "identification = %06X, "
  153. "machine = %04X\n",
  154. cpu, id->version, id->ident, id->machine);
  155. }
  156. }
  157. static int __init setup_hwcaps(void)
  158. {
  159. /* instructions named N3, "backported" to esa-mode */
  160. elf_hwcap |= HWCAP_ESAN3;
  161. /* z/Architecture mode active */
  162. elf_hwcap |= HWCAP_ZARCH;
  163. /* store-facility-list-extended */
  164. if (test_facility(7))
  165. elf_hwcap |= HWCAP_STFLE;
  166. /* message-security assist */
  167. if (test_facility(17))
  168. elf_hwcap |= HWCAP_MSA;
  169. /* long-displacement */
  170. if (test_facility(19))
  171. elf_hwcap |= HWCAP_LDISP;
  172. /* extended-immediate */
  173. elf_hwcap |= HWCAP_EIMM;
  174. /* extended-translation facility 3 enhancement */
  175. if (test_facility(22) && test_facility(30))
  176. elf_hwcap |= HWCAP_ETF3EH;
  177. /* decimal floating point & perform floating point operation */
  178. if (test_facility(42) && test_facility(44))
  179. elf_hwcap |= HWCAP_DFP;
  180. /* huge page support */
  181. if (MACHINE_HAS_EDAT1)
  182. elf_hwcap |= HWCAP_HPAGE;
  183. /* 64-bit register support for 31-bit processes */
  184. elf_hwcap |= HWCAP_HIGH_GPRS;
  185. /* transactional execution */
  186. if (MACHINE_HAS_TE)
  187. elf_hwcap |= HWCAP_TE;
  188. /* vector */
  189. if (test_facility(129)) {
  190. elf_hwcap |= HWCAP_VXRS;
  191. if (test_facility(134))
  192. elf_hwcap |= HWCAP_VXRS_BCD;
  193. if (test_facility(135))
  194. elf_hwcap |= HWCAP_VXRS_EXT;
  195. if (test_facility(148))
  196. elf_hwcap |= HWCAP_VXRS_EXT2;
  197. if (test_facility(152))
  198. elf_hwcap |= HWCAP_VXRS_PDE;
  199. if (test_facility(192))
  200. elf_hwcap |= HWCAP_VXRS_PDE2;
  201. }
  202. if (test_facility(150))
  203. elf_hwcap |= HWCAP_SORT;
  204. if (test_facility(151))
  205. elf_hwcap |= HWCAP_DFLT;
  206. if (test_facility(165))
  207. elf_hwcap |= HWCAP_NNPA;
  208. /* guarded storage */
  209. if (MACHINE_HAS_GS)
  210. elf_hwcap |= HWCAP_GS;
  211. if (MACHINE_HAS_PCI_MIO)
  212. elf_hwcap |= HWCAP_PCI_MIO;
  213. /* virtualization support */
  214. if (sclp.has_sief2)
  215. elf_hwcap |= HWCAP_SIE;
  216. return 0;
  217. }
  218. arch_initcall(setup_hwcaps);
  219. static int __init setup_elf_platform(void)
  220. {
  221. struct cpuid cpu_id;
  222. get_cpu_id(&cpu_id);
  223. add_device_randomness(&cpu_id, sizeof(cpu_id));
  224. switch (cpu_id.machine) {
  225. default: /* Use "z10" as default. */
  226. strcpy(elf_platform, "z10");
  227. break;
  228. case 0x2817:
  229. case 0x2818:
  230. strcpy(elf_platform, "z196");
  231. break;
  232. case 0x2827:
  233. case 0x2828:
  234. strcpy(elf_platform, "zEC12");
  235. break;
  236. case 0x2964:
  237. case 0x2965:
  238. strcpy(elf_platform, "z13");
  239. break;
  240. case 0x3906:
  241. case 0x3907:
  242. strcpy(elf_platform, "z14");
  243. break;
  244. case 0x8561:
  245. case 0x8562:
  246. strcpy(elf_platform, "z15");
  247. break;
  248. case 0x3931:
  249. case 0x3932:
  250. strcpy(elf_platform, "z16");
  251. break;
  252. }
  253. return 0;
  254. }
  255. arch_initcall(setup_elf_platform);
  256. static void show_cpu_topology(struct seq_file *m, unsigned long n)
  257. {
  258. #ifdef CONFIG_SCHED_TOPOLOGY
  259. seq_printf(m, "physical id : %d\n", topology_physical_package_id(n));
  260. seq_printf(m, "core id : %d\n", topology_core_id(n));
  261. seq_printf(m, "book id : %d\n", topology_book_id(n));
  262. seq_printf(m, "drawer id : %d\n", topology_drawer_id(n));
  263. seq_printf(m, "dedicated : %d\n", topology_cpu_dedicated(n));
  264. seq_printf(m, "address : %d\n", smp_cpu_get_cpu_address(n));
  265. seq_printf(m, "siblings : %d\n", cpumask_weight(topology_core_cpumask(n)));
  266. seq_printf(m, "cpu cores : %d\n", topology_booted_cores(n));
  267. #endif /* CONFIG_SCHED_TOPOLOGY */
  268. }
  269. static void show_cpu_ids(struct seq_file *m, unsigned long n)
  270. {
  271. struct cpuid *id = &per_cpu(cpu_info.cpu_id, n);
  272. seq_printf(m, "version : %02X\n", id->version);
  273. seq_printf(m, "identification : %06X\n", id->ident);
  274. seq_printf(m, "machine : %04X\n", id->machine);
  275. }
  276. static void show_cpu_mhz(struct seq_file *m, unsigned long n)
  277. {
  278. struct cpu_info *c = per_cpu_ptr(&cpu_info, n);
  279. if (!machine_has_cpu_mhz)
  280. return;
  281. seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic);
  282. seq_printf(m, "cpu MHz static : %d\n", c->cpu_mhz_static);
  283. }
  284. /*
  285. * show_cpuinfo - Get information on one CPU for use by procfs.
  286. */
  287. static int show_cpuinfo(struct seq_file *m, void *v)
  288. {
  289. unsigned long n = (unsigned long) v - 1;
  290. unsigned long first = cpumask_first(cpu_online_mask);
  291. if (n == first)
  292. show_cpu_summary(m, v);
  293. seq_printf(m, "\ncpu number : %ld\n", n);
  294. show_cpu_topology(m, n);
  295. show_cpu_ids(m, n);
  296. show_cpu_mhz(m, n);
  297. return 0;
  298. }
  299. static inline void *c_update(loff_t *pos)
  300. {
  301. if (*pos)
  302. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  303. else
  304. *pos = cpumask_first(cpu_online_mask);
  305. return *pos < nr_cpu_ids ? (void *)*pos + 1 : NULL;
  306. }
  307. static void *c_start(struct seq_file *m, loff_t *pos)
  308. {
  309. cpus_read_lock();
  310. return c_update(pos);
  311. }
  312. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  313. {
  314. ++*pos;
  315. return c_update(pos);
  316. }
  317. static void c_stop(struct seq_file *m, void *v)
  318. {
  319. cpus_read_unlock();
  320. }
  321. const struct seq_operations cpuinfo_op = {
  322. .start = c_start,
  323. .next = c_next,
  324. .stop = c_stop,
  325. .show = show_cpuinfo,
  326. };