smp.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * SMP related functions
  4. *
  5. * Copyright IBM Corp. 1999, 2012
  6. * Author(s): Denis Joseph Barrow,
  7. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/memblock.h>
  21. #include <linux/export.h>
  22. #include <linux/init.h>
  23. #include <linux/mm.h>
  24. #include <linux/err.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/kernel_stat.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/irqflags.h>
  30. #include <linux/irq_work.h>
  31. #include <linux/cpu.h>
  32. #include <linux/slab.h>
  33. #include <linux/sched/hotplug.h>
  34. #include <linux/sched/task_stack.h>
  35. #include <linux/crash_dump.h>
  36. #include <linux/kprobes.h>
  37. #include <asm/access-regs.h>
  38. #include <asm/asm-offsets.h>
  39. #include <asm/ctlreg.h>
  40. #include <asm/pfault.h>
  41. #include <asm/diag.h>
  42. #include <asm/facility.h>
  43. #include <asm/fpu.h>
  44. #include <asm/ipl.h>
  45. #include <asm/setup.h>
  46. #include <asm/irq.h>
  47. #include <asm/tlbflush.h>
  48. #include <asm/vtimer.h>
  49. #include <asm/abs_lowcore.h>
  50. #include <asm/sclp.h>
  51. #include <asm/debug.h>
  52. #include <asm/os_info.h>
  53. #include <asm/sigp.h>
  54. #include <asm/idle.h>
  55. #include <asm/nmi.h>
  56. #include <asm/stacktrace.h>
  57. #include <asm/topology.h>
  58. #include <asm/vdso.h>
  59. #include <asm/maccess.h>
  60. #include "entry.h"
  61. enum {
  62. ec_schedule = 0,
  63. ec_call_function_single,
  64. ec_stop_cpu,
  65. ec_mcck_pending,
  66. ec_irq_work,
  67. };
  68. enum {
  69. CPU_STATE_STANDBY,
  70. CPU_STATE_CONFIGURED,
  71. };
  72. static u8 boot_core_type;
  73. DEFINE_PER_CPU(struct pcpu, pcpu_devices);
  74. /*
  75. * Pointer to the pcpu area of the boot CPU. This is required when a restart
  76. * interrupt is triggered on an offline CPU. For that case accessing percpu
  77. * data with the common primitives does not work, since the percpu offset is
  78. * stored in a non existent lowcore.
  79. */
  80. static struct pcpu *ipl_pcpu;
  81. unsigned int smp_cpu_mt_shift;
  82. EXPORT_SYMBOL(smp_cpu_mt_shift);
  83. unsigned int smp_cpu_mtid;
  84. EXPORT_SYMBOL(smp_cpu_mtid);
  85. #ifdef CONFIG_CRASH_DUMP
  86. __vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
  87. #endif
  88. static unsigned int smp_max_threads __initdata = -1U;
  89. cpumask_t cpu_setup_mask;
  90. static int __init early_nosmt(char *s)
  91. {
  92. smp_max_threads = 1;
  93. return 0;
  94. }
  95. early_param("nosmt", early_nosmt);
  96. static int __init early_smt(char *s)
  97. {
  98. get_option(&s, &smp_max_threads);
  99. return 0;
  100. }
  101. early_param("smt", early_smt);
  102. /*
  103. * The smp_cpu_state_mutex must be held when changing the state or polarization
  104. * member of a pcpu data structure within the pcpu_devices array.
  105. */
  106. DEFINE_MUTEX(smp_cpu_state_mutex);
  107. /*
  108. * Signal processor helper functions.
  109. */
  110. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
  111. {
  112. int cc;
  113. while (1) {
  114. cc = __pcpu_sigp(addr, order, parm, NULL);
  115. if (cc != SIGP_CC_BUSY)
  116. return cc;
  117. cpu_relax();
  118. }
  119. }
  120. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  121. {
  122. int cc, retry;
  123. for (retry = 0; ; retry++) {
  124. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  125. if (cc != SIGP_CC_BUSY)
  126. break;
  127. if (retry >= 3)
  128. udelay(10);
  129. }
  130. return cc;
  131. }
  132. static inline int pcpu_stopped(struct pcpu *pcpu)
  133. {
  134. u32 status;
  135. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  136. 0, &status) != SIGP_CC_STATUS_STORED)
  137. return 0;
  138. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  139. }
  140. static inline int pcpu_running(struct pcpu *pcpu)
  141. {
  142. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  143. 0, NULL) != SIGP_CC_STATUS_STORED)
  144. return 1;
  145. /* Status stored condition code is equivalent to cpu not running. */
  146. return 0;
  147. }
  148. /*
  149. * Find struct pcpu by cpu address.
  150. */
  151. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  152. {
  153. int cpu;
  154. for_each_cpu(cpu, mask)
  155. if (per_cpu(pcpu_devices, cpu).address == address)
  156. return &per_cpu(pcpu_devices, cpu);
  157. return NULL;
  158. }
  159. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  160. {
  161. int order;
  162. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  163. return;
  164. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  165. pcpu->ec_clk = get_tod_clock_fast();
  166. pcpu_sigp_retry(pcpu, order, 0);
  167. }
  168. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  169. {
  170. unsigned long async_stack, nodat_stack, mcck_stack;
  171. struct lowcore *lc;
  172. lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  173. nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
  174. async_stack = stack_alloc();
  175. mcck_stack = stack_alloc();
  176. if (!lc || !nodat_stack || !async_stack || !mcck_stack)
  177. goto out;
  178. memcpy(lc, get_lowcore(), 512);
  179. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  180. lc->async_stack = async_stack + STACK_INIT_OFFSET;
  181. lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
  182. lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
  183. lc->cpu_nr = cpu;
  184. lc->spinlock_lockval = arch_spin_lockval(cpu);
  185. lc->spinlock_index = 0;
  186. lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
  187. lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
  188. lc->preempt_count = PREEMPT_DISABLED;
  189. if (nmi_alloc_mcesa(&lc->mcesad))
  190. goto out;
  191. if (abs_lowcore_map(cpu, lc, true))
  192. goto out_mcesa;
  193. lowcore_ptr[cpu] = lc;
  194. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, __pa(lc));
  195. return 0;
  196. out_mcesa:
  197. nmi_free_mcesa(&lc->mcesad);
  198. out:
  199. stack_free(mcck_stack);
  200. stack_free(async_stack);
  201. free_pages(nodat_stack, THREAD_SIZE_ORDER);
  202. free_pages((unsigned long) lc, LC_ORDER);
  203. return -ENOMEM;
  204. }
  205. static void pcpu_free_lowcore(struct pcpu *pcpu, int cpu)
  206. {
  207. unsigned long async_stack, nodat_stack, mcck_stack;
  208. struct lowcore *lc;
  209. lc = lowcore_ptr[cpu];
  210. nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
  211. async_stack = lc->async_stack - STACK_INIT_OFFSET;
  212. mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
  213. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  214. lowcore_ptr[cpu] = NULL;
  215. abs_lowcore_unmap(cpu);
  216. nmi_free_mcesa(&lc->mcesad);
  217. stack_free(async_stack);
  218. stack_free(mcck_stack);
  219. free_pages(nodat_stack, THREAD_SIZE_ORDER);
  220. free_pages((unsigned long) lc, LC_ORDER);
  221. }
  222. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  223. {
  224. struct lowcore *lc, *abs_lc;
  225. lc = lowcore_ptr[cpu];
  226. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  227. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  228. lc->cpu_nr = cpu;
  229. lc->pcpu = (unsigned long)pcpu;
  230. lc->restart_flags = RESTART_FLAG_CTLREGS;
  231. lc->spinlock_lockval = arch_spin_lockval(cpu);
  232. lc->spinlock_index = 0;
  233. lc->percpu_offset = __per_cpu_offset[cpu];
  234. lc->kernel_asce = get_lowcore()->kernel_asce;
  235. lc->user_asce = s390_invalid_asce;
  236. lc->machine_flags = get_lowcore()->machine_flags;
  237. lc->user_timer = lc->system_timer =
  238. lc->steal_timer = lc->avg_steal_timer = 0;
  239. abs_lc = get_abs_lowcore();
  240. memcpy(lc->cregs_save_area, abs_lc->cregs_save_area, sizeof(lc->cregs_save_area));
  241. put_abs_lowcore(abs_lc);
  242. lc->cregs_save_area[1] = lc->kernel_asce;
  243. lc->cregs_save_area[7] = lc->user_asce;
  244. save_access_regs((unsigned int *) lc->access_regs_save_area);
  245. arch_spin_lock_setup(cpu);
  246. }
  247. static void pcpu_attach_task(int cpu, struct task_struct *tsk)
  248. {
  249. struct lowcore *lc;
  250. lc = lowcore_ptr[cpu];
  251. lc->kernel_stack = (unsigned long)task_stack_page(tsk) + STACK_INIT_OFFSET;
  252. lc->current_task = (unsigned long)tsk;
  253. lc->lpp = LPP_MAGIC;
  254. lc->current_pid = tsk->pid;
  255. lc->user_timer = tsk->thread.user_timer;
  256. lc->guest_timer = tsk->thread.guest_timer;
  257. lc->system_timer = tsk->thread.system_timer;
  258. lc->hardirq_timer = tsk->thread.hardirq_timer;
  259. lc->softirq_timer = tsk->thread.softirq_timer;
  260. lc->steal_timer = 0;
  261. }
  262. static void pcpu_start_fn(int cpu, void (*func)(void *), void *data)
  263. {
  264. struct lowcore *lc;
  265. lc = lowcore_ptr[cpu];
  266. lc->restart_stack = lc->kernel_stack;
  267. lc->restart_fn = (unsigned long) func;
  268. lc->restart_data = (unsigned long) data;
  269. lc->restart_source = -1U;
  270. pcpu_sigp_retry(per_cpu_ptr(&pcpu_devices, cpu), SIGP_RESTART, 0);
  271. }
  272. typedef void (pcpu_delegate_fn)(void *);
  273. /*
  274. * Call function via PSW restart on pcpu and stop the current cpu.
  275. */
  276. static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
  277. {
  278. func(data); /* should not return */
  279. }
  280. static void pcpu_delegate(struct pcpu *pcpu, int cpu,
  281. pcpu_delegate_fn *func,
  282. void *data, unsigned long stack)
  283. {
  284. struct lowcore *lc, *abs_lc;
  285. unsigned int source_cpu;
  286. lc = lowcore_ptr[cpu];
  287. source_cpu = stap();
  288. if (pcpu->address == source_cpu) {
  289. call_on_stack(2, stack, void, __pcpu_delegate,
  290. pcpu_delegate_fn *, func, void *, data);
  291. }
  292. /* Stop target cpu (if func returns this stops the current cpu). */
  293. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  294. pcpu_sigp_retry(pcpu, SIGP_CPU_RESET, 0);
  295. /* Restart func on the target cpu and stop the current cpu. */
  296. if (lc) {
  297. lc->restart_stack = stack;
  298. lc->restart_fn = (unsigned long)func;
  299. lc->restart_data = (unsigned long)data;
  300. lc->restart_source = source_cpu;
  301. } else {
  302. abs_lc = get_abs_lowcore();
  303. abs_lc->restart_stack = stack;
  304. abs_lc->restart_fn = (unsigned long)func;
  305. abs_lc->restart_data = (unsigned long)data;
  306. abs_lc->restart_source = source_cpu;
  307. put_abs_lowcore(abs_lc);
  308. }
  309. asm volatile(
  310. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  311. " brc 2,0b # busy, try again\n"
  312. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  313. " brc 2,1b # busy, try again\n"
  314. : : "d" (pcpu->address), "d" (source_cpu),
  315. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  316. : "0", "1", "cc");
  317. for (;;) ;
  318. }
  319. /*
  320. * Enable additional logical cpus for multi-threading.
  321. */
  322. static int pcpu_set_smt(unsigned int mtid)
  323. {
  324. int cc;
  325. if (smp_cpu_mtid == mtid)
  326. return 0;
  327. cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
  328. if (cc == 0) {
  329. smp_cpu_mtid = mtid;
  330. smp_cpu_mt_shift = 0;
  331. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  332. smp_cpu_mt_shift++;
  333. per_cpu(pcpu_devices, 0).address = stap();
  334. }
  335. return cc;
  336. }
  337. /*
  338. * Call function on the ipl CPU.
  339. */
  340. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  341. {
  342. struct lowcore *lc = lowcore_ptr[0];
  343. if (ipl_pcpu->address == stap())
  344. lc = get_lowcore();
  345. pcpu_delegate(ipl_pcpu, 0, func, data, lc->nodat_stack);
  346. }
  347. int smp_find_processor_id(u16 address)
  348. {
  349. int cpu;
  350. for_each_present_cpu(cpu)
  351. if (per_cpu(pcpu_devices, cpu).address == address)
  352. return cpu;
  353. return -1;
  354. }
  355. void schedule_mcck_handler(void)
  356. {
  357. pcpu_ec_call(this_cpu_ptr(&pcpu_devices), ec_mcck_pending);
  358. }
  359. bool notrace arch_vcpu_is_preempted(int cpu)
  360. {
  361. if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
  362. return false;
  363. if (pcpu_running(per_cpu_ptr(&pcpu_devices, cpu)))
  364. return false;
  365. return true;
  366. }
  367. EXPORT_SYMBOL(arch_vcpu_is_preempted);
  368. void notrace smp_yield_cpu(int cpu)
  369. {
  370. if (!MACHINE_HAS_DIAG9C)
  371. return;
  372. diag_stat_inc_norecursion(DIAG_STAT_X09C);
  373. asm volatile("diag %0,0,0x9c"
  374. : : "d" (per_cpu(pcpu_devices, cpu).address));
  375. }
  376. EXPORT_SYMBOL_GPL(smp_yield_cpu);
  377. /*
  378. * Send cpus emergency shutdown signal. This gives the cpus the
  379. * opportunity to complete outstanding interrupts.
  380. */
  381. void notrace smp_emergency_stop(void)
  382. {
  383. static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
  384. static cpumask_t cpumask;
  385. u64 end;
  386. int cpu;
  387. arch_spin_lock(&lock);
  388. cpumask_copy(&cpumask, cpu_online_mask);
  389. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  390. end = get_tod_clock() + (1000000UL << 12);
  391. for_each_cpu(cpu, &cpumask) {
  392. struct pcpu *pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  393. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  394. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  395. 0, NULL) == SIGP_CC_BUSY &&
  396. get_tod_clock() < end)
  397. cpu_relax();
  398. }
  399. while (get_tod_clock() < end) {
  400. for_each_cpu(cpu, &cpumask)
  401. if (pcpu_stopped(per_cpu_ptr(&pcpu_devices, cpu)))
  402. cpumask_clear_cpu(cpu, &cpumask);
  403. if (cpumask_empty(&cpumask))
  404. break;
  405. cpu_relax();
  406. }
  407. arch_spin_unlock(&lock);
  408. }
  409. NOKPROBE_SYMBOL(smp_emergency_stop);
  410. /*
  411. * Stop all cpus but the current one.
  412. */
  413. void smp_send_stop(void)
  414. {
  415. struct pcpu *pcpu;
  416. int cpu;
  417. /* Disable all interrupts/machine checks */
  418. __load_psw_mask(PSW_KERNEL_BITS);
  419. trace_hardirqs_off();
  420. debug_set_critical();
  421. if (oops_in_progress)
  422. smp_emergency_stop();
  423. /* stop all processors */
  424. for_each_online_cpu(cpu) {
  425. if (cpu == smp_processor_id())
  426. continue;
  427. pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  428. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  429. while (!pcpu_stopped(pcpu))
  430. cpu_relax();
  431. }
  432. }
  433. /*
  434. * This is the main routine where commands issued by other
  435. * cpus are handled.
  436. */
  437. static void smp_handle_ext_call(void)
  438. {
  439. unsigned long bits;
  440. /* handle bit signal external calls */
  441. bits = this_cpu_xchg(pcpu_devices.ec_mask, 0);
  442. if (test_bit(ec_stop_cpu, &bits))
  443. smp_stop_cpu();
  444. if (test_bit(ec_schedule, &bits))
  445. scheduler_ipi();
  446. if (test_bit(ec_call_function_single, &bits))
  447. generic_smp_call_function_single_interrupt();
  448. if (test_bit(ec_mcck_pending, &bits))
  449. s390_handle_mcck();
  450. if (test_bit(ec_irq_work, &bits))
  451. irq_work_run();
  452. }
  453. static void do_ext_call_interrupt(struct ext_code ext_code,
  454. unsigned int param32, unsigned long param64)
  455. {
  456. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  457. smp_handle_ext_call();
  458. }
  459. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  460. {
  461. int cpu;
  462. for_each_cpu(cpu, mask)
  463. pcpu_ec_call(per_cpu_ptr(&pcpu_devices, cpu), ec_call_function_single);
  464. }
  465. void arch_send_call_function_single_ipi(int cpu)
  466. {
  467. pcpu_ec_call(per_cpu_ptr(&pcpu_devices, cpu), ec_call_function_single);
  468. }
  469. /*
  470. * this function sends a 'reschedule' IPI to another CPU.
  471. * it goes straight through and wastes no time serializing
  472. * anything. Worst case is that we lose a reschedule ...
  473. */
  474. void arch_smp_send_reschedule(int cpu)
  475. {
  476. pcpu_ec_call(per_cpu_ptr(&pcpu_devices, cpu), ec_schedule);
  477. }
  478. #ifdef CONFIG_IRQ_WORK
  479. void arch_irq_work_raise(void)
  480. {
  481. pcpu_ec_call(this_cpu_ptr(&pcpu_devices), ec_irq_work);
  482. }
  483. #endif
  484. #ifdef CONFIG_CRASH_DUMP
  485. int smp_store_status(int cpu)
  486. {
  487. struct lowcore *lc;
  488. struct pcpu *pcpu;
  489. unsigned long pa;
  490. pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  491. lc = lowcore_ptr[cpu];
  492. pa = __pa(&lc->floating_pt_save_area);
  493. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
  494. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  495. return -EIO;
  496. if (!cpu_has_vx() && !MACHINE_HAS_GS)
  497. return 0;
  498. pa = lc->mcesad & MCESA_ORIGIN_MASK;
  499. if (MACHINE_HAS_GS)
  500. pa |= lc->mcesad & MCESA_LC_MASK;
  501. if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  502. pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
  503. return -EIO;
  504. return 0;
  505. }
  506. /*
  507. * Collect CPU state of the previous, crashed system.
  508. * There are four cases:
  509. * 1) standard zfcp/nvme dump
  510. * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
  511. * The state for all CPUs except the boot CPU needs to be collected
  512. * with sigp stop-and-store-status. The boot CPU state is located in
  513. * the absolute lowcore of the memory stored in the HSA. The zcore code
  514. * will copy the boot CPU state from the HSA.
  515. * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
  516. * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
  517. * The state for all CPUs except the boot CPU needs to be collected
  518. * with sigp stop-and-store-status. The firmware or the boot-loader
  519. * stored the registers of the boot CPU in the absolute lowcore in the
  520. * memory of the old system.
  521. * 3) kdump and the old kernel did not store the CPU state,
  522. * or stand-alone kdump for DASD
  523. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  524. * The state for all CPUs except the boot CPU needs to be collected
  525. * with sigp stop-and-store-status. The kexec code or the boot-loader
  526. * stored the registers of the boot CPU in the memory of the old system.
  527. * 4) kdump and the old kernel stored the CPU state
  528. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  529. * This case does not exist for s390 anymore, setup_arch explicitly
  530. * deactivates the elfcorehdr= kernel parameter
  531. */
  532. static bool dump_available(void)
  533. {
  534. return oldmem_data.start || is_ipl_type_dump();
  535. }
  536. void __init smp_save_dump_ipl_cpu(void)
  537. {
  538. struct save_area *sa;
  539. void *regs;
  540. if (!dump_available())
  541. return;
  542. sa = save_area_alloc(true);
  543. regs = memblock_alloc(512, 8);
  544. if (!sa || !regs)
  545. panic("could not allocate memory for boot CPU save area\n");
  546. copy_oldmem_kernel(regs, __LC_FPREGS_SAVE_AREA, 512);
  547. save_area_add_regs(sa, regs);
  548. memblock_free(regs, 512);
  549. if (cpu_has_vx())
  550. save_area_add_vxrs(sa, boot_cpu_vector_save_area);
  551. }
  552. void __init smp_save_dump_secondary_cpus(void)
  553. {
  554. int addr, boot_cpu_addr, max_cpu_addr;
  555. struct save_area *sa;
  556. void *page;
  557. if (!dump_available())
  558. return;
  559. /* Allocate a page as dumping area for the store status sigps */
  560. page = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);
  561. if (!page)
  562. panic("ERROR: Failed to allocate %lx bytes below %lx\n",
  563. PAGE_SIZE, 1UL << 31);
  564. /* Set multi-threading state to the previous system. */
  565. pcpu_set_smt(sclp.mtid_prev);
  566. boot_cpu_addr = stap();
  567. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  568. for (addr = 0; addr <= max_cpu_addr; addr++) {
  569. if (addr == boot_cpu_addr)
  570. continue;
  571. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
  572. SIGP_CC_NOT_OPERATIONAL)
  573. continue;
  574. sa = save_area_alloc(false);
  575. if (!sa)
  576. panic("could not allocate memory for save area\n");
  577. __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, __pa(page));
  578. save_area_add_regs(sa, page);
  579. if (cpu_has_vx()) {
  580. __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, __pa(page));
  581. save_area_add_vxrs(sa, page);
  582. }
  583. }
  584. memblock_free(page, PAGE_SIZE);
  585. diag_amode31_ops.diag308_reset();
  586. pcpu_set_smt(0);
  587. }
  588. #endif /* CONFIG_CRASH_DUMP */
  589. void smp_cpu_set_polarization(int cpu, int val)
  590. {
  591. per_cpu(pcpu_devices, cpu).polarization = val;
  592. }
  593. int smp_cpu_get_polarization(int cpu)
  594. {
  595. return per_cpu(pcpu_devices, cpu).polarization;
  596. }
  597. void smp_cpu_set_capacity(int cpu, unsigned long val)
  598. {
  599. per_cpu(pcpu_devices, cpu).capacity = val;
  600. }
  601. unsigned long smp_cpu_get_capacity(int cpu)
  602. {
  603. return per_cpu(pcpu_devices, cpu).capacity;
  604. }
  605. void smp_set_core_capacity(int cpu, unsigned long val)
  606. {
  607. int i;
  608. cpu = smp_get_base_cpu(cpu);
  609. for (i = cpu; (i <= cpu + smp_cpu_mtid) && (i < nr_cpu_ids); i++)
  610. smp_cpu_set_capacity(i, val);
  611. }
  612. int smp_cpu_get_cpu_address(int cpu)
  613. {
  614. return per_cpu(pcpu_devices, cpu).address;
  615. }
  616. static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
  617. {
  618. static int use_sigp_detection;
  619. int address;
  620. if (use_sigp_detection || sclp_get_core_info(info, early)) {
  621. use_sigp_detection = 1;
  622. for (address = 0;
  623. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  624. address += (1U << smp_cpu_mt_shift)) {
  625. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
  626. SIGP_CC_NOT_OPERATIONAL)
  627. continue;
  628. info->core[info->configured].core_id =
  629. address >> smp_cpu_mt_shift;
  630. info->configured++;
  631. }
  632. info->combined = info->configured;
  633. }
  634. }
  635. static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
  636. bool configured, bool early)
  637. {
  638. struct pcpu *pcpu;
  639. int cpu, nr, i;
  640. u16 address;
  641. nr = 0;
  642. if (sclp.has_core_type && core->type != boot_core_type)
  643. return nr;
  644. cpu = cpumask_first(avail);
  645. address = core->core_id << smp_cpu_mt_shift;
  646. for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
  647. if (pcpu_find_address(cpu_present_mask, address + i))
  648. continue;
  649. pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  650. pcpu->address = address + i;
  651. if (configured)
  652. pcpu->state = CPU_STATE_CONFIGURED;
  653. else
  654. pcpu->state = CPU_STATE_STANDBY;
  655. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  656. smp_cpu_set_capacity(cpu, CPU_CAPACITY_HIGH);
  657. set_cpu_present(cpu, true);
  658. if (!early && arch_register_cpu(cpu))
  659. set_cpu_present(cpu, false);
  660. else
  661. nr++;
  662. cpumask_clear_cpu(cpu, avail);
  663. cpu = cpumask_next(cpu, avail);
  664. }
  665. return nr;
  666. }
  667. static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
  668. {
  669. struct sclp_core_entry *core;
  670. static cpumask_t avail;
  671. bool configured;
  672. u16 core_id;
  673. int nr, i;
  674. cpus_read_lock();
  675. mutex_lock(&smp_cpu_state_mutex);
  676. nr = 0;
  677. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  678. /*
  679. * Add IPL core first (which got logical CPU number 0) to make sure
  680. * that all SMT threads get subsequent logical CPU numbers.
  681. */
  682. if (early) {
  683. core_id = per_cpu(pcpu_devices, 0).address >> smp_cpu_mt_shift;
  684. for (i = 0; i < info->configured; i++) {
  685. core = &info->core[i];
  686. if (core->core_id == core_id) {
  687. nr += smp_add_core(core, &avail, true, early);
  688. break;
  689. }
  690. }
  691. }
  692. for (i = 0; i < info->combined; i++) {
  693. configured = i < info->configured;
  694. nr += smp_add_core(&info->core[i], &avail, configured, early);
  695. }
  696. mutex_unlock(&smp_cpu_state_mutex);
  697. cpus_read_unlock();
  698. return nr;
  699. }
  700. void __init smp_detect_cpus(void)
  701. {
  702. unsigned int cpu, mtid, c_cpus, s_cpus;
  703. struct sclp_core_info *info;
  704. u16 address;
  705. /* Get CPU information */
  706. info = memblock_alloc(sizeof(*info), 8);
  707. if (!info)
  708. panic("%s: Failed to allocate %zu bytes align=0x%x\n",
  709. __func__, sizeof(*info), 8);
  710. smp_get_core_info(info, 1);
  711. /* Find boot CPU type */
  712. if (sclp.has_core_type) {
  713. address = stap();
  714. for (cpu = 0; cpu < info->combined; cpu++)
  715. if (info->core[cpu].core_id == address) {
  716. /* The boot cpu dictates the cpu type. */
  717. boot_core_type = info->core[cpu].type;
  718. break;
  719. }
  720. if (cpu >= info->combined)
  721. panic("Could not find boot CPU type");
  722. }
  723. /* Set multi-threading state for the current system */
  724. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  725. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  726. pcpu_set_smt(mtid);
  727. /* Print number of CPUs */
  728. c_cpus = s_cpus = 0;
  729. for (cpu = 0; cpu < info->combined; cpu++) {
  730. if (sclp.has_core_type &&
  731. info->core[cpu].type != boot_core_type)
  732. continue;
  733. if (cpu < info->configured)
  734. c_cpus += smp_cpu_mtid + 1;
  735. else
  736. s_cpus += smp_cpu_mtid + 1;
  737. }
  738. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  739. memblock_free(info, sizeof(*info));
  740. }
  741. /*
  742. * Activate a secondary processor.
  743. */
  744. static void smp_start_secondary(void *cpuvoid)
  745. {
  746. struct lowcore *lc = get_lowcore();
  747. int cpu = raw_smp_processor_id();
  748. lc->last_update_clock = get_tod_clock();
  749. lc->restart_stack = (unsigned long)restart_stack;
  750. lc->restart_fn = (unsigned long)do_restart;
  751. lc->restart_data = 0;
  752. lc->restart_source = -1U;
  753. lc->restart_flags = 0;
  754. restore_access_regs(lc->access_regs_save_area);
  755. cpu_init();
  756. rcutree_report_cpu_starting(cpu);
  757. init_cpu_timer();
  758. vtime_init();
  759. vdso_getcpu_init();
  760. pfault_init();
  761. cpumask_set_cpu(cpu, &cpu_setup_mask);
  762. update_cpu_masks();
  763. notify_cpu_starting(cpu);
  764. if (topology_cpu_dedicated(cpu))
  765. set_cpu_flag(CIF_DEDICATED_CPU);
  766. else
  767. clear_cpu_flag(CIF_DEDICATED_CPU);
  768. set_cpu_online(cpu, true);
  769. inc_irq_stat(CPU_RST);
  770. local_irq_enable();
  771. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  772. }
  773. /* Upping and downing of CPUs */
  774. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  775. {
  776. struct pcpu *pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  777. int rc;
  778. if (pcpu->state != CPU_STATE_CONFIGURED)
  779. return -EIO;
  780. if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
  781. SIGP_CC_ORDER_CODE_ACCEPTED)
  782. return -EIO;
  783. rc = pcpu_alloc_lowcore(pcpu, cpu);
  784. if (rc)
  785. return rc;
  786. /*
  787. * Make sure global control register contents do not change
  788. * until new CPU has initialized control registers.
  789. */
  790. system_ctlreg_lock();
  791. pcpu_prepare_secondary(pcpu, cpu);
  792. pcpu_attach_task(cpu, tidle);
  793. pcpu_start_fn(cpu, smp_start_secondary, NULL);
  794. /* Wait until cpu puts itself in the online & active maps */
  795. while (!cpu_online(cpu))
  796. cpu_relax();
  797. system_ctlreg_unlock();
  798. return 0;
  799. }
  800. static unsigned int setup_possible_cpus __initdata;
  801. static int __init _setup_possible_cpus(char *s)
  802. {
  803. get_option(&s, &setup_possible_cpus);
  804. return 0;
  805. }
  806. early_param("possible_cpus", _setup_possible_cpus);
  807. int __cpu_disable(void)
  808. {
  809. struct ctlreg cregs[16];
  810. int cpu;
  811. /* Handle possible pending IPIs */
  812. smp_handle_ext_call();
  813. cpu = smp_processor_id();
  814. set_cpu_online(cpu, false);
  815. cpumask_clear_cpu(cpu, &cpu_setup_mask);
  816. update_cpu_masks();
  817. /* Disable pseudo page faults on this cpu. */
  818. pfault_fini();
  819. /* Disable interrupt sources via control register. */
  820. __local_ctl_store(0, 15, cregs);
  821. cregs[0].val &= ~0x0000ee70UL; /* disable all external interrupts */
  822. cregs[6].val &= ~0xff000000UL; /* disable all I/O interrupts */
  823. cregs[14].val &= ~0x1f000000UL; /* disable most machine checks */
  824. __local_ctl_load(0, 15, cregs);
  825. clear_cpu_flag(CIF_NOHZ_DELAY);
  826. return 0;
  827. }
  828. void __cpu_die(unsigned int cpu)
  829. {
  830. struct pcpu *pcpu;
  831. /* Wait until target cpu is down */
  832. pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  833. while (!pcpu_stopped(pcpu))
  834. cpu_relax();
  835. pcpu_free_lowcore(pcpu, cpu);
  836. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  837. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  838. pcpu->flags = 0;
  839. }
  840. void __noreturn cpu_die(void)
  841. {
  842. idle_task_exit();
  843. pcpu_sigp_retry(this_cpu_ptr(&pcpu_devices), SIGP_STOP, 0);
  844. for (;;) ;
  845. }
  846. void __init smp_fill_possible_mask(void)
  847. {
  848. unsigned int possible, sclp_max, cpu;
  849. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  850. sclp_max = min(smp_max_threads, sclp_max);
  851. sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
  852. possible = setup_possible_cpus ?: nr_cpu_ids;
  853. possible = min(possible, sclp_max);
  854. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  855. set_cpu_possible(cpu, true);
  856. }
  857. void __init smp_prepare_cpus(unsigned int max_cpus)
  858. {
  859. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  860. panic("Couldn't request external interrupt 0x1201");
  861. system_ctl_set_bit(0, 14);
  862. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  863. panic("Couldn't request external interrupt 0x1202");
  864. system_ctl_set_bit(0, 13);
  865. smp_rescan_cpus(true);
  866. }
  867. void __init smp_prepare_boot_cpu(void)
  868. {
  869. struct lowcore *lc = get_lowcore();
  870. WARN_ON(!cpu_present(0) || !cpu_online(0));
  871. lc->percpu_offset = __per_cpu_offset[0];
  872. ipl_pcpu = per_cpu_ptr(&pcpu_devices, 0);
  873. ipl_pcpu->state = CPU_STATE_CONFIGURED;
  874. lc->pcpu = (unsigned long)ipl_pcpu;
  875. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  876. smp_cpu_set_capacity(0, CPU_CAPACITY_HIGH);
  877. }
  878. void __init smp_setup_processor_id(void)
  879. {
  880. struct lowcore *lc = get_lowcore();
  881. lc->cpu_nr = 0;
  882. per_cpu(pcpu_devices, 0).address = stap();
  883. lc->spinlock_lockval = arch_spin_lockval(0);
  884. lc->spinlock_index = 0;
  885. }
  886. /*
  887. * the frequency of the profiling timer can be changed
  888. * by writing a multiplier value into /proc/profile.
  889. *
  890. * usually you want to run this on all CPUs ;)
  891. */
  892. int setup_profiling_timer(unsigned int multiplier)
  893. {
  894. return 0;
  895. }
  896. static ssize_t cpu_configure_show(struct device *dev,
  897. struct device_attribute *attr, char *buf)
  898. {
  899. ssize_t count;
  900. mutex_lock(&smp_cpu_state_mutex);
  901. count = sprintf(buf, "%d\n", per_cpu(pcpu_devices, dev->id).state);
  902. mutex_unlock(&smp_cpu_state_mutex);
  903. return count;
  904. }
  905. static ssize_t cpu_configure_store(struct device *dev,
  906. struct device_attribute *attr,
  907. const char *buf, size_t count)
  908. {
  909. struct pcpu *pcpu;
  910. int cpu, val, rc, i;
  911. char delim;
  912. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  913. return -EINVAL;
  914. if (val != 0 && val != 1)
  915. return -EINVAL;
  916. cpus_read_lock();
  917. mutex_lock(&smp_cpu_state_mutex);
  918. rc = -EBUSY;
  919. /* disallow configuration changes of online cpus */
  920. cpu = dev->id;
  921. cpu = smp_get_base_cpu(cpu);
  922. for (i = 0; i <= smp_cpu_mtid; i++)
  923. if (cpu_online(cpu + i))
  924. goto out;
  925. pcpu = per_cpu_ptr(&pcpu_devices, cpu);
  926. rc = 0;
  927. switch (val) {
  928. case 0:
  929. if (pcpu->state != CPU_STATE_CONFIGURED)
  930. break;
  931. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  932. if (rc)
  933. break;
  934. for (i = 0; i <= smp_cpu_mtid; i++) {
  935. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  936. continue;
  937. per_cpu(pcpu_devices, cpu + i).state = CPU_STATE_STANDBY;
  938. smp_cpu_set_polarization(cpu + i,
  939. POLARIZATION_UNKNOWN);
  940. }
  941. topology_expect_change();
  942. break;
  943. case 1:
  944. if (pcpu->state != CPU_STATE_STANDBY)
  945. break;
  946. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  947. if (rc)
  948. break;
  949. for (i = 0; i <= smp_cpu_mtid; i++) {
  950. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  951. continue;
  952. per_cpu(pcpu_devices, cpu + i).state = CPU_STATE_CONFIGURED;
  953. smp_cpu_set_polarization(cpu + i,
  954. POLARIZATION_UNKNOWN);
  955. }
  956. topology_expect_change();
  957. break;
  958. default:
  959. break;
  960. }
  961. out:
  962. mutex_unlock(&smp_cpu_state_mutex);
  963. cpus_read_unlock();
  964. return rc ? rc : count;
  965. }
  966. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  967. static ssize_t show_cpu_address(struct device *dev,
  968. struct device_attribute *attr, char *buf)
  969. {
  970. return sprintf(buf, "%d\n", per_cpu(pcpu_devices, dev->id).address);
  971. }
  972. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  973. static struct attribute *cpu_common_attrs[] = {
  974. &dev_attr_configure.attr,
  975. &dev_attr_address.attr,
  976. NULL,
  977. };
  978. static struct attribute_group cpu_common_attr_group = {
  979. .attrs = cpu_common_attrs,
  980. };
  981. static struct attribute *cpu_online_attrs[] = {
  982. &dev_attr_idle_count.attr,
  983. &dev_attr_idle_time_us.attr,
  984. NULL,
  985. };
  986. static struct attribute_group cpu_online_attr_group = {
  987. .attrs = cpu_online_attrs,
  988. };
  989. static int smp_cpu_online(unsigned int cpu)
  990. {
  991. struct cpu *c = per_cpu_ptr(&cpu_devices, cpu);
  992. return sysfs_create_group(&c->dev.kobj, &cpu_online_attr_group);
  993. }
  994. static int smp_cpu_pre_down(unsigned int cpu)
  995. {
  996. struct cpu *c = per_cpu_ptr(&cpu_devices, cpu);
  997. sysfs_remove_group(&c->dev.kobj, &cpu_online_attr_group);
  998. return 0;
  999. }
  1000. bool arch_cpu_is_hotpluggable(int cpu)
  1001. {
  1002. return !!cpu;
  1003. }
  1004. int arch_register_cpu(int cpu)
  1005. {
  1006. struct cpu *c = per_cpu_ptr(&cpu_devices, cpu);
  1007. int rc;
  1008. c->hotpluggable = arch_cpu_is_hotpluggable(cpu);
  1009. rc = register_cpu(c, cpu);
  1010. if (rc)
  1011. goto out;
  1012. rc = sysfs_create_group(&c->dev.kobj, &cpu_common_attr_group);
  1013. if (rc)
  1014. goto out_cpu;
  1015. rc = topology_cpu_init(c);
  1016. if (rc)
  1017. goto out_topology;
  1018. return 0;
  1019. out_topology:
  1020. sysfs_remove_group(&c->dev.kobj, &cpu_common_attr_group);
  1021. out_cpu:
  1022. unregister_cpu(c);
  1023. out:
  1024. return rc;
  1025. }
  1026. int __ref smp_rescan_cpus(bool early)
  1027. {
  1028. struct sclp_core_info *info;
  1029. int nr;
  1030. info = kzalloc(sizeof(*info), GFP_KERNEL);
  1031. if (!info)
  1032. return -ENOMEM;
  1033. smp_get_core_info(info, 0);
  1034. nr = __smp_rescan_cpus(info, early);
  1035. kfree(info);
  1036. if (nr)
  1037. topology_schedule_update();
  1038. return 0;
  1039. }
  1040. static ssize_t __ref rescan_store(struct device *dev,
  1041. struct device_attribute *attr,
  1042. const char *buf,
  1043. size_t count)
  1044. {
  1045. int rc;
  1046. rc = lock_device_hotplug_sysfs();
  1047. if (rc)
  1048. return rc;
  1049. rc = smp_rescan_cpus(false);
  1050. unlock_device_hotplug();
  1051. return rc ? rc : count;
  1052. }
  1053. static DEVICE_ATTR_WO(rescan);
  1054. static int __init s390_smp_init(void)
  1055. {
  1056. struct device *dev_root;
  1057. int rc;
  1058. dev_root = bus_get_dev_root(&cpu_subsys);
  1059. if (dev_root) {
  1060. rc = device_create_file(dev_root, &dev_attr_rescan);
  1061. put_device(dev_root);
  1062. if (rc)
  1063. return rc;
  1064. }
  1065. rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
  1066. smp_cpu_online, smp_cpu_pre_down);
  1067. rc = rc <= 0 ? rc : 0;
  1068. return rc;
  1069. }
  1070. subsys_initcall(s390_smp_init);