threshold.c 3.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Common corrected MCE threshold handler code:
  4. */
  5. #include <linux/interrupt.h>
  6. #include <linux/kernel.h>
  7. #include <asm/irq_vectors.h>
  8. #include <asm/traps.h>
  9. #include <asm/apic.h>
  10. #include <asm/mce.h>
  11. #include <asm/trace/irq_vectors.h>
  12. #include "internal.h"
  13. static void default_threshold_interrupt(void)
  14. {
  15. pr_err("Unexpected threshold interrupt at vector %x\n",
  16. THRESHOLD_APIC_VECTOR);
  17. }
  18. void (*mce_threshold_vector)(void) = default_threshold_interrupt;
  19. DEFINE_IDTENTRY_SYSVEC(sysvec_threshold)
  20. {
  21. trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR);
  22. inc_irq_stat(irq_threshold_count);
  23. mce_threshold_vector();
  24. trace_threshold_apic_exit(THRESHOLD_APIC_VECTOR);
  25. apic_eoi();
  26. }
  27. DEFINE_PER_CPU(struct mca_storm_desc, storm_desc);
  28. void mce_inherit_storm(unsigned int bank)
  29. {
  30. struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
  31. /*
  32. * Previous CPU owning this bank had put it into storm mode,
  33. * but the precise history of that storm is unknown. Assume
  34. * the worst (all recent polls of the bank found a valid error
  35. * logged). This will avoid the new owner prematurely declaring
  36. * the storm has ended.
  37. */
  38. storm->banks[bank].history = ~0ull;
  39. storm->banks[bank].timestamp = jiffies;
  40. }
  41. bool mce_get_storm_mode(void)
  42. {
  43. return __this_cpu_read(storm_desc.poll_mode);
  44. }
  45. void mce_set_storm_mode(bool storm)
  46. {
  47. __this_cpu_write(storm_desc.poll_mode, storm);
  48. }
  49. static void mce_handle_storm(unsigned int bank, bool on)
  50. {
  51. switch (boot_cpu_data.x86_vendor) {
  52. case X86_VENDOR_INTEL:
  53. mce_intel_handle_storm(bank, on);
  54. break;
  55. }
  56. }
  57. void cmci_storm_begin(unsigned int bank)
  58. {
  59. struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
  60. __set_bit(bank, this_cpu_ptr(mce_poll_banks));
  61. storm->banks[bank].in_storm_mode = true;
  62. /*
  63. * If this is the first bank on this CPU to enter storm mode
  64. * start polling.
  65. */
  66. if (++storm->stormy_bank_count == 1)
  67. mce_timer_kick(true);
  68. }
  69. void cmci_storm_end(unsigned int bank)
  70. {
  71. struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
  72. __clear_bit(bank, this_cpu_ptr(mce_poll_banks));
  73. storm->banks[bank].history = 0;
  74. storm->banks[bank].in_storm_mode = false;
  75. /* If no banks left in storm mode, stop polling. */
  76. if (!this_cpu_dec_return(storm_desc.stormy_bank_count))
  77. mce_timer_kick(false);
  78. }
  79. void mce_track_storm(struct mce *mce)
  80. {
  81. struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
  82. unsigned long now = jiffies, delta;
  83. unsigned int shift = 1;
  84. u64 history = 0;
  85. /* No tracking needed for banks that do not support CMCI */
  86. if (storm->banks[mce->bank].poll_only)
  87. return;
  88. /*
  89. * When a bank is in storm mode it is polled once per second and
  90. * the history mask will record about the last minute of poll results.
  91. * If it is not in storm mode, then the bank is only checked when
  92. * there is a CMCI interrupt. Check how long it has been since
  93. * this bank was last checked, and adjust the amount of "shift"
  94. * to apply to history.
  95. */
  96. if (!storm->banks[mce->bank].in_storm_mode) {
  97. delta = now - storm->banks[mce->bank].timestamp;
  98. shift = (delta + HZ) / HZ;
  99. }
  100. /* If it has been a long time since the last poll, clear history. */
  101. if (shift < NUM_HISTORY_BITS)
  102. history = storm->banks[mce->bank].history << shift;
  103. storm->banks[mce->bank].timestamp = now;
  104. /* History keeps track of corrected errors. VAL=1 && UC=0 */
  105. if ((mce->status & MCI_STATUS_VAL) && mce_is_correctable(mce))
  106. history |= 1;
  107. storm->banks[mce->bank].history = history;
  108. if (storm->banks[mce->bank].in_storm_mode) {
  109. if (history & GENMASK_ULL(STORM_END_POLL_THRESHOLD, 0))
  110. return;
  111. printk_deferred(KERN_NOTICE "CPU%d BANK%d CMCI storm subsided\n", smp_processor_id(), mce->bank);
  112. mce_handle_storm(mce->bank, false);
  113. cmci_storm_end(mce->bank);
  114. } else {
  115. if (hweight64(history) < STORM_BEGIN_THRESHOLD)
  116. return;
  117. printk_deferred(KERN_NOTICE "CPU%d BANK%d CMCI storm detected\n", smp_processor_id(), mce->bank);
  118. mce_handle_storm(mce->bank, true);
  119. cmci_storm_begin(mce->bank);
  120. }
  121. }