traps.c 17 KB

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  1. /*
  2. * arch/xtensa/kernel/traps.c
  3. *
  4. * Exception handling.
  5. *
  6. * Derived from code with the following copyrights:
  7. * Copyright (C) 1994 - 1999 by Ralf Baechle
  8. * Modified for R3000 by Paul M. Antoine, 1995, 1996
  9. * Complete output from die() by Ulf Carlsson, 1998
  10. * Copyright (C) 1999 Silicon Graphics, Inc.
  11. *
  12. * Essentially rewritten for the Xtensa architecture port.
  13. *
  14. * Copyright (C) 2001 - 2013 Tensilica Inc.
  15. *
  16. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  17. * Chris Zankel <chris@zankel.net>
  18. * Marc Gauthier<marc@tensilica.com, marc@alumni.uwaterloo.ca>
  19. * Kevin Chea
  20. *
  21. * This file is subject to the terms and conditions of the GNU General Public
  22. * License. See the file "COPYING" in the main directory of this archive
  23. * for more details.
  24. */
  25. #include <linux/cpu.h>
  26. #include <linux/kernel.h>
  27. #include <linux/sched/signal.h>
  28. #include <linux/sched/debug.h>
  29. #include <linux/sched/task_stack.h>
  30. #include <linux/init.h>
  31. #include <linux/module.h>
  32. #include <linux/stringify.h>
  33. #include <linux/kallsyms.h>
  34. #include <linux/delay.h>
  35. #include <linux/hardirq.h>
  36. #include <linux/ratelimit.h>
  37. #include <linux/pgtable.h>
  38. #include <asm/stacktrace.h>
  39. #include <asm/ptrace.h>
  40. #include <asm/timex.h>
  41. #include <linux/uaccess.h>
  42. #include <asm/processor.h>
  43. #include <asm/traps.h>
  44. #include <asm/hw_breakpoint.h>
  45. /*
  46. * Machine specific interrupt handlers
  47. */
  48. static void do_illegal_instruction(struct pt_regs *regs);
  49. static void do_div0(struct pt_regs *regs);
  50. static void do_interrupt(struct pt_regs *regs);
  51. #if XTENSA_FAKE_NMI
  52. static void do_nmi(struct pt_regs *regs);
  53. #endif
  54. #ifdef CONFIG_XTENSA_LOAD_STORE
  55. static void do_load_store(struct pt_regs *regs);
  56. #endif
  57. static void do_unaligned_user(struct pt_regs *regs);
  58. static void do_multihit(struct pt_regs *regs);
  59. #if XTENSA_HAVE_COPROCESSORS
  60. static void do_coprocessor(struct pt_regs *regs);
  61. #endif
  62. static void do_debug(struct pt_regs *regs);
  63. /*
  64. * The vector table must be preceded by a save area (which
  65. * implies it must be in RAM, unless one places RAM immediately
  66. * before a ROM and puts the vector at the start of the ROM (!))
  67. */
  68. #define KRNL 0x01
  69. #define USER 0x02
  70. #define COPROCESSOR(x) \
  71. { EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER|KRNL, fast_coprocessor },\
  72. { EXCCAUSE_COPROCESSOR ## x ## _DISABLED, 0, do_coprocessor }
  73. typedef struct {
  74. int cause;
  75. int fast;
  76. void* handler;
  77. } dispatch_init_table_t;
  78. static dispatch_init_table_t __initdata dispatch_init_table[] = {
  79. #ifdef CONFIG_USER_ABI_CALL0_PROBE
  80. { EXCCAUSE_ILLEGAL_INSTRUCTION, USER, fast_illegal_instruction_user },
  81. #endif
  82. { EXCCAUSE_ILLEGAL_INSTRUCTION, 0, do_illegal_instruction},
  83. { EXCCAUSE_SYSTEM_CALL, USER, fast_syscall_user },
  84. { EXCCAUSE_SYSTEM_CALL, 0, system_call },
  85. /* EXCCAUSE_INSTRUCTION_FETCH unhandled */
  86. #ifdef CONFIG_XTENSA_LOAD_STORE
  87. { EXCCAUSE_LOAD_STORE_ERROR, USER|KRNL, fast_load_store },
  88. { EXCCAUSE_LOAD_STORE_ERROR, 0, do_load_store },
  89. #endif
  90. { EXCCAUSE_LEVEL1_INTERRUPT, 0, do_interrupt },
  91. #ifdef SUPPORT_WINDOWED
  92. { EXCCAUSE_ALLOCA, USER|KRNL, fast_alloca },
  93. #endif
  94. { EXCCAUSE_INTEGER_DIVIDE_BY_ZERO, 0, do_div0 },
  95. /* EXCCAUSE_PRIVILEGED unhandled */
  96. #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION || \
  97. IS_ENABLED(CONFIG_XTENSA_LOAD_STORE)
  98. #ifdef CONFIG_XTENSA_UNALIGNED_USER
  99. { EXCCAUSE_UNALIGNED, USER, fast_unaligned },
  100. #endif
  101. { EXCCAUSE_UNALIGNED, KRNL, fast_unaligned },
  102. #endif
  103. { EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
  104. #ifdef CONFIG_MMU
  105. { EXCCAUSE_ITLB_MISS, 0, do_page_fault },
  106. { EXCCAUSE_ITLB_MISS, USER|KRNL, fast_second_level_miss},
  107. { EXCCAUSE_DTLB_MISS, USER|KRNL, fast_second_level_miss},
  108. { EXCCAUSE_DTLB_MISS, 0, do_page_fault },
  109. { EXCCAUSE_STORE_CACHE_ATTRIBUTE, USER|KRNL, fast_store_prohibited },
  110. #endif /* CONFIG_MMU */
  111. #ifdef CONFIG_PFAULT
  112. { EXCCAUSE_ITLB_MULTIHIT, 0, do_multihit },
  113. { EXCCAUSE_ITLB_PRIVILEGE, 0, do_page_fault },
  114. { EXCCAUSE_FETCH_CACHE_ATTRIBUTE, 0, do_page_fault },
  115. { EXCCAUSE_DTLB_MULTIHIT, 0, do_multihit },
  116. { EXCCAUSE_DTLB_PRIVILEGE, 0, do_page_fault },
  117. { EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault },
  118. { EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault },
  119. #endif
  120. /* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */
  121. #if XTENSA_HAVE_COPROCESSOR(0)
  122. COPROCESSOR(0),
  123. #endif
  124. #if XTENSA_HAVE_COPROCESSOR(1)
  125. COPROCESSOR(1),
  126. #endif
  127. #if XTENSA_HAVE_COPROCESSOR(2)
  128. COPROCESSOR(2),
  129. #endif
  130. #if XTENSA_HAVE_COPROCESSOR(3)
  131. COPROCESSOR(3),
  132. #endif
  133. #if XTENSA_HAVE_COPROCESSOR(4)
  134. COPROCESSOR(4),
  135. #endif
  136. #if XTENSA_HAVE_COPROCESSOR(5)
  137. COPROCESSOR(5),
  138. #endif
  139. #if XTENSA_HAVE_COPROCESSOR(6)
  140. COPROCESSOR(6),
  141. #endif
  142. #if XTENSA_HAVE_COPROCESSOR(7)
  143. COPROCESSOR(7),
  144. #endif
  145. #if XTENSA_FAKE_NMI
  146. { EXCCAUSE_MAPPED_NMI, 0, do_nmi },
  147. #endif
  148. { EXCCAUSE_MAPPED_DEBUG, 0, do_debug },
  149. { -1, -1, 0 }
  150. };
  151. /* The exception table <exc_table> serves two functions:
  152. * 1. it contains three dispatch tables (fast_user, fast_kernel, default-c)
  153. * 2. it is a temporary memory buffer for the exception handlers.
  154. */
  155. DEFINE_PER_CPU(struct exc_table, exc_table);
  156. DEFINE_PER_CPU(struct debug_table, debug_table);
  157. void die(const char*, struct pt_regs*, long);
  158. static inline void
  159. __die_if_kernel(const char *str, struct pt_regs *regs, long err)
  160. {
  161. if (!user_mode(regs))
  162. die(str, regs, err);
  163. }
  164. #ifdef CONFIG_PRINT_USER_CODE_ON_UNHANDLED_EXCEPTION
  165. static inline void dump_user_code(struct pt_regs *regs)
  166. {
  167. char buf[32];
  168. if (copy_from_user(buf, (void __user *)(regs->pc & -16), sizeof(buf)) == 0) {
  169. print_hex_dump(KERN_INFO, " ", DUMP_PREFIX_NONE,
  170. 32, 1, buf, sizeof(buf), false);
  171. }
  172. }
  173. #else
  174. static inline void dump_user_code(struct pt_regs *regs)
  175. {
  176. }
  177. #endif
  178. /*
  179. * Unhandled Exceptions. Kill user task or panic if in kernel space.
  180. */
  181. void do_unhandled(struct pt_regs *regs)
  182. {
  183. __die_if_kernel("Caught unhandled exception - should not happen",
  184. regs, SIGKILL);
  185. /* If in user mode, send SIGILL signal to current process */
  186. pr_info_ratelimited("Caught unhandled exception in '%s' "
  187. "(pid = %d, pc = %#010lx) - should not happen\n"
  188. "\tEXCCAUSE is %ld\n",
  189. current->comm, task_pid_nr(current), regs->pc,
  190. regs->exccause);
  191. dump_user_code(regs);
  192. force_sig(SIGILL);
  193. }
  194. /*
  195. * Multi-hit exception. This if fatal!
  196. */
  197. static void do_multihit(struct pt_regs *regs)
  198. {
  199. die("Caught multihit exception", regs, SIGKILL);
  200. }
  201. /*
  202. * IRQ handler.
  203. */
  204. #if XTENSA_FAKE_NMI
  205. #define IS_POW2(v) (((v) & ((v) - 1)) == 0)
  206. #if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \
  207. IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL)))
  208. #warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level."
  209. #warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire."
  210. static inline void check_valid_nmi(void)
  211. {
  212. unsigned intread = xtensa_get_sr(interrupt);
  213. unsigned intenable = xtensa_get_sr(intenable);
  214. BUG_ON(intread & intenable &
  215. ~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^
  216. XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^
  217. BIT(XCHAL_PROFILING_INTERRUPT)));
  218. }
  219. #else
  220. static inline void check_valid_nmi(void)
  221. {
  222. }
  223. #endif
  224. irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id);
  225. DEFINE_PER_CPU(unsigned long, nmi_count);
  226. static void do_nmi(struct pt_regs *regs)
  227. {
  228. struct pt_regs *old_regs = set_irq_regs(regs);
  229. nmi_enter();
  230. ++*this_cpu_ptr(&nmi_count);
  231. check_valid_nmi();
  232. xtensa_pmu_irq_handler(0, NULL);
  233. nmi_exit();
  234. set_irq_regs(old_regs);
  235. }
  236. #endif
  237. static void do_interrupt(struct pt_regs *regs)
  238. {
  239. static const unsigned int_level_mask[] = {
  240. 0,
  241. XCHAL_INTLEVEL1_MASK,
  242. XCHAL_INTLEVEL2_MASK,
  243. XCHAL_INTLEVEL3_MASK,
  244. XCHAL_INTLEVEL4_MASK,
  245. XCHAL_INTLEVEL5_MASK,
  246. XCHAL_INTLEVEL6_MASK,
  247. XCHAL_INTLEVEL7_MASK,
  248. };
  249. struct pt_regs *old_regs = set_irq_regs(regs);
  250. unsigned unhandled = ~0u;
  251. irq_enter();
  252. for (;;) {
  253. unsigned intread = xtensa_get_sr(interrupt);
  254. unsigned intenable = xtensa_get_sr(intenable);
  255. unsigned int_at_level = intread & intenable;
  256. unsigned level;
  257. for (level = LOCKLEVEL; level > 0; --level) {
  258. if (int_at_level & int_level_mask[level]) {
  259. int_at_level &= int_level_mask[level];
  260. if (int_at_level & unhandled)
  261. int_at_level &= unhandled;
  262. else
  263. unhandled |= int_level_mask[level];
  264. break;
  265. }
  266. }
  267. if (level == 0)
  268. break;
  269. /* clear lowest pending irq in the unhandled mask */
  270. unhandled ^= (int_at_level & -int_at_level);
  271. do_IRQ(__ffs(int_at_level), regs);
  272. }
  273. irq_exit();
  274. set_irq_regs(old_regs);
  275. }
  276. static bool check_div0(struct pt_regs *regs)
  277. {
  278. static const u8 pattern[] = {'D', 'I', 'V', '0'};
  279. const u8 *p;
  280. u8 buf[5];
  281. if (user_mode(regs)) {
  282. if (copy_from_user(buf, (void __user *)regs->pc + 2, 5))
  283. return false;
  284. p = buf;
  285. } else {
  286. p = (const u8 *)regs->pc + 2;
  287. }
  288. return memcmp(p, pattern, sizeof(pattern)) == 0 ||
  289. memcmp(p + 1, pattern, sizeof(pattern)) == 0;
  290. }
  291. /*
  292. * Illegal instruction. Fatal if in kernel space.
  293. */
  294. static void do_illegal_instruction(struct pt_regs *regs)
  295. {
  296. #ifdef CONFIG_USER_ABI_CALL0_PROBE
  297. /*
  298. * When call0 application encounters an illegal instruction fast
  299. * exception handler will attempt to set PS.WOE and retry failing
  300. * instruction.
  301. * If we get here we know that that instruction is also illegal
  302. * with PS.WOE set, so it's not related to the windowed option
  303. * hence PS.WOE may be cleared.
  304. */
  305. if (regs->pc == current_thread_info()->ps_woe_fix_addr)
  306. regs->ps &= ~PS_WOE_MASK;
  307. #endif
  308. if (check_div0(regs)) {
  309. do_div0(regs);
  310. return;
  311. }
  312. __die_if_kernel("Illegal instruction in kernel", regs, SIGKILL);
  313. /* If in user mode, send SIGILL signal to current process. */
  314. pr_info_ratelimited("Illegal Instruction in '%s' (pid = %d, pc = %#010lx)\n",
  315. current->comm, task_pid_nr(current), regs->pc);
  316. force_sig(SIGILL);
  317. }
  318. static void do_div0(struct pt_regs *regs)
  319. {
  320. __die_if_kernel("Unhandled division by 0 in kernel", regs, SIGKILL);
  321. force_sig_fault(SIGFPE, FPE_INTDIV, (void __user *)regs->pc);
  322. }
  323. #ifdef CONFIG_XTENSA_LOAD_STORE
  324. static void do_load_store(struct pt_regs *regs)
  325. {
  326. __die_if_kernel("Unhandled load/store exception in kernel",
  327. regs, SIGKILL);
  328. pr_info_ratelimited("Load/store error to %08lx in '%s' (pid = %d, pc = %#010lx)\n",
  329. regs->excvaddr, current->comm,
  330. task_pid_nr(current), regs->pc);
  331. force_sig_fault(SIGBUS, BUS_ADRERR, (void *)regs->excvaddr);
  332. }
  333. #endif
  334. /*
  335. * Handle unaligned memory accesses from user space. Kill task.
  336. *
  337. * If CONFIG_UNALIGNED_USER is not set, we don't allow unaligned memory
  338. * accesses causes from user space.
  339. */
  340. static void do_unaligned_user(struct pt_regs *regs)
  341. {
  342. __die_if_kernel("Unhandled unaligned exception in kernel",
  343. regs, SIGKILL);
  344. pr_info_ratelimited("Unaligned memory access to %08lx in '%s' "
  345. "(pid = %d, pc = %#010lx)\n",
  346. regs->excvaddr, current->comm,
  347. task_pid_nr(current), regs->pc);
  348. force_sig_fault(SIGBUS, BUS_ADRALN, (void *) regs->excvaddr);
  349. }
  350. #if XTENSA_HAVE_COPROCESSORS
  351. static void do_coprocessor(struct pt_regs *regs)
  352. {
  353. coprocessor_flush_release_all(current_thread_info());
  354. }
  355. #endif
  356. /* Handle debug events.
  357. * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with
  358. * preemption disabled to avoid rescheduling and keep mapping of hardware
  359. * breakpoint structures to debug registers intact, so that
  360. * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit.
  361. */
  362. static void do_debug(struct pt_regs *regs)
  363. {
  364. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  365. int ret = check_hw_breakpoint(regs);
  366. preempt_enable();
  367. if (ret == 0)
  368. return;
  369. #endif
  370. __die_if_kernel("Breakpoint in kernel", regs, SIGKILL);
  371. /* If in user mode, send SIGTRAP signal to current process */
  372. force_sig(SIGTRAP);
  373. }
  374. #define set_handler(type, cause, handler) \
  375. do { \
  376. unsigned int cpu; \
  377. \
  378. for_each_possible_cpu(cpu) \
  379. per_cpu(exc_table, cpu).type[cause] = (handler);\
  380. } while (0)
  381. /* Set exception C handler - for temporary use when probing exceptions */
  382. xtensa_exception_handler *
  383. __init trap_set_handler(int cause, xtensa_exception_handler *handler)
  384. {
  385. void *previous = per_cpu(exc_table, 0).default_handler[cause];
  386. set_handler(default_handler, cause, handler);
  387. return previous;
  388. }
  389. static void trap_init_excsave(void)
  390. {
  391. xtensa_set_sr(this_cpu_ptr(&exc_table), excsave1);
  392. }
  393. static void trap_init_debug(void)
  394. {
  395. unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table);
  396. this_cpu_ptr(&debug_table)->debug_exception = debug_exception;
  397. __asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL)
  398. :: "a"(debugsave));
  399. }
  400. /*
  401. * Initialize dispatch tables.
  402. *
  403. * The exception vectors are stored compressed the __init section in the
  404. * dispatch_init_table. This function initializes the following three tables
  405. * from that compressed table:
  406. * - fast user first dispatch table for user exceptions
  407. * - fast kernel first dispatch table for kernel exceptions
  408. * - default C-handler C-handler called by the default fast handler.
  409. *
  410. * See vectors.S for more details.
  411. */
  412. void __init trap_init(void)
  413. {
  414. int i;
  415. /* Setup default vectors. */
  416. for (i = 0; i < EXCCAUSE_N; i++) {
  417. set_handler(fast_user_handler, i, user_exception);
  418. set_handler(fast_kernel_handler, i, kernel_exception);
  419. set_handler(default_handler, i, do_unhandled);
  420. }
  421. /* Setup specific handlers. */
  422. for(i = 0; dispatch_init_table[i].cause >= 0; i++) {
  423. int fast = dispatch_init_table[i].fast;
  424. int cause = dispatch_init_table[i].cause;
  425. void *handler = dispatch_init_table[i].handler;
  426. if (fast == 0)
  427. set_handler(default_handler, cause, handler);
  428. if ((fast & USER) != 0)
  429. set_handler(fast_user_handler, cause, handler);
  430. if ((fast & KRNL) != 0)
  431. set_handler(fast_kernel_handler, cause, handler);
  432. }
  433. /* Initialize EXCSAVE_1 to hold the address of the exception table. */
  434. trap_init_excsave();
  435. trap_init_debug();
  436. }
  437. #ifdef CONFIG_SMP
  438. void secondary_trap_init(void)
  439. {
  440. trap_init_excsave();
  441. trap_init_debug();
  442. }
  443. #endif
  444. /*
  445. * This function dumps the current valid window frame and other base registers.
  446. */
  447. void show_regs(struct pt_regs * regs)
  448. {
  449. int i;
  450. show_regs_print_info(KERN_DEFAULT);
  451. for (i = 0; i < 16; i++) {
  452. if ((i % 8) == 0)
  453. pr_info("a%02d:", i);
  454. pr_cont(" %08lx", regs->areg[i]);
  455. }
  456. pr_cont("\n");
  457. pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
  458. regs->pc, regs->ps, regs->depc, regs->excvaddr);
  459. pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
  460. regs->lbeg, regs->lend, regs->lcount, regs->sar);
  461. if (user_mode(regs))
  462. pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
  463. regs->windowbase, regs->windowstart, regs->wmask,
  464. regs->syscall);
  465. }
  466. static int show_trace_cb(struct stackframe *frame, void *data)
  467. {
  468. const char *loglvl = data;
  469. if (kernel_text_address(frame->pc))
  470. printk("%s [<%08lx>] %pB\n",
  471. loglvl, frame->pc, (void *)frame->pc);
  472. return 0;
  473. }
  474. static void show_trace(struct task_struct *task, unsigned long *sp,
  475. const char *loglvl)
  476. {
  477. if (!sp)
  478. sp = stack_pointer(task);
  479. printk("%sCall Trace:\n", loglvl);
  480. walk_stackframe(sp, show_trace_cb, (void *)loglvl);
  481. }
  482. #define STACK_DUMP_ENTRY_SIZE 4
  483. #define STACK_DUMP_LINE_SIZE 16
  484. static size_t kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  485. struct stack_fragment
  486. {
  487. size_t len;
  488. size_t off;
  489. u8 *sp;
  490. const char *loglvl;
  491. };
  492. static int show_stack_fragment_cb(struct stackframe *frame, void *data)
  493. {
  494. struct stack_fragment *sf = data;
  495. while (sf->off < sf->len) {
  496. u8 line[STACK_DUMP_LINE_SIZE];
  497. size_t line_len = sf->len - sf->off > STACK_DUMP_LINE_SIZE ?
  498. STACK_DUMP_LINE_SIZE : sf->len - sf->off;
  499. bool arrow = sf->off == 0;
  500. if (frame && frame->sp == (unsigned long)(sf->sp + sf->off))
  501. arrow = true;
  502. __memcpy(line, sf->sp + sf->off, line_len);
  503. print_hex_dump(sf->loglvl, arrow ? "> " : " ", DUMP_PREFIX_NONE,
  504. STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
  505. line, line_len, false);
  506. sf->off += STACK_DUMP_LINE_SIZE;
  507. if (arrow)
  508. return 0;
  509. }
  510. return 1;
  511. }
  512. void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
  513. {
  514. struct stack_fragment sf;
  515. if (!sp)
  516. sp = stack_pointer(task);
  517. sf.len = min((-(size_t)sp) & (THREAD_SIZE - STACK_DUMP_ENTRY_SIZE),
  518. kstack_depth_to_print * STACK_DUMP_ENTRY_SIZE);
  519. sf.off = 0;
  520. sf.sp = (u8 *)sp;
  521. sf.loglvl = loglvl;
  522. printk("%sStack:\n", loglvl);
  523. walk_stackframe(sp, show_stack_fragment_cb, &sf);
  524. while (sf.off < sf.len)
  525. show_stack_fragment_cb(NULL, &sf);
  526. show_trace(task, sp, loglvl);
  527. }
  528. DEFINE_SPINLOCK(die_lock);
  529. void __noreturn die(const char * str, struct pt_regs * regs, long err)
  530. {
  531. static int die_counter;
  532. const char *pr = "";
  533. if (IS_ENABLED(CONFIG_PREEMPTION))
  534. pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";
  535. console_verbose();
  536. spin_lock_irq(&die_lock);
  537. pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter, pr);
  538. show_regs(regs);
  539. if (!user_mode(regs))
  540. show_stack(NULL, (unsigned long *)regs->areg[1], KERN_INFO);
  541. add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
  542. spin_unlock_irq(&die_lock);
  543. if (in_interrupt())
  544. panic("Fatal exception in interrupt");
  545. if (panic_on_oops)
  546. panic("Fatal exception");
  547. make_task_dead(err);
  548. }