acpi_extlog.c 8.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Extended Error Log driver
  4. *
  5. * Copyright (C) 2013 Intel Corp.
  6. * Author: Chen, Gong <gong.chen@intel.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/acpi.h>
  10. #include <linux/cper.h>
  11. #include <linux/ratelimit.h>
  12. #include <linux/edac.h>
  13. #include <linux/ras.h>
  14. #include <acpi/ghes.h>
  15. #include <asm/cpu.h>
  16. #include <asm/mce.h>
  17. #include "apei/apei-internal.h"
  18. #include <ras/ras_event.h>
  19. #define EXT_ELOG_ENTRY_MASK GENMASK_ULL(51, 0) /* elog entry address mask */
  20. #define EXTLOG_DSM_REV 0x0
  21. #define EXTLOG_FN_ADDR 0x1
  22. #define FLAG_OS_OPTIN BIT(0)
  23. #define ELOG_ENTRY_VALID (1ULL<<63)
  24. #define ELOG_ENTRY_LEN 0x1000
  25. #define EMCA_BUG \
  26. "Can not request iomem region <0x%016llx-0x%016llx> - eMCA disabled\n"
  27. struct extlog_l1_head {
  28. u32 ver; /* Header Version */
  29. u32 hdr_len; /* Header Length */
  30. u64 total_len; /* entire L1 Directory length including this header */
  31. u64 elog_base; /* MCA Error Log Directory base address */
  32. u64 elog_len; /* MCA Error Log Directory length */
  33. u32 flags; /* bit 0 - OS/VMM Opt-in */
  34. u8 rev0[12];
  35. u32 entries; /* Valid L1 Directory entries per logical processor */
  36. u8 rev1[12];
  37. };
  38. static u8 extlog_dsm_uuid[] __initdata = "663E35AF-CC10-41A4-88EA-5470AF055295";
  39. /* L1 table related physical address */
  40. static u64 elog_base;
  41. static size_t elog_size;
  42. static u64 l1_dirbase;
  43. static size_t l1_size;
  44. /* L1 table related virtual address */
  45. static void __iomem *extlog_l1_addr;
  46. static void __iomem *elog_addr;
  47. static void *elog_buf;
  48. static u64 *l1_entry_base;
  49. static u32 l1_percpu_entry;
  50. #define ELOG_IDX(cpu, bank) \
  51. (cpu_physical_id(cpu) * l1_percpu_entry + (bank))
  52. #define ELOG_ENTRY_DATA(idx) \
  53. (*(l1_entry_base + (idx)))
  54. #define ELOG_ENTRY_ADDR(phyaddr) \
  55. (phyaddr - elog_base + (u8 *)elog_addr)
  56. static struct acpi_hest_generic_status *extlog_elog_entry_check(int cpu, int bank)
  57. {
  58. int idx;
  59. u64 data;
  60. struct acpi_hest_generic_status *estatus;
  61. WARN_ON(cpu < 0);
  62. idx = ELOG_IDX(cpu, bank);
  63. data = ELOG_ENTRY_DATA(idx);
  64. if ((data & ELOG_ENTRY_VALID) == 0)
  65. return NULL;
  66. data &= EXT_ELOG_ENTRY_MASK;
  67. estatus = (struct acpi_hest_generic_status *)ELOG_ENTRY_ADDR(data);
  68. /* if no valid data in elog entry, just return */
  69. if (estatus->block_status == 0)
  70. return NULL;
  71. return estatus;
  72. }
  73. static void __print_extlog_rcd(const char *pfx,
  74. struct acpi_hest_generic_status *estatus, int cpu)
  75. {
  76. static atomic_t seqno;
  77. unsigned int curr_seqno;
  78. char pfx_seq[64];
  79. if (!pfx) {
  80. if (estatus->error_severity <= CPER_SEV_CORRECTED)
  81. pfx = KERN_INFO;
  82. else
  83. pfx = KERN_ERR;
  84. }
  85. curr_seqno = atomic_inc_return(&seqno);
  86. snprintf(pfx_seq, sizeof(pfx_seq), "%s{%u}", pfx, curr_seqno);
  87. printk("%s""Hardware error detected on CPU%d\n", pfx_seq, cpu);
  88. cper_estatus_print(pfx_seq, estatus);
  89. }
  90. static int print_extlog_rcd(const char *pfx,
  91. struct acpi_hest_generic_status *estatus, int cpu)
  92. {
  93. /* Not more than 2 messages every 5 seconds */
  94. static DEFINE_RATELIMIT_STATE(ratelimit_corrected, 5*HZ, 2);
  95. static DEFINE_RATELIMIT_STATE(ratelimit_uncorrected, 5*HZ, 2);
  96. struct ratelimit_state *ratelimit;
  97. if (estatus->error_severity == CPER_SEV_CORRECTED ||
  98. (estatus->error_severity == CPER_SEV_INFORMATIONAL))
  99. ratelimit = &ratelimit_corrected;
  100. else
  101. ratelimit = &ratelimit_uncorrected;
  102. if (__ratelimit(ratelimit)) {
  103. __print_extlog_rcd(pfx, estatus, cpu);
  104. return 0;
  105. }
  106. return 1;
  107. }
  108. static int extlog_print(struct notifier_block *nb, unsigned long val,
  109. void *data)
  110. {
  111. struct mce *mce = (struct mce *)data;
  112. int bank = mce->bank;
  113. int cpu = mce->extcpu;
  114. struct acpi_hest_generic_status *estatus, *tmp;
  115. struct acpi_hest_generic_data *gdata;
  116. const guid_t *fru_id;
  117. char *fru_text;
  118. guid_t *sec_type;
  119. static u32 err_seq;
  120. estatus = extlog_elog_entry_check(cpu, bank);
  121. if (!estatus)
  122. return NOTIFY_DONE;
  123. if (mce->kflags & MCE_HANDLED_CEC) {
  124. estatus->block_status = 0;
  125. return NOTIFY_DONE;
  126. }
  127. memcpy(elog_buf, (void *)estatus, ELOG_ENTRY_LEN);
  128. /* clear record status to enable BIOS to update it again */
  129. estatus->block_status = 0;
  130. tmp = (struct acpi_hest_generic_status *)elog_buf;
  131. if (!ras_userspace_consumers()) {
  132. print_extlog_rcd(NULL, tmp, cpu);
  133. goto out;
  134. }
  135. /* log event via trace */
  136. err_seq++;
  137. apei_estatus_for_each_section(tmp, gdata) {
  138. if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID)
  139. fru_id = (guid_t *)gdata->fru_id;
  140. else
  141. fru_id = &guid_null;
  142. if (gdata->validation_bits & CPER_SEC_VALID_FRU_TEXT)
  143. fru_text = gdata->fru_text;
  144. else
  145. fru_text = "";
  146. sec_type = (guid_t *)gdata->section_type;
  147. if (guid_equal(sec_type, &CPER_SEC_PLATFORM_MEM)) {
  148. struct cper_sec_mem_err *mem = acpi_hest_get_payload(gdata);
  149. if (gdata->error_data_length >= sizeof(*mem))
  150. trace_extlog_mem_event(mem, err_seq, fru_id, fru_text,
  151. (u8)gdata->error_severity);
  152. }
  153. }
  154. out:
  155. mce->kflags |= MCE_HANDLED_EXTLOG;
  156. return NOTIFY_OK;
  157. }
  158. static bool __init extlog_get_l1addr(void)
  159. {
  160. guid_t guid;
  161. acpi_handle handle;
  162. union acpi_object *obj;
  163. if (guid_parse(extlog_dsm_uuid, &guid))
  164. return false;
  165. if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
  166. return false;
  167. if (!acpi_check_dsm(handle, &guid, EXTLOG_DSM_REV, 1 << EXTLOG_FN_ADDR))
  168. return false;
  169. obj = acpi_evaluate_dsm_typed(handle, &guid, EXTLOG_DSM_REV,
  170. EXTLOG_FN_ADDR, NULL, ACPI_TYPE_INTEGER);
  171. if (!obj) {
  172. return false;
  173. } else {
  174. l1_dirbase = obj->integer.value;
  175. ACPI_FREE(obj);
  176. }
  177. /* Spec says L1 directory must be 4K aligned, bail out if it isn't */
  178. if (l1_dirbase & ((1 << 12) - 1)) {
  179. pr_warn(FW_BUG "L1 Directory is invalid at physical %llx\n",
  180. l1_dirbase);
  181. return false;
  182. }
  183. return true;
  184. }
  185. static struct notifier_block extlog_mce_dec = {
  186. .notifier_call = extlog_print,
  187. .priority = MCE_PRIO_EXTLOG,
  188. };
  189. static int __init extlog_init(void)
  190. {
  191. struct extlog_l1_head *l1_head;
  192. void __iomem *extlog_l1_hdr;
  193. size_t l1_hdr_size;
  194. struct resource *r;
  195. u64 cap;
  196. int rc;
  197. if (rdmsrl_safe(MSR_IA32_MCG_CAP, &cap) ||
  198. !(cap & MCG_ELOG_P) ||
  199. !extlog_get_l1addr())
  200. return -ENODEV;
  201. rc = -EINVAL;
  202. /* get L1 header to fetch necessary information */
  203. l1_hdr_size = sizeof(struct extlog_l1_head);
  204. r = request_mem_region(l1_dirbase, l1_hdr_size, "L1 DIR HDR");
  205. if (!r) {
  206. pr_warn(FW_BUG EMCA_BUG,
  207. (unsigned long long)l1_dirbase,
  208. (unsigned long long)l1_dirbase + l1_hdr_size);
  209. goto err;
  210. }
  211. extlog_l1_hdr = acpi_os_map_iomem(l1_dirbase, l1_hdr_size);
  212. l1_head = (struct extlog_l1_head *)extlog_l1_hdr;
  213. l1_size = l1_head->total_len;
  214. l1_percpu_entry = l1_head->entries;
  215. elog_base = l1_head->elog_base;
  216. elog_size = l1_head->elog_len;
  217. acpi_os_unmap_iomem(extlog_l1_hdr, l1_hdr_size);
  218. release_mem_region(l1_dirbase, l1_hdr_size);
  219. /* remap L1 header again based on completed information */
  220. r = request_mem_region(l1_dirbase, l1_size, "L1 Table");
  221. if (!r) {
  222. pr_warn(FW_BUG EMCA_BUG,
  223. (unsigned long long)l1_dirbase,
  224. (unsigned long long)l1_dirbase + l1_size);
  225. goto err;
  226. }
  227. extlog_l1_addr = acpi_os_map_iomem(l1_dirbase, l1_size);
  228. l1_entry_base = (u64 *)((u8 *)extlog_l1_addr + l1_hdr_size);
  229. /* remap elog table */
  230. r = request_mem_region(elog_base, elog_size, "Elog Table");
  231. if (!r) {
  232. pr_warn(FW_BUG EMCA_BUG,
  233. (unsigned long long)elog_base,
  234. (unsigned long long)elog_base + elog_size);
  235. goto err_release_l1_dir;
  236. }
  237. elog_addr = acpi_os_map_iomem(elog_base, elog_size);
  238. rc = -ENOMEM;
  239. /* allocate buffer to save elog record */
  240. elog_buf = kmalloc(ELOG_ENTRY_LEN, GFP_KERNEL);
  241. if (elog_buf == NULL)
  242. goto err_release_elog;
  243. mce_register_decode_chain(&extlog_mce_dec);
  244. /* enable OS to be involved to take over management from BIOS */
  245. ((struct extlog_l1_head *)extlog_l1_addr)->flags |= FLAG_OS_OPTIN;
  246. return 0;
  247. err_release_elog:
  248. if (elog_addr)
  249. acpi_os_unmap_iomem(elog_addr, elog_size);
  250. release_mem_region(elog_base, elog_size);
  251. err_release_l1_dir:
  252. if (extlog_l1_addr)
  253. acpi_os_unmap_iomem(extlog_l1_addr, l1_size);
  254. release_mem_region(l1_dirbase, l1_size);
  255. err:
  256. pr_warn(FW_BUG "Extended error log disabled because of problems parsing f/w tables\n");
  257. return rc;
  258. }
  259. static void __exit extlog_exit(void)
  260. {
  261. mce_unregister_decode_chain(&extlog_mce_dec);
  262. if (extlog_l1_addr) {
  263. ((struct extlog_l1_head *)extlog_l1_addr)->flags &= ~FLAG_OS_OPTIN;
  264. acpi_os_unmap_iomem(extlog_l1_addr, l1_size);
  265. }
  266. if (elog_addr)
  267. acpi_os_unmap_iomem(elog_addr, elog_size);
  268. release_mem_region(elog_base, elog_size);
  269. release_mem_region(l1_dirbase, l1_size);
  270. kfree(elog_buf);
  271. }
  272. module_init(extlog_init);
  273. module_exit(extlog_exit);
  274. MODULE_AUTHOR("Chen, Gong <gong.chen@intel.com>");
  275. MODULE_DESCRIPTION("Extended MCA Error Log Driver");
  276. MODULE_LICENSE("GPL");