safexcel_hash.c 86 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2017 Marvell
  4. *
  5. * Antoine Tenart <antoine.tenart@free-electrons.com>
  6. */
  7. #include <crypto/aes.h>
  8. #include <crypto/hmac.h>
  9. #include <crypto/md5.h>
  10. #include <crypto/sha1.h>
  11. #include <crypto/sha2.h>
  12. #include <crypto/sha3.h>
  13. #include <crypto/skcipher.h>
  14. #include <crypto/sm3.h>
  15. #include <crypto/internal/cipher.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/dmapool.h>
  19. #include "safexcel.h"
  20. struct safexcel_ahash_ctx {
  21. struct safexcel_context base;
  22. u32 alg;
  23. u8 key_sz;
  24. bool cbcmac;
  25. bool do_fallback;
  26. bool fb_init_done;
  27. bool fb_do_setkey;
  28. struct crypto_aes_ctx *aes;
  29. struct crypto_ahash *fback;
  30. struct crypto_shash *shpre;
  31. struct shash_desc *shdesc;
  32. };
  33. struct safexcel_ahash_req {
  34. bool last_req;
  35. bool finish;
  36. bool hmac;
  37. bool needs_inv;
  38. bool hmac_zlen;
  39. bool len_is_le;
  40. bool not_first;
  41. bool xcbcmac;
  42. int nents;
  43. dma_addr_t result_dma;
  44. u32 digest;
  45. u8 state_sz; /* expected state size, only set once */
  46. u8 block_sz; /* block size, only set once */
  47. u8 digest_sz; /* output digest size, only set once */
  48. __le32 state[SHA3_512_BLOCK_SIZE /
  49. sizeof(__le32)] __aligned(sizeof(__le32));
  50. u64 len;
  51. u64 processed;
  52. u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32));
  53. dma_addr_t cache_dma;
  54. unsigned int cache_sz;
  55. u8 cache_next[HASH_CACHE_SIZE] __aligned(sizeof(u32));
  56. };
  57. static inline u64 safexcel_queued_len(struct safexcel_ahash_req *req)
  58. {
  59. return req->len - req->processed;
  60. }
  61. static void safexcel_hash_token(struct safexcel_command_desc *cdesc,
  62. u32 input_length, u32 result_length,
  63. bool cbcmac)
  64. {
  65. struct safexcel_token *token =
  66. (struct safexcel_token *)cdesc->control_data.token;
  67. token[0].opcode = EIP197_TOKEN_OPCODE_DIRECTION;
  68. token[0].packet_length = input_length;
  69. token[0].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  70. input_length &= 15;
  71. if (unlikely(cbcmac && input_length)) {
  72. token[0].stat = 0;
  73. token[1].opcode = EIP197_TOKEN_OPCODE_INSERT;
  74. token[1].packet_length = 16 - input_length;
  75. token[1].stat = EIP197_TOKEN_STAT_LAST_HASH;
  76. token[1].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  77. } else {
  78. token[0].stat = EIP197_TOKEN_STAT_LAST_HASH;
  79. eip197_noop_token(&token[1]);
  80. }
  81. token[2].opcode = EIP197_TOKEN_OPCODE_INSERT;
  82. token[2].stat = EIP197_TOKEN_STAT_LAST_HASH |
  83. EIP197_TOKEN_STAT_LAST_PACKET;
  84. token[2].packet_length = result_length;
  85. token[2].instructions = EIP197_TOKEN_INS_TYPE_OUTPUT |
  86. EIP197_TOKEN_INS_INSERT_HASH_DIGEST;
  87. eip197_noop_token(&token[3]);
  88. }
  89. static void safexcel_context_control(struct safexcel_ahash_ctx *ctx,
  90. struct safexcel_ahash_req *req,
  91. struct safexcel_command_desc *cdesc)
  92. {
  93. struct safexcel_crypto_priv *priv = ctx->base.priv;
  94. u64 count = 0;
  95. cdesc->control_data.control0 = ctx->alg;
  96. cdesc->control_data.control1 = 0;
  97. /*
  98. * Copy the input digest if needed, and setup the context
  99. * fields. Do this now as we need it to setup the first command
  100. * descriptor.
  101. */
  102. if (unlikely(req->digest == CONTEXT_CONTROL_DIGEST_XCM)) {
  103. if (req->xcbcmac)
  104. memcpy(ctx->base.ctxr->data, &ctx->base.ipad, ctx->key_sz);
  105. else
  106. memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
  107. if (!req->finish && req->xcbcmac)
  108. cdesc->control_data.control0 |=
  109. CONTEXT_CONTROL_DIGEST_XCM |
  110. CONTEXT_CONTROL_TYPE_HASH_OUT |
  111. CONTEXT_CONTROL_NO_FINISH_HASH |
  112. CONTEXT_CONTROL_SIZE(req->state_sz /
  113. sizeof(u32));
  114. else
  115. cdesc->control_data.control0 |=
  116. CONTEXT_CONTROL_DIGEST_XCM |
  117. CONTEXT_CONTROL_TYPE_HASH_OUT |
  118. CONTEXT_CONTROL_SIZE(req->state_sz /
  119. sizeof(u32));
  120. return;
  121. } else if (!req->processed) {
  122. /* First - and possibly only - block of basic hash only */
  123. if (req->finish)
  124. cdesc->control_data.control0 |= req->digest |
  125. CONTEXT_CONTROL_TYPE_HASH_OUT |
  126. CONTEXT_CONTROL_RESTART_HASH |
  127. /* ensure its not 0! */
  128. CONTEXT_CONTROL_SIZE(1);
  129. else
  130. cdesc->control_data.control0 |= req->digest |
  131. CONTEXT_CONTROL_TYPE_HASH_OUT |
  132. CONTEXT_CONTROL_RESTART_HASH |
  133. CONTEXT_CONTROL_NO_FINISH_HASH |
  134. /* ensure its not 0! */
  135. CONTEXT_CONTROL_SIZE(1);
  136. return;
  137. }
  138. /* Hash continuation or HMAC, setup (inner) digest from state */
  139. memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
  140. if (req->finish) {
  141. /* Compute digest count for hash/HMAC finish operations */
  142. if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
  143. req->hmac_zlen || (req->processed != req->block_sz)) {
  144. count = req->processed / EIP197_COUNTER_BLOCK_SIZE;
  145. /* This is a hardware limitation, as the
  146. * counter must fit into an u32. This represents
  147. * a fairly big amount of input data, so we
  148. * shouldn't see this.
  149. */
  150. if (unlikely(count & 0xffffffff00000000ULL)) {
  151. dev_warn(priv->dev,
  152. "Input data is too big\n");
  153. return;
  154. }
  155. }
  156. if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
  157. /* Special case: zero length HMAC */
  158. req->hmac_zlen ||
  159. /* PE HW < 4.4 cannot do HMAC continue, fake using hash */
  160. (req->processed != req->block_sz)) {
  161. /* Basic hash continue operation, need digest + cnt */
  162. cdesc->control_data.control0 |=
  163. CONTEXT_CONTROL_SIZE((req->state_sz >> 2) + 1) |
  164. CONTEXT_CONTROL_TYPE_HASH_OUT |
  165. CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  166. /* For zero-len HMAC, don't finalize, already padded! */
  167. if (req->hmac_zlen)
  168. cdesc->control_data.control0 |=
  169. CONTEXT_CONTROL_NO_FINISH_HASH;
  170. cdesc->control_data.control1 |=
  171. CONTEXT_CONTROL_DIGEST_CNT;
  172. ctx->base.ctxr->data[req->state_sz >> 2] =
  173. cpu_to_le32(count);
  174. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  175. /* Clear zero-length HMAC flag for next operation! */
  176. req->hmac_zlen = false;
  177. } else { /* HMAC */
  178. /* Need outer digest for HMAC finalization */
  179. memcpy(ctx->base.ctxr->data + (req->state_sz >> 2),
  180. &ctx->base.opad, req->state_sz);
  181. /* Single pass HMAC - no digest count */
  182. cdesc->control_data.control0 |=
  183. CONTEXT_CONTROL_SIZE(req->state_sz >> 1) |
  184. CONTEXT_CONTROL_TYPE_HASH_OUT |
  185. CONTEXT_CONTROL_DIGEST_HMAC;
  186. }
  187. } else { /* Hash continuation, do not finish yet */
  188. cdesc->control_data.control0 |=
  189. CONTEXT_CONTROL_SIZE(req->state_sz >> 2) |
  190. CONTEXT_CONTROL_DIGEST_PRECOMPUTED |
  191. CONTEXT_CONTROL_TYPE_HASH_OUT |
  192. CONTEXT_CONTROL_NO_FINISH_HASH;
  193. }
  194. }
  195. static int safexcel_ahash_enqueue(struct ahash_request *areq);
  196. static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv,
  197. int ring,
  198. struct crypto_async_request *async,
  199. bool *should_complete, int *ret)
  200. {
  201. struct safexcel_result_desc *rdesc;
  202. struct ahash_request *areq = ahash_request_cast(async);
  203. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  204. struct safexcel_ahash_req *sreq = ahash_request_ctx_dma(areq);
  205. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  206. u64 cache_len;
  207. *ret = 0;
  208. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  209. if (IS_ERR(rdesc)) {
  210. dev_err(priv->dev,
  211. "hash: result: could not retrieve the result descriptor\n");
  212. *ret = PTR_ERR(rdesc);
  213. } else {
  214. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  215. }
  216. safexcel_complete(priv, ring);
  217. if (sreq->nents) {
  218. dma_unmap_sg(priv->dev, areq->src,
  219. sg_nents_for_len(areq->src, areq->nbytes),
  220. DMA_TO_DEVICE);
  221. sreq->nents = 0;
  222. }
  223. if (sreq->result_dma) {
  224. dma_unmap_single(priv->dev, sreq->result_dma, sreq->digest_sz,
  225. DMA_FROM_DEVICE);
  226. sreq->result_dma = 0;
  227. }
  228. if (sreq->cache_dma) {
  229. dma_unmap_single(priv->dev, sreq->cache_dma, sreq->cache_sz,
  230. DMA_TO_DEVICE);
  231. sreq->cache_dma = 0;
  232. sreq->cache_sz = 0;
  233. }
  234. if (sreq->finish) {
  235. if (sreq->hmac &&
  236. (sreq->digest != CONTEXT_CONTROL_DIGEST_HMAC)) {
  237. /* Faking HMAC using hash - need to do outer hash */
  238. memcpy(sreq->cache, sreq->state,
  239. crypto_ahash_digestsize(ahash));
  240. memcpy(sreq->state, &ctx->base.opad, sreq->digest_sz);
  241. sreq->len = sreq->block_sz +
  242. crypto_ahash_digestsize(ahash);
  243. sreq->processed = sreq->block_sz;
  244. sreq->hmac = 0;
  245. if (priv->flags & EIP197_TRC_CACHE)
  246. ctx->base.needs_inv = true;
  247. areq->nbytes = 0;
  248. safexcel_ahash_enqueue(areq);
  249. *should_complete = false; /* Not done yet */
  250. return 1;
  251. }
  252. if (unlikely(sreq->digest == CONTEXT_CONTROL_DIGEST_XCM &&
  253. ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_CRC32)) {
  254. /* Undo final XOR with 0xffffffff ...*/
  255. *(__le32 *)areq->result = ~sreq->state[0];
  256. } else {
  257. memcpy(areq->result, sreq->state,
  258. crypto_ahash_digestsize(ahash));
  259. }
  260. }
  261. cache_len = safexcel_queued_len(sreq);
  262. if (cache_len)
  263. memcpy(sreq->cache, sreq->cache_next, cache_len);
  264. *should_complete = true;
  265. return 1;
  266. }
  267. static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
  268. int *commands, int *results)
  269. {
  270. struct ahash_request *areq = ahash_request_cast(async);
  271. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  272. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  273. struct safexcel_crypto_priv *priv = ctx->base.priv;
  274. struct safexcel_command_desc *cdesc, *first_cdesc = NULL;
  275. struct safexcel_result_desc *rdesc;
  276. struct scatterlist *sg;
  277. struct safexcel_token *dmmy;
  278. int i, extra = 0, n_cdesc = 0, ret = 0, cache_len, skip = 0;
  279. u64 queued, len;
  280. queued = safexcel_queued_len(req);
  281. if (queued <= HASH_CACHE_SIZE)
  282. cache_len = queued;
  283. else
  284. cache_len = queued - areq->nbytes;
  285. if (!req->finish && !req->last_req) {
  286. /* If this is not the last request and the queued data does not
  287. * fit into full cache blocks, cache it for the next send call.
  288. */
  289. extra = queued & (HASH_CACHE_SIZE - 1);
  290. /* If this is not the last request and the queued data
  291. * is a multiple of a block, cache the last one for now.
  292. */
  293. if (!extra)
  294. extra = HASH_CACHE_SIZE;
  295. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  296. req->cache_next, extra,
  297. areq->nbytes - extra);
  298. queued -= extra;
  299. if (!queued) {
  300. *commands = 0;
  301. *results = 0;
  302. return 0;
  303. }
  304. extra = 0;
  305. }
  306. if (unlikely(req->xcbcmac && req->processed > AES_BLOCK_SIZE)) {
  307. if (unlikely(cache_len < AES_BLOCK_SIZE)) {
  308. /*
  309. * Cache contains less than 1 full block, complete.
  310. */
  311. extra = AES_BLOCK_SIZE - cache_len;
  312. if (queued > cache_len) {
  313. /* More data follows: borrow bytes */
  314. u64 tmp = queued - cache_len;
  315. skip = min_t(u64, tmp, extra);
  316. sg_pcopy_to_buffer(areq->src,
  317. sg_nents(areq->src),
  318. req->cache + cache_len,
  319. skip, 0);
  320. }
  321. extra -= skip;
  322. memset(req->cache + cache_len + skip, 0, extra);
  323. if (!ctx->cbcmac && extra) {
  324. // 10- padding for XCBCMAC & CMAC
  325. req->cache[cache_len + skip] = 0x80;
  326. // HW will use K2 iso K3 - compensate!
  327. for (i = 0; i < AES_BLOCK_SIZE / 4; i++) {
  328. u32 *cache = (void *)req->cache;
  329. u32 *ipad = ctx->base.ipad.word;
  330. u32 x;
  331. x = ipad[i] ^ ipad[i + 4];
  332. cache[i] ^= swab32(x);
  333. }
  334. }
  335. cache_len = AES_BLOCK_SIZE;
  336. queued = queued + extra;
  337. }
  338. /* XCBC continue: XOR previous result into 1st word */
  339. crypto_xor(req->cache, (const u8 *)req->state, AES_BLOCK_SIZE);
  340. }
  341. len = queued;
  342. /* Add a command descriptor for the cached data, if any */
  343. if (cache_len) {
  344. req->cache_dma = dma_map_single(priv->dev, req->cache,
  345. cache_len, DMA_TO_DEVICE);
  346. if (dma_mapping_error(priv->dev, req->cache_dma))
  347. return -EINVAL;
  348. req->cache_sz = cache_len;
  349. first_cdesc = safexcel_add_cdesc(priv, ring, 1,
  350. (cache_len == len),
  351. req->cache_dma, cache_len,
  352. len, ctx->base.ctxr_dma,
  353. &dmmy);
  354. if (IS_ERR(first_cdesc)) {
  355. ret = PTR_ERR(first_cdesc);
  356. goto unmap_cache;
  357. }
  358. n_cdesc++;
  359. queued -= cache_len;
  360. if (!queued)
  361. goto send_command;
  362. }
  363. /* Now handle the current ahash request buffer(s) */
  364. req->nents = dma_map_sg(priv->dev, areq->src,
  365. sg_nents_for_len(areq->src,
  366. areq->nbytes),
  367. DMA_TO_DEVICE);
  368. if (!req->nents) {
  369. ret = -ENOMEM;
  370. goto cdesc_rollback;
  371. }
  372. for_each_sg(areq->src, sg, req->nents, i) {
  373. int sglen = sg_dma_len(sg);
  374. if (unlikely(sglen <= skip)) {
  375. skip -= sglen;
  376. continue;
  377. }
  378. /* Do not overflow the request */
  379. if ((queued + skip) <= sglen)
  380. sglen = queued;
  381. else
  382. sglen -= skip;
  383. cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc,
  384. !(queued - sglen),
  385. sg_dma_address(sg) + skip, sglen,
  386. len, ctx->base.ctxr_dma, &dmmy);
  387. if (IS_ERR(cdesc)) {
  388. ret = PTR_ERR(cdesc);
  389. goto unmap_sg;
  390. }
  391. if (!n_cdesc)
  392. first_cdesc = cdesc;
  393. n_cdesc++;
  394. queued -= sglen;
  395. if (!queued)
  396. break;
  397. skip = 0;
  398. }
  399. send_command:
  400. /* Setup the context options */
  401. safexcel_context_control(ctx, req, first_cdesc);
  402. /* Add the token */
  403. safexcel_hash_token(first_cdesc, len, req->digest_sz, ctx->cbcmac);
  404. req->result_dma = dma_map_single(priv->dev, req->state, req->digest_sz,
  405. DMA_FROM_DEVICE);
  406. if (dma_mapping_error(priv->dev, req->result_dma)) {
  407. ret = -EINVAL;
  408. goto unmap_sg;
  409. }
  410. /* Add a result descriptor */
  411. rdesc = safexcel_add_rdesc(priv, ring, 1, 1, req->result_dma,
  412. req->digest_sz);
  413. if (IS_ERR(rdesc)) {
  414. ret = PTR_ERR(rdesc);
  415. goto unmap_result;
  416. }
  417. safexcel_rdr_req_set(priv, ring, rdesc, &areq->base);
  418. req->processed += len - extra;
  419. *commands = n_cdesc;
  420. *results = 1;
  421. return 0;
  422. unmap_result:
  423. dma_unmap_single(priv->dev, req->result_dma, req->digest_sz,
  424. DMA_FROM_DEVICE);
  425. unmap_sg:
  426. if (req->nents) {
  427. dma_unmap_sg(priv->dev, areq->src,
  428. sg_nents_for_len(areq->src, areq->nbytes),
  429. DMA_TO_DEVICE);
  430. req->nents = 0;
  431. }
  432. cdesc_rollback:
  433. for (i = 0; i < n_cdesc; i++)
  434. safexcel_ring_rollback_wptr(priv, &priv->ring[ring].cdr);
  435. unmap_cache:
  436. if (req->cache_dma) {
  437. dma_unmap_single(priv->dev, req->cache_dma, req->cache_sz,
  438. DMA_TO_DEVICE);
  439. req->cache_dma = 0;
  440. req->cache_sz = 0;
  441. }
  442. return ret;
  443. }
  444. static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
  445. int ring,
  446. struct crypto_async_request *async,
  447. bool *should_complete, int *ret)
  448. {
  449. struct safexcel_result_desc *rdesc;
  450. struct ahash_request *areq = ahash_request_cast(async);
  451. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  452. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  453. int enq_ret;
  454. *ret = 0;
  455. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  456. if (IS_ERR(rdesc)) {
  457. dev_err(priv->dev,
  458. "hash: invalidate: could not retrieve the result descriptor\n");
  459. *ret = PTR_ERR(rdesc);
  460. } else {
  461. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  462. }
  463. safexcel_complete(priv, ring);
  464. if (ctx->base.exit_inv) {
  465. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  466. ctx->base.ctxr_dma);
  467. *should_complete = true;
  468. return 1;
  469. }
  470. ring = safexcel_select_ring(priv);
  471. ctx->base.ring = ring;
  472. spin_lock_bh(&priv->ring[ring].queue_lock);
  473. enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
  474. spin_unlock_bh(&priv->ring[ring].queue_lock);
  475. if (enq_ret != -EINPROGRESS)
  476. *ret = enq_ret;
  477. queue_work(priv->ring[ring].workqueue,
  478. &priv->ring[ring].work_data.work);
  479. *should_complete = false;
  480. return 1;
  481. }
  482. static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
  483. struct crypto_async_request *async,
  484. bool *should_complete, int *ret)
  485. {
  486. struct ahash_request *areq = ahash_request_cast(async);
  487. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  488. int err;
  489. BUG_ON(!(priv->flags & EIP197_TRC_CACHE) && req->needs_inv);
  490. if (req->needs_inv) {
  491. req->needs_inv = false;
  492. err = safexcel_handle_inv_result(priv, ring, async,
  493. should_complete, ret);
  494. } else {
  495. err = safexcel_handle_req_result(priv, ring, async,
  496. should_complete, ret);
  497. }
  498. return err;
  499. }
  500. static int safexcel_ahash_send_inv(struct crypto_async_request *async,
  501. int ring, int *commands, int *results)
  502. {
  503. struct ahash_request *areq = ahash_request_cast(async);
  504. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  505. int ret;
  506. ret = safexcel_invalidate_cache(async, ctx->base.priv,
  507. ctx->base.ctxr_dma, ring);
  508. if (unlikely(ret))
  509. return ret;
  510. *commands = 1;
  511. *results = 1;
  512. return 0;
  513. }
  514. static int safexcel_ahash_send(struct crypto_async_request *async,
  515. int ring, int *commands, int *results)
  516. {
  517. struct ahash_request *areq = ahash_request_cast(async);
  518. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  519. int ret;
  520. if (req->needs_inv)
  521. ret = safexcel_ahash_send_inv(async, ring, commands, results);
  522. else
  523. ret = safexcel_ahash_send_req(async, ring, commands, results);
  524. return ret;
  525. }
  526. static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm)
  527. {
  528. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  529. struct safexcel_crypto_priv *priv = ctx->base.priv;
  530. EIP197_REQUEST_ON_STACK(req, ahash, EIP197_AHASH_REQ_SIZE);
  531. struct safexcel_ahash_req *rctx = ahash_request_ctx_dma(req);
  532. DECLARE_CRYPTO_WAIT(result);
  533. int ring = ctx->base.ring;
  534. int err;
  535. memset(req, 0, EIP197_AHASH_REQ_SIZE);
  536. /* create invalidation request */
  537. init_completion(&result.completion);
  538. ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  539. crypto_req_done, &result);
  540. ahash_request_set_tfm(req, __crypto_ahash_cast(tfm));
  541. ctx = crypto_tfm_ctx(req->base.tfm);
  542. ctx->base.exit_inv = true;
  543. rctx->needs_inv = true;
  544. spin_lock_bh(&priv->ring[ring].queue_lock);
  545. crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
  546. spin_unlock_bh(&priv->ring[ring].queue_lock);
  547. queue_work(priv->ring[ring].workqueue,
  548. &priv->ring[ring].work_data.work);
  549. err = crypto_wait_req(-EINPROGRESS, &result);
  550. if (err) {
  551. dev_warn(priv->dev, "hash: completion error (%d)\n", err);
  552. return err;
  553. }
  554. return 0;
  555. }
  556. /* safexcel_ahash_cache: cache data until at least one request can be sent to
  557. * the engine, aka. when there is at least 1 block size in the pipe.
  558. */
  559. static int safexcel_ahash_cache(struct ahash_request *areq)
  560. {
  561. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  562. u64 cache_len;
  563. /* cache_len: everything accepted by the driver but not sent yet,
  564. * tot sz handled by update() - last req sz - tot sz handled by send()
  565. */
  566. cache_len = safexcel_queued_len(req);
  567. /*
  568. * In case there isn't enough bytes to proceed (less than a
  569. * block size), cache the data until we have enough.
  570. */
  571. if (cache_len + areq->nbytes <= HASH_CACHE_SIZE) {
  572. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  573. req->cache + cache_len,
  574. areq->nbytes, 0);
  575. return 0;
  576. }
  577. /* We couldn't cache all the data */
  578. return -E2BIG;
  579. }
  580. static int safexcel_ahash_enqueue(struct ahash_request *areq)
  581. {
  582. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  583. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  584. struct safexcel_crypto_priv *priv = ctx->base.priv;
  585. int ret, ring;
  586. req->needs_inv = false;
  587. if (ctx->base.ctxr) {
  588. if (priv->flags & EIP197_TRC_CACHE && !ctx->base.needs_inv &&
  589. /* invalidate for *any* non-XCBC continuation */
  590. ((req->not_first && !req->xcbcmac) ||
  591. /* invalidate if (i)digest changed */
  592. memcmp(ctx->base.ctxr->data, req->state, req->state_sz) ||
  593. /* invalidate for HMAC finish with odigest changed */
  594. (req->finish && req->hmac &&
  595. memcmp(ctx->base.ctxr->data + (req->state_sz>>2),
  596. &ctx->base.opad, req->state_sz))))
  597. /*
  598. * We're still setting needs_inv here, even though it is
  599. * cleared right away, because the needs_inv flag can be
  600. * set in other functions and we want to keep the same
  601. * logic.
  602. */
  603. ctx->base.needs_inv = true;
  604. if (ctx->base.needs_inv) {
  605. ctx->base.needs_inv = false;
  606. req->needs_inv = true;
  607. }
  608. } else {
  609. ctx->base.ring = safexcel_select_ring(priv);
  610. ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
  611. EIP197_GFP_FLAGS(areq->base),
  612. &ctx->base.ctxr_dma);
  613. if (!ctx->base.ctxr)
  614. return -ENOMEM;
  615. }
  616. req->not_first = true;
  617. ring = ctx->base.ring;
  618. spin_lock_bh(&priv->ring[ring].queue_lock);
  619. ret = crypto_enqueue_request(&priv->ring[ring].queue, &areq->base);
  620. spin_unlock_bh(&priv->ring[ring].queue_lock);
  621. queue_work(priv->ring[ring].workqueue,
  622. &priv->ring[ring].work_data.work);
  623. return ret;
  624. }
  625. static int safexcel_ahash_update(struct ahash_request *areq)
  626. {
  627. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  628. int ret;
  629. /* If the request is 0 length, do nothing */
  630. if (!areq->nbytes)
  631. return 0;
  632. /* Add request to the cache if it fits */
  633. ret = safexcel_ahash_cache(areq);
  634. /* Update total request length */
  635. req->len += areq->nbytes;
  636. /* If not all data could fit into the cache, go process the excess.
  637. * Also go process immediately for an HMAC IV precompute, which
  638. * will never be finished at all, but needs to be processed anyway.
  639. */
  640. if ((ret && !req->finish) || req->last_req)
  641. return safexcel_ahash_enqueue(areq);
  642. return 0;
  643. }
  644. static int safexcel_ahash_final(struct ahash_request *areq)
  645. {
  646. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  647. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  648. req->finish = true;
  649. if (unlikely(!req->len && !areq->nbytes)) {
  650. /*
  651. * If we have an overall 0 length *hash* request:
  652. * The HW cannot do 0 length hash, so we provide the correct
  653. * result directly here.
  654. */
  655. if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5)
  656. memcpy(areq->result, md5_zero_message_hash,
  657. MD5_DIGEST_SIZE);
  658. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA1)
  659. memcpy(areq->result, sha1_zero_message_hash,
  660. SHA1_DIGEST_SIZE);
  661. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA224)
  662. memcpy(areq->result, sha224_zero_message_hash,
  663. SHA224_DIGEST_SIZE);
  664. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA256)
  665. memcpy(areq->result, sha256_zero_message_hash,
  666. SHA256_DIGEST_SIZE);
  667. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA384)
  668. memcpy(areq->result, sha384_zero_message_hash,
  669. SHA384_DIGEST_SIZE);
  670. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA512)
  671. memcpy(areq->result, sha512_zero_message_hash,
  672. SHA512_DIGEST_SIZE);
  673. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SM3) {
  674. memcpy(areq->result,
  675. EIP197_SM3_ZEROM_HASH, SM3_DIGEST_SIZE);
  676. }
  677. return 0;
  678. } else if (unlikely(req->digest == CONTEXT_CONTROL_DIGEST_XCM &&
  679. ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5 &&
  680. req->len == sizeof(u32) && !areq->nbytes)) {
  681. /* Zero length CRC32 */
  682. memcpy(areq->result, &ctx->base.ipad, sizeof(u32));
  683. return 0;
  684. } else if (unlikely(ctx->cbcmac && req->len == AES_BLOCK_SIZE &&
  685. !areq->nbytes)) {
  686. /* Zero length CBC MAC */
  687. memset(areq->result, 0, AES_BLOCK_SIZE);
  688. return 0;
  689. } else if (unlikely(req->xcbcmac && req->len == AES_BLOCK_SIZE &&
  690. !areq->nbytes)) {
  691. /* Zero length (X)CBC/CMAC */
  692. int i;
  693. for (i = 0; i < AES_BLOCK_SIZE / sizeof(u32); i++) {
  694. u32 *result = (void *)areq->result;
  695. /* K3 */
  696. result[i] = swab32(ctx->base.ipad.word[i + 4]);
  697. }
  698. areq->result[0] ^= 0x80; // 10- padding
  699. aes_encrypt(ctx->aes, areq->result, areq->result);
  700. return 0;
  701. } else if (unlikely(req->hmac &&
  702. (req->len == req->block_sz) &&
  703. !areq->nbytes)) {
  704. /*
  705. * If we have an overall 0 length *HMAC* request:
  706. * For HMAC, we need to finalize the inner digest
  707. * and then perform the outer hash.
  708. */
  709. /* generate pad block in the cache */
  710. /* start with a hash block of all zeroes */
  711. memset(req->cache, 0, req->block_sz);
  712. /* set the first byte to 0x80 to 'append a 1 bit' */
  713. req->cache[0] = 0x80;
  714. /* add the length in bits in the last 2 bytes */
  715. if (req->len_is_le) {
  716. /* Little endian length word (e.g. MD5) */
  717. req->cache[req->block_sz-8] = (req->block_sz << 3) &
  718. 255;
  719. req->cache[req->block_sz-7] = (req->block_sz >> 5);
  720. } else {
  721. /* Big endian length word (e.g. any SHA) */
  722. req->cache[req->block_sz-2] = (req->block_sz >> 5);
  723. req->cache[req->block_sz-1] = (req->block_sz << 3) &
  724. 255;
  725. }
  726. req->len += req->block_sz; /* plus 1 hash block */
  727. /* Set special zero-length HMAC flag */
  728. req->hmac_zlen = true;
  729. /* Finalize HMAC */
  730. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  731. } else if (req->hmac) {
  732. /* Finalize HMAC */
  733. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  734. }
  735. return safexcel_ahash_enqueue(areq);
  736. }
  737. static int safexcel_ahash_finup(struct ahash_request *areq)
  738. {
  739. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  740. req->finish = true;
  741. safexcel_ahash_update(areq);
  742. return safexcel_ahash_final(areq);
  743. }
  744. static int safexcel_ahash_export(struct ahash_request *areq, void *out)
  745. {
  746. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  747. struct safexcel_ahash_export_state *export = out;
  748. export->len = req->len;
  749. export->processed = req->processed;
  750. export->digest = req->digest;
  751. memcpy(export->state, req->state, req->state_sz);
  752. memcpy(export->cache, req->cache, HASH_CACHE_SIZE);
  753. return 0;
  754. }
  755. static int safexcel_ahash_import(struct ahash_request *areq, const void *in)
  756. {
  757. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  758. const struct safexcel_ahash_export_state *export = in;
  759. int ret;
  760. ret = crypto_ahash_init(areq);
  761. if (ret)
  762. return ret;
  763. req->len = export->len;
  764. req->processed = export->processed;
  765. req->digest = export->digest;
  766. memcpy(req->cache, export->cache, HASH_CACHE_SIZE);
  767. memcpy(req->state, export->state, req->state_sz);
  768. return 0;
  769. }
  770. static int safexcel_ahash_cra_init(struct crypto_tfm *tfm)
  771. {
  772. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  773. struct safexcel_alg_template *tmpl =
  774. container_of(__crypto_ahash_alg(tfm->__crt_alg),
  775. struct safexcel_alg_template, alg.ahash);
  776. ctx->base.priv = tmpl->priv;
  777. ctx->base.send = safexcel_ahash_send;
  778. ctx->base.handle_result = safexcel_handle_result;
  779. ctx->fb_do_setkey = false;
  780. crypto_ahash_set_reqsize_dma(__crypto_ahash_cast(tfm),
  781. sizeof(struct safexcel_ahash_req));
  782. return 0;
  783. }
  784. static int safexcel_sha1_init(struct ahash_request *areq)
  785. {
  786. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  787. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  788. memset(req, 0, sizeof(*req));
  789. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  790. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  791. req->state_sz = SHA1_DIGEST_SIZE;
  792. req->digest_sz = SHA1_DIGEST_SIZE;
  793. req->block_sz = SHA1_BLOCK_SIZE;
  794. return 0;
  795. }
  796. static int safexcel_sha1_digest(struct ahash_request *areq)
  797. {
  798. int ret = safexcel_sha1_init(areq);
  799. if (ret)
  800. return ret;
  801. return safexcel_ahash_finup(areq);
  802. }
  803. static void safexcel_ahash_cra_exit(struct crypto_tfm *tfm)
  804. {
  805. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  806. struct safexcel_crypto_priv *priv = ctx->base.priv;
  807. int ret;
  808. /* context not allocated, skip invalidation */
  809. if (!ctx->base.ctxr)
  810. return;
  811. if (priv->flags & EIP197_TRC_CACHE) {
  812. ret = safexcel_ahash_exit_inv(tfm);
  813. if (ret)
  814. dev_warn(priv->dev, "hash: invalidation error %d\n", ret);
  815. } else {
  816. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  817. ctx->base.ctxr_dma);
  818. }
  819. }
  820. struct safexcel_alg_template safexcel_alg_sha1 = {
  821. .type = SAFEXCEL_ALG_TYPE_AHASH,
  822. .algo_mask = SAFEXCEL_ALG_SHA1,
  823. .alg.ahash = {
  824. .init = safexcel_sha1_init,
  825. .update = safexcel_ahash_update,
  826. .final = safexcel_ahash_final,
  827. .finup = safexcel_ahash_finup,
  828. .digest = safexcel_sha1_digest,
  829. .export = safexcel_ahash_export,
  830. .import = safexcel_ahash_import,
  831. .halg = {
  832. .digestsize = SHA1_DIGEST_SIZE,
  833. .statesize = sizeof(struct safexcel_ahash_export_state),
  834. .base = {
  835. .cra_name = "sha1",
  836. .cra_driver_name = "safexcel-sha1",
  837. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  838. .cra_flags = CRYPTO_ALG_ASYNC |
  839. CRYPTO_ALG_ALLOCATES_MEMORY |
  840. CRYPTO_ALG_KERN_DRIVER_ONLY,
  841. .cra_blocksize = SHA1_BLOCK_SIZE,
  842. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  843. .cra_init = safexcel_ahash_cra_init,
  844. .cra_exit = safexcel_ahash_cra_exit,
  845. .cra_module = THIS_MODULE,
  846. },
  847. },
  848. },
  849. };
  850. static int safexcel_hmac_sha1_init(struct ahash_request *areq)
  851. {
  852. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  853. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  854. memset(req, 0, sizeof(*req));
  855. /* Start from ipad precompute */
  856. memcpy(req->state, &ctx->base.ipad, SHA1_DIGEST_SIZE);
  857. /* Already processed the key^ipad part now! */
  858. req->len = SHA1_BLOCK_SIZE;
  859. req->processed = SHA1_BLOCK_SIZE;
  860. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  861. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  862. req->state_sz = SHA1_DIGEST_SIZE;
  863. req->digest_sz = SHA1_DIGEST_SIZE;
  864. req->block_sz = SHA1_BLOCK_SIZE;
  865. req->hmac = true;
  866. return 0;
  867. }
  868. static int safexcel_hmac_sha1_digest(struct ahash_request *areq)
  869. {
  870. int ret = safexcel_hmac_sha1_init(areq);
  871. if (ret)
  872. return ret;
  873. return safexcel_ahash_finup(areq);
  874. }
  875. static int safexcel_hmac_init_pad(struct ahash_request *areq,
  876. unsigned int blocksize, const u8 *key,
  877. unsigned int keylen, u8 *ipad, u8 *opad)
  878. {
  879. DECLARE_CRYPTO_WAIT(result);
  880. struct scatterlist sg;
  881. int ret, i;
  882. u8 *keydup;
  883. if (keylen <= blocksize) {
  884. memcpy(ipad, key, keylen);
  885. } else {
  886. keydup = kmemdup(key, keylen, GFP_KERNEL);
  887. if (!keydup)
  888. return -ENOMEM;
  889. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  890. crypto_req_done, &result);
  891. sg_init_one(&sg, keydup, keylen);
  892. ahash_request_set_crypt(areq, &sg, ipad, keylen);
  893. ret = crypto_ahash_digest(areq);
  894. ret = crypto_wait_req(ret, &result);
  895. /* Avoid leaking */
  896. kfree_sensitive(keydup);
  897. if (ret)
  898. return ret;
  899. keylen = crypto_ahash_digestsize(crypto_ahash_reqtfm(areq));
  900. }
  901. memset(ipad + keylen, 0, blocksize - keylen);
  902. memcpy(opad, ipad, blocksize);
  903. for (i = 0; i < blocksize; i++) {
  904. ipad[i] ^= HMAC_IPAD_VALUE;
  905. opad[i] ^= HMAC_OPAD_VALUE;
  906. }
  907. return 0;
  908. }
  909. static int safexcel_hmac_init_iv(struct ahash_request *areq,
  910. unsigned int blocksize, u8 *pad, void *state)
  911. {
  912. struct safexcel_ahash_req *req;
  913. DECLARE_CRYPTO_WAIT(result);
  914. struct scatterlist sg;
  915. int ret;
  916. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  917. crypto_req_done, &result);
  918. sg_init_one(&sg, pad, blocksize);
  919. ahash_request_set_crypt(areq, &sg, pad, blocksize);
  920. ret = crypto_ahash_init(areq);
  921. if (ret)
  922. return ret;
  923. req = ahash_request_ctx_dma(areq);
  924. req->hmac = true;
  925. req->last_req = true;
  926. ret = crypto_ahash_update(areq);
  927. ret = crypto_wait_req(ret, &result);
  928. return ret ?: crypto_ahash_export(areq, state);
  929. }
  930. static int __safexcel_hmac_setkey(const char *alg, const u8 *key,
  931. unsigned int keylen,
  932. void *istate, void *ostate)
  933. {
  934. struct ahash_request *areq;
  935. struct crypto_ahash *tfm;
  936. unsigned int blocksize;
  937. u8 *ipad, *opad;
  938. int ret;
  939. tfm = crypto_alloc_ahash(alg, 0, 0);
  940. if (IS_ERR(tfm))
  941. return PTR_ERR(tfm);
  942. areq = ahash_request_alloc(tfm, GFP_KERNEL);
  943. if (!areq) {
  944. ret = -ENOMEM;
  945. goto free_ahash;
  946. }
  947. crypto_ahash_clear_flags(tfm, ~0);
  948. blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  949. ipad = kcalloc(2, blocksize, GFP_KERNEL);
  950. if (!ipad) {
  951. ret = -ENOMEM;
  952. goto free_request;
  953. }
  954. opad = ipad + blocksize;
  955. ret = safexcel_hmac_init_pad(areq, blocksize, key, keylen, ipad, opad);
  956. if (ret)
  957. goto free_ipad;
  958. ret = safexcel_hmac_init_iv(areq, blocksize, ipad, istate);
  959. if (ret)
  960. goto free_ipad;
  961. ret = safexcel_hmac_init_iv(areq, blocksize, opad, ostate);
  962. free_ipad:
  963. kfree(ipad);
  964. free_request:
  965. ahash_request_free(areq);
  966. free_ahash:
  967. crypto_free_ahash(tfm);
  968. return ret;
  969. }
  970. int safexcel_hmac_setkey(struct safexcel_context *base, const u8 *key,
  971. unsigned int keylen, const char *alg,
  972. unsigned int state_sz)
  973. {
  974. struct safexcel_crypto_priv *priv = base->priv;
  975. struct safexcel_ahash_export_state istate, ostate;
  976. int ret;
  977. ret = __safexcel_hmac_setkey(alg, key, keylen, &istate, &ostate);
  978. if (ret)
  979. return ret;
  980. if (priv->flags & EIP197_TRC_CACHE && base->ctxr &&
  981. (memcmp(&base->ipad, istate.state, state_sz) ||
  982. memcmp(&base->opad, ostate.state, state_sz)))
  983. base->needs_inv = true;
  984. memcpy(&base->ipad, &istate.state, state_sz);
  985. memcpy(&base->opad, &ostate.state, state_sz);
  986. return 0;
  987. }
  988. static int safexcel_hmac_alg_setkey(struct crypto_ahash *tfm, const u8 *key,
  989. unsigned int keylen, const char *alg,
  990. unsigned int state_sz)
  991. {
  992. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  993. return safexcel_hmac_setkey(&ctx->base, key, keylen, alg, state_sz);
  994. }
  995. static int safexcel_hmac_sha1_setkey(struct crypto_ahash *tfm, const u8 *key,
  996. unsigned int keylen)
  997. {
  998. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha1",
  999. SHA1_DIGEST_SIZE);
  1000. }
  1001. struct safexcel_alg_template safexcel_alg_hmac_sha1 = {
  1002. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1003. .algo_mask = SAFEXCEL_ALG_SHA1,
  1004. .alg.ahash = {
  1005. .init = safexcel_hmac_sha1_init,
  1006. .update = safexcel_ahash_update,
  1007. .final = safexcel_ahash_final,
  1008. .finup = safexcel_ahash_finup,
  1009. .digest = safexcel_hmac_sha1_digest,
  1010. .setkey = safexcel_hmac_sha1_setkey,
  1011. .export = safexcel_ahash_export,
  1012. .import = safexcel_ahash_import,
  1013. .halg = {
  1014. .digestsize = SHA1_DIGEST_SIZE,
  1015. .statesize = sizeof(struct safexcel_ahash_export_state),
  1016. .base = {
  1017. .cra_name = "hmac(sha1)",
  1018. .cra_driver_name = "safexcel-hmac-sha1",
  1019. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1020. .cra_flags = CRYPTO_ALG_ASYNC |
  1021. CRYPTO_ALG_ALLOCATES_MEMORY |
  1022. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1023. .cra_blocksize = SHA1_BLOCK_SIZE,
  1024. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1025. .cra_init = safexcel_ahash_cra_init,
  1026. .cra_exit = safexcel_ahash_cra_exit,
  1027. .cra_module = THIS_MODULE,
  1028. },
  1029. },
  1030. },
  1031. };
  1032. static int safexcel_sha256_init(struct ahash_request *areq)
  1033. {
  1034. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1035. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1036. memset(req, 0, sizeof(*req));
  1037. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  1038. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1039. req->state_sz = SHA256_DIGEST_SIZE;
  1040. req->digest_sz = SHA256_DIGEST_SIZE;
  1041. req->block_sz = SHA256_BLOCK_SIZE;
  1042. return 0;
  1043. }
  1044. static int safexcel_sha256_digest(struct ahash_request *areq)
  1045. {
  1046. int ret = safexcel_sha256_init(areq);
  1047. if (ret)
  1048. return ret;
  1049. return safexcel_ahash_finup(areq);
  1050. }
  1051. struct safexcel_alg_template safexcel_alg_sha256 = {
  1052. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1053. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1054. .alg.ahash = {
  1055. .init = safexcel_sha256_init,
  1056. .update = safexcel_ahash_update,
  1057. .final = safexcel_ahash_final,
  1058. .finup = safexcel_ahash_finup,
  1059. .digest = safexcel_sha256_digest,
  1060. .export = safexcel_ahash_export,
  1061. .import = safexcel_ahash_import,
  1062. .halg = {
  1063. .digestsize = SHA256_DIGEST_SIZE,
  1064. .statesize = sizeof(struct safexcel_ahash_export_state),
  1065. .base = {
  1066. .cra_name = "sha256",
  1067. .cra_driver_name = "safexcel-sha256",
  1068. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1069. .cra_flags = CRYPTO_ALG_ASYNC |
  1070. CRYPTO_ALG_ALLOCATES_MEMORY |
  1071. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1072. .cra_blocksize = SHA256_BLOCK_SIZE,
  1073. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1074. .cra_init = safexcel_ahash_cra_init,
  1075. .cra_exit = safexcel_ahash_cra_exit,
  1076. .cra_module = THIS_MODULE,
  1077. },
  1078. },
  1079. },
  1080. };
  1081. static int safexcel_sha224_init(struct ahash_request *areq)
  1082. {
  1083. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1084. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1085. memset(req, 0, sizeof(*req));
  1086. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  1087. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1088. req->state_sz = SHA256_DIGEST_SIZE;
  1089. req->digest_sz = SHA256_DIGEST_SIZE;
  1090. req->block_sz = SHA256_BLOCK_SIZE;
  1091. return 0;
  1092. }
  1093. static int safexcel_sha224_digest(struct ahash_request *areq)
  1094. {
  1095. int ret = safexcel_sha224_init(areq);
  1096. if (ret)
  1097. return ret;
  1098. return safexcel_ahash_finup(areq);
  1099. }
  1100. struct safexcel_alg_template safexcel_alg_sha224 = {
  1101. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1102. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1103. .alg.ahash = {
  1104. .init = safexcel_sha224_init,
  1105. .update = safexcel_ahash_update,
  1106. .final = safexcel_ahash_final,
  1107. .finup = safexcel_ahash_finup,
  1108. .digest = safexcel_sha224_digest,
  1109. .export = safexcel_ahash_export,
  1110. .import = safexcel_ahash_import,
  1111. .halg = {
  1112. .digestsize = SHA224_DIGEST_SIZE,
  1113. .statesize = sizeof(struct safexcel_ahash_export_state),
  1114. .base = {
  1115. .cra_name = "sha224",
  1116. .cra_driver_name = "safexcel-sha224",
  1117. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1118. .cra_flags = CRYPTO_ALG_ASYNC |
  1119. CRYPTO_ALG_ALLOCATES_MEMORY |
  1120. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1121. .cra_blocksize = SHA224_BLOCK_SIZE,
  1122. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1123. .cra_init = safexcel_ahash_cra_init,
  1124. .cra_exit = safexcel_ahash_cra_exit,
  1125. .cra_module = THIS_MODULE,
  1126. },
  1127. },
  1128. },
  1129. };
  1130. static int safexcel_hmac_sha224_setkey(struct crypto_ahash *tfm, const u8 *key,
  1131. unsigned int keylen)
  1132. {
  1133. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha224",
  1134. SHA256_DIGEST_SIZE);
  1135. }
  1136. static int safexcel_hmac_sha224_init(struct ahash_request *areq)
  1137. {
  1138. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1139. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1140. memset(req, 0, sizeof(*req));
  1141. /* Start from ipad precompute */
  1142. memcpy(req->state, &ctx->base.ipad, SHA256_DIGEST_SIZE);
  1143. /* Already processed the key^ipad part now! */
  1144. req->len = SHA256_BLOCK_SIZE;
  1145. req->processed = SHA256_BLOCK_SIZE;
  1146. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  1147. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1148. req->state_sz = SHA256_DIGEST_SIZE;
  1149. req->digest_sz = SHA256_DIGEST_SIZE;
  1150. req->block_sz = SHA256_BLOCK_SIZE;
  1151. req->hmac = true;
  1152. return 0;
  1153. }
  1154. static int safexcel_hmac_sha224_digest(struct ahash_request *areq)
  1155. {
  1156. int ret = safexcel_hmac_sha224_init(areq);
  1157. if (ret)
  1158. return ret;
  1159. return safexcel_ahash_finup(areq);
  1160. }
  1161. struct safexcel_alg_template safexcel_alg_hmac_sha224 = {
  1162. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1163. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1164. .alg.ahash = {
  1165. .init = safexcel_hmac_sha224_init,
  1166. .update = safexcel_ahash_update,
  1167. .final = safexcel_ahash_final,
  1168. .finup = safexcel_ahash_finup,
  1169. .digest = safexcel_hmac_sha224_digest,
  1170. .setkey = safexcel_hmac_sha224_setkey,
  1171. .export = safexcel_ahash_export,
  1172. .import = safexcel_ahash_import,
  1173. .halg = {
  1174. .digestsize = SHA224_DIGEST_SIZE,
  1175. .statesize = sizeof(struct safexcel_ahash_export_state),
  1176. .base = {
  1177. .cra_name = "hmac(sha224)",
  1178. .cra_driver_name = "safexcel-hmac-sha224",
  1179. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1180. .cra_flags = CRYPTO_ALG_ASYNC |
  1181. CRYPTO_ALG_ALLOCATES_MEMORY |
  1182. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1183. .cra_blocksize = SHA224_BLOCK_SIZE,
  1184. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1185. .cra_init = safexcel_ahash_cra_init,
  1186. .cra_exit = safexcel_ahash_cra_exit,
  1187. .cra_module = THIS_MODULE,
  1188. },
  1189. },
  1190. },
  1191. };
  1192. static int safexcel_hmac_sha256_setkey(struct crypto_ahash *tfm, const u8 *key,
  1193. unsigned int keylen)
  1194. {
  1195. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha256",
  1196. SHA256_DIGEST_SIZE);
  1197. }
  1198. static int safexcel_hmac_sha256_init(struct ahash_request *areq)
  1199. {
  1200. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1201. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1202. memset(req, 0, sizeof(*req));
  1203. /* Start from ipad precompute */
  1204. memcpy(req->state, &ctx->base.ipad, SHA256_DIGEST_SIZE);
  1205. /* Already processed the key^ipad part now! */
  1206. req->len = SHA256_BLOCK_SIZE;
  1207. req->processed = SHA256_BLOCK_SIZE;
  1208. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  1209. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1210. req->state_sz = SHA256_DIGEST_SIZE;
  1211. req->digest_sz = SHA256_DIGEST_SIZE;
  1212. req->block_sz = SHA256_BLOCK_SIZE;
  1213. req->hmac = true;
  1214. return 0;
  1215. }
  1216. static int safexcel_hmac_sha256_digest(struct ahash_request *areq)
  1217. {
  1218. int ret = safexcel_hmac_sha256_init(areq);
  1219. if (ret)
  1220. return ret;
  1221. return safexcel_ahash_finup(areq);
  1222. }
  1223. struct safexcel_alg_template safexcel_alg_hmac_sha256 = {
  1224. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1225. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1226. .alg.ahash = {
  1227. .init = safexcel_hmac_sha256_init,
  1228. .update = safexcel_ahash_update,
  1229. .final = safexcel_ahash_final,
  1230. .finup = safexcel_ahash_finup,
  1231. .digest = safexcel_hmac_sha256_digest,
  1232. .setkey = safexcel_hmac_sha256_setkey,
  1233. .export = safexcel_ahash_export,
  1234. .import = safexcel_ahash_import,
  1235. .halg = {
  1236. .digestsize = SHA256_DIGEST_SIZE,
  1237. .statesize = sizeof(struct safexcel_ahash_export_state),
  1238. .base = {
  1239. .cra_name = "hmac(sha256)",
  1240. .cra_driver_name = "safexcel-hmac-sha256",
  1241. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1242. .cra_flags = CRYPTO_ALG_ASYNC |
  1243. CRYPTO_ALG_ALLOCATES_MEMORY |
  1244. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1245. .cra_blocksize = SHA256_BLOCK_SIZE,
  1246. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1247. .cra_init = safexcel_ahash_cra_init,
  1248. .cra_exit = safexcel_ahash_cra_exit,
  1249. .cra_module = THIS_MODULE,
  1250. },
  1251. },
  1252. },
  1253. };
  1254. static int safexcel_sha512_init(struct ahash_request *areq)
  1255. {
  1256. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1257. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1258. memset(req, 0, sizeof(*req));
  1259. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
  1260. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1261. req->state_sz = SHA512_DIGEST_SIZE;
  1262. req->digest_sz = SHA512_DIGEST_SIZE;
  1263. req->block_sz = SHA512_BLOCK_SIZE;
  1264. return 0;
  1265. }
  1266. static int safexcel_sha512_digest(struct ahash_request *areq)
  1267. {
  1268. int ret = safexcel_sha512_init(areq);
  1269. if (ret)
  1270. return ret;
  1271. return safexcel_ahash_finup(areq);
  1272. }
  1273. struct safexcel_alg_template safexcel_alg_sha512 = {
  1274. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1275. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1276. .alg.ahash = {
  1277. .init = safexcel_sha512_init,
  1278. .update = safexcel_ahash_update,
  1279. .final = safexcel_ahash_final,
  1280. .finup = safexcel_ahash_finup,
  1281. .digest = safexcel_sha512_digest,
  1282. .export = safexcel_ahash_export,
  1283. .import = safexcel_ahash_import,
  1284. .halg = {
  1285. .digestsize = SHA512_DIGEST_SIZE,
  1286. .statesize = sizeof(struct safexcel_ahash_export_state),
  1287. .base = {
  1288. .cra_name = "sha512",
  1289. .cra_driver_name = "safexcel-sha512",
  1290. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1291. .cra_flags = CRYPTO_ALG_ASYNC |
  1292. CRYPTO_ALG_ALLOCATES_MEMORY |
  1293. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1294. .cra_blocksize = SHA512_BLOCK_SIZE,
  1295. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1296. .cra_init = safexcel_ahash_cra_init,
  1297. .cra_exit = safexcel_ahash_cra_exit,
  1298. .cra_module = THIS_MODULE,
  1299. },
  1300. },
  1301. },
  1302. };
  1303. static int safexcel_sha384_init(struct ahash_request *areq)
  1304. {
  1305. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1306. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1307. memset(req, 0, sizeof(*req));
  1308. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
  1309. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1310. req->state_sz = SHA512_DIGEST_SIZE;
  1311. req->digest_sz = SHA512_DIGEST_SIZE;
  1312. req->block_sz = SHA512_BLOCK_SIZE;
  1313. return 0;
  1314. }
  1315. static int safexcel_sha384_digest(struct ahash_request *areq)
  1316. {
  1317. int ret = safexcel_sha384_init(areq);
  1318. if (ret)
  1319. return ret;
  1320. return safexcel_ahash_finup(areq);
  1321. }
  1322. struct safexcel_alg_template safexcel_alg_sha384 = {
  1323. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1324. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1325. .alg.ahash = {
  1326. .init = safexcel_sha384_init,
  1327. .update = safexcel_ahash_update,
  1328. .final = safexcel_ahash_final,
  1329. .finup = safexcel_ahash_finup,
  1330. .digest = safexcel_sha384_digest,
  1331. .export = safexcel_ahash_export,
  1332. .import = safexcel_ahash_import,
  1333. .halg = {
  1334. .digestsize = SHA384_DIGEST_SIZE,
  1335. .statesize = sizeof(struct safexcel_ahash_export_state),
  1336. .base = {
  1337. .cra_name = "sha384",
  1338. .cra_driver_name = "safexcel-sha384",
  1339. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1340. .cra_flags = CRYPTO_ALG_ASYNC |
  1341. CRYPTO_ALG_ALLOCATES_MEMORY |
  1342. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1343. .cra_blocksize = SHA384_BLOCK_SIZE,
  1344. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1345. .cra_init = safexcel_ahash_cra_init,
  1346. .cra_exit = safexcel_ahash_cra_exit,
  1347. .cra_module = THIS_MODULE,
  1348. },
  1349. },
  1350. },
  1351. };
  1352. static int safexcel_hmac_sha512_setkey(struct crypto_ahash *tfm, const u8 *key,
  1353. unsigned int keylen)
  1354. {
  1355. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha512",
  1356. SHA512_DIGEST_SIZE);
  1357. }
  1358. static int safexcel_hmac_sha512_init(struct ahash_request *areq)
  1359. {
  1360. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1361. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1362. memset(req, 0, sizeof(*req));
  1363. /* Start from ipad precompute */
  1364. memcpy(req->state, &ctx->base.ipad, SHA512_DIGEST_SIZE);
  1365. /* Already processed the key^ipad part now! */
  1366. req->len = SHA512_BLOCK_SIZE;
  1367. req->processed = SHA512_BLOCK_SIZE;
  1368. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
  1369. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1370. req->state_sz = SHA512_DIGEST_SIZE;
  1371. req->digest_sz = SHA512_DIGEST_SIZE;
  1372. req->block_sz = SHA512_BLOCK_SIZE;
  1373. req->hmac = true;
  1374. return 0;
  1375. }
  1376. static int safexcel_hmac_sha512_digest(struct ahash_request *areq)
  1377. {
  1378. int ret = safexcel_hmac_sha512_init(areq);
  1379. if (ret)
  1380. return ret;
  1381. return safexcel_ahash_finup(areq);
  1382. }
  1383. struct safexcel_alg_template safexcel_alg_hmac_sha512 = {
  1384. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1385. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1386. .alg.ahash = {
  1387. .init = safexcel_hmac_sha512_init,
  1388. .update = safexcel_ahash_update,
  1389. .final = safexcel_ahash_final,
  1390. .finup = safexcel_ahash_finup,
  1391. .digest = safexcel_hmac_sha512_digest,
  1392. .setkey = safexcel_hmac_sha512_setkey,
  1393. .export = safexcel_ahash_export,
  1394. .import = safexcel_ahash_import,
  1395. .halg = {
  1396. .digestsize = SHA512_DIGEST_SIZE,
  1397. .statesize = sizeof(struct safexcel_ahash_export_state),
  1398. .base = {
  1399. .cra_name = "hmac(sha512)",
  1400. .cra_driver_name = "safexcel-hmac-sha512",
  1401. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1402. .cra_flags = CRYPTO_ALG_ASYNC |
  1403. CRYPTO_ALG_ALLOCATES_MEMORY |
  1404. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1405. .cra_blocksize = SHA512_BLOCK_SIZE,
  1406. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1407. .cra_init = safexcel_ahash_cra_init,
  1408. .cra_exit = safexcel_ahash_cra_exit,
  1409. .cra_module = THIS_MODULE,
  1410. },
  1411. },
  1412. },
  1413. };
  1414. static int safexcel_hmac_sha384_setkey(struct crypto_ahash *tfm, const u8 *key,
  1415. unsigned int keylen)
  1416. {
  1417. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha384",
  1418. SHA512_DIGEST_SIZE);
  1419. }
  1420. static int safexcel_hmac_sha384_init(struct ahash_request *areq)
  1421. {
  1422. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1423. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1424. memset(req, 0, sizeof(*req));
  1425. /* Start from ipad precompute */
  1426. memcpy(req->state, &ctx->base.ipad, SHA512_DIGEST_SIZE);
  1427. /* Already processed the key^ipad part now! */
  1428. req->len = SHA512_BLOCK_SIZE;
  1429. req->processed = SHA512_BLOCK_SIZE;
  1430. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
  1431. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1432. req->state_sz = SHA512_DIGEST_SIZE;
  1433. req->digest_sz = SHA512_DIGEST_SIZE;
  1434. req->block_sz = SHA512_BLOCK_SIZE;
  1435. req->hmac = true;
  1436. return 0;
  1437. }
  1438. static int safexcel_hmac_sha384_digest(struct ahash_request *areq)
  1439. {
  1440. int ret = safexcel_hmac_sha384_init(areq);
  1441. if (ret)
  1442. return ret;
  1443. return safexcel_ahash_finup(areq);
  1444. }
  1445. struct safexcel_alg_template safexcel_alg_hmac_sha384 = {
  1446. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1447. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1448. .alg.ahash = {
  1449. .init = safexcel_hmac_sha384_init,
  1450. .update = safexcel_ahash_update,
  1451. .final = safexcel_ahash_final,
  1452. .finup = safexcel_ahash_finup,
  1453. .digest = safexcel_hmac_sha384_digest,
  1454. .setkey = safexcel_hmac_sha384_setkey,
  1455. .export = safexcel_ahash_export,
  1456. .import = safexcel_ahash_import,
  1457. .halg = {
  1458. .digestsize = SHA384_DIGEST_SIZE,
  1459. .statesize = sizeof(struct safexcel_ahash_export_state),
  1460. .base = {
  1461. .cra_name = "hmac(sha384)",
  1462. .cra_driver_name = "safexcel-hmac-sha384",
  1463. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1464. .cra_flags = CRYPTO_ALG_ASYNC |
  1465. CRYPTO_ALG_ALLOCATES_MEMORY |
  1466. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1467. .cra_blocksize = SHA384_BLOCK_SIZE,
  1468. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1469. .cra_init = safexcel_ahash_cra_init,
  1470. .cra_exit = safexcel_ahash_cra_exit,
  1471. .cra_module = THIS_MODULE,
  1472. },
  1473. },
  1474. },
  1475. };
  1476. static int safexcel_md5_init(struct ahash_request *areq)
  1477. {
  1478. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1479. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1480. memset(req, 0, sizeof(*req));
  1481. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
  1482. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1483. req->state_sz = MD5_DIGEST_SIZE;
  1484. req->digest_sz = MD5_DIGEST_SIZE;
  1485. req->block_sz = MD5_HMAC_BLOCK_SIZE;
  1486. return 0;
  1487. }
  1488. static int safexcel_md5_digest(struct ahash_request *areq)
  1489. {
  1490. int ret = safexcel_md5_init(areq);
  1491. if (ret)
  1492. return ret;
  1493. return safexcel_ahash_finup(areq);
  1494. }
  1495. struct safexcel_alg_template safexcel_alg_md5 = {
  1496. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1497. .algo_mask = SAFEXCEL_ALG_MD5,
  1498. .alg.ahash = {
  1499. .init = safexcel_md5_init,
  1500. .update = safexcel_ahash_update,
  1501. .final = safexcel_ahash_final,
  1502. .finup = safexcel_ahash_finup,
  1503. .digest = safexcel_md5_digest,
  1504. .export = safexcel_ahash_export,
  1505. .import = safexcel_ahash_import,
  1506. .halg = {
  1507. .digestsize = MD5_DIGEST_SIZE,
  1508. .statesize = sizeof(struct safexcel_ahash_export_state),
  1509. .base = {
  1510. .cra_name = "md5",
  1511. .cra_driver_name = "safexcel-md5",
  1512. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1513. .cra_flags = CRYPTO_ALG_ASYNC |
  1514. CRYPTO_ALG_ALLOCATES_MEMORY |
  1515. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1516. .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
  1517. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1518. .cra_init = safexcel_ahash_cra_init,
  1519. .cra_exit = safexcel_ahash_cra_exit,
  1520. .cra_module = THIS_MODULE,
  1521. },
  1522. },
  1523. },
  1524. };
  1525. static int safexcel_hmac_md5_init(struct ahash_request *areq)
  1526. {
  1527. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1528. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1529. memset(req, 0, sizeof(*req));
  1530. /* Start from ipad precompute */
  1531. memcpy(req->state, &ctx->base.ipad, MD5_DIGEST_SIZE);
  1532. /* Already processed the key^ipad part now! */
  1533. req->len = MD5_HMAC_BLOCK_SIZE;
  1534. req->processed = MD5_HMAC_BLOCK_SIZE;
  1535. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
  1536. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1537. req->state_sz = MD5_DIGEST_SIZE;
  1538. req->digest_sz = MD5_DIGEST_SIZE;
  1539. req->block_sz = MD5_HMAC_BLOCK_SIZE;
  1540. req->len_is_le = true; /* MD5 is little endian! ... */
  1541. req->hmac = true;
  1542. return 0;
  1543. }
  1544. static int safexcel_hmac_md5_setkey(struct crypto_ahash *tfm, const u8 *key,
  1545. unsigned int keylen)
  1546. {
  1547. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-md5",
  1548. MD5_DIGEST_SIZE);
  1549. }
  1550. static int safexcel_hmac_md5_digest(struct ahash_request *areq)
  1551. {
  1552. int ret = safexcel_hmac_md5_init(areq);
  1553. if (ret)
  1554. return ret;
  1555. return safexcel_ahash_finup(areq);
  1556. }
  1557. struct safexcel_alg_template safexcel_alg_hmac_md5 = {
  1558. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1559. .algo_mask = SAFEXCEL_ALG_MD5,
  1560. .alg.ahash = {
  1561. .init = safexcel_hmac_md5_init,
  1562. .update = safexcel_ahash_update,
  1563. .final = safexcel_ahash_final,
  1564. .finup = safexcel_ahash_finup,
  1565. .digest = safexcel_hmac_md5_digest,
  1566. .setkey = safexcel_hmac_md5_setkey,
  1567. .export = safexcel_ahash_export,
  1568. .import = safexcel_ahash_import,
  1569. .halg = {
  1570. .digestsize = MD5_DIGEST_SIZE,
  1571. .statesize = sizeof(struct safexcel_ahash_export_state),
  1572. .base = {
  1573. .cra_name = "hmac(md5)",
  1574. .cra_driver_name = "safexcel-hmac-md5",
  1575. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1576. .cra_flags = CRYPTO_ALG_ASYNC |
  1577. CRYPTO_ALG_ALLOCATES_MEMORY |
  1578. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1579. .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
  1580. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1581. .cra_init = safexcel_ahash_cra_init,
  1582. .cra_exit = safexcel_ahash_cra_exit,
  1583. .cra_module = THIS_MODULE,
  1584. },
  1585. },
  1586. },
  1587. };
  1588. static int safexcel_crc32_cra_init(struct crypto_tfm *tfm)
  1589. {
  1590. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1591. int ret = safexcel_ahash_cra_init(tfm);
  1592. /* Default 'key' is all zeroes */
  1593. memset(&ctx->base.ipad, 0, sizeof(u32));
  1594. return ret;
  1595. }
  1596. static int safexcel_crc32_init(struct ahash_request *areq)
  1597. {
  1598. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1599. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1600. memset(req, 0, sizeof(*req));
  1601. /* Start from loaded key */
  1602. req->state[0] = cpu_to_le32(~ctx->base.ipad.word[0]);
  1603. /* Set processed to non-zero to enable invalidation detection */
  1604. req->len = sizeof(u32);
  1605. req->processed = sizeof(u32);
  1606. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_CRC32;
  1607. req->digest = CONTEXT_CONTROL_DIGEST_XCM;
  1608. req->state_sz = sizeof(u32);
  1609. req->digest_sz = sizeof(u32);
  1610. req->block_sz = sizeof(u32);
  1611. return 0;
  1612. }
  1613. static int safexcel_crc32_setkey(struct crypto_ahash *tfm, const u8 *key,
  1614. unsigned int keylen)
  1615. {
  1616. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1617. if (keylen != sizeof(u32))
  1618. return -EINVAL;
  1619. memcpy(&ctx->base.ipad, key, sizeof(u32));
  1620. return 0;
  1621. }
  1622. static int safexcel_crc32_digest(struct ahash_request *areq)
  1623. {
  1624. return safexcel_crc32_init(areq) ?: safexcel_ahash_finup(areq);
  1625. }
  1626. struct safexcel_alg_template safexcel_alg_crc32 = {
  1627. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1628. .algo_mask = 0,
  1629. .alg.ahash = {
  1630. .init = safexcel_crc32_init,
  1631. .update = safexcel_ahash_update,
  1632. .final = safexcel_ahash_final,
  1633. .finup = safexcel_ahash_finup,
  1634. .digest = safexcel_crc32_digest,
  1635. .setkey = safexcel_crc32_setkey,
  1636. .export = safexcel_ahash_export,
  1637. .import = safexcel_ahash_import,
  1638. .halg = {
  1639. .digestsize = sizeof(u32),
  1640. .statesize = sizeof(struct safexcel_ahash_export_state),
  1641. .base = {
  1642. .cra_name = "crc32",
  1643. .cra_driver_name = "safexcel-crc32",
  1644. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1645. .cra_flags = CRYPTO_ALG_OPTIONAL_KEY |
  1646. CRYPTO_ALG_ASYNC |
  1647. CRYPTO_ALG_ALLOCATES_MEMORY |
  1648. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1649. .cra_blocksize = 1,
  1650. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1651. .cra_init = safexcel_crc32_cra_init,
  1652. .cra_exit = safexcel_ahash_cra_exit,
  1653. .cra_module = THIS_MODULE,
  1654. },
  1655. },
  1656. },
  1657. };
  1658. static int safexcel_cbcmac_init(struct ahash_request *areq)
  1659. {
  1660. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1661. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1662. memset(req, 0, sizeof(*req));
  1663. /* Start from loaded keys */
  1664. memcpy(req->state, &ctx->base.ipad, ctx->key_sz);
  1665. /* Set processed to non-zero to enable invalidation detection */
  1666. req->len = AES_BLOCK_SIZE;
  1667. req->processed = AES_BLOCK_SIZE;
  1668. req->digest = CONTEXT_CONTROL_DIGEST_XCM;
  1669. req->state_sz = ctx->key_sz;
  1670. req->digest_sz = AES_BLOCK_SIZE;
  1671. req->block_sz = AES_BLOCK_SIZE;
  1672. req->xcbcmac = true;
  1673. return 0;
  1674. }
  1675. static int safexcel_cbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1676. unsigned int len)
  1677. {
  1678. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1679. struct crypto_aes_ctx aes;
  1680. int ret, i;
  1681. ret = aes_expandkey(&aes, key, len);
  1682. if (ret)
  1683. return ret;
  1684. memset(&ctx->base.ipad, 0, 2 * AES_BLOCK_SIZE);
  1685. for (i = 0; i < len / sizeof(u32); i++)
  1686. ctx->base.ipad.be[i + 8] = cpu_to_be32(aes.key_enc[i]);
  1687. if (len == AES_KEYSIZE_192) {
  1688. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC192;
  1689. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1690. } else if (len == AES_KEYSIZE_256) {
  1691. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC256;
  1692. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1693. } else {
  1694. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1695. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1696. }
  1697. ctx->cbcmac = true;
  1698. memzero_explicit(&aes, sizeof(aes));
  1699. return 0;
  1700. }
  1701. static int safexcel_cbcmac_digest(struct ahash_request *areq)
  1702. {
  1703. return safexcel_cbcmac_init(areq) ?: safexcel_ahash_finup(areq);
  1704. }
  1705. struct safexcel_alg_template safexcel_alg_cbcmac = {
  1706. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1707. .algo_mask = 0,
  1708. .alg.ahash = {
  1709. .init = safexcel_cbcmac_init,
  1710. .update = safexcel_ahash_update,
  1711. .final = safexcel_ahash_final,
  1712. .finup = safexcel_ahash_finup,
  1713. .digest = safexcel_cbcmac_digest,
  1714. .setkey = safexcel_cbcmac_setkey,
  1715. .export = safexcel_ahash_export,
  1716. .import = safexcel_ahash_import,
  1717. .halg = {
  1718. .digestsize = AES_BLOCK_SIZE,
  1719. .statesize = sizeof(struct safexcel_ahash_export_state),
  1720. .base = {
  1721. .cra_name = "cbcmac(aes)",
  1722. .cra_driver_name = "safexcel-cbcmac-aes",
  1723. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1724. .cra_flags = CRYPTO_ALG_ASYNC |
  1725. CRYPTO_ALG_ALLOCATES_MEMORY |
  1726. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1727. .cra_blocksize = 1,
  1728. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1729. .cra_init = safexcel_ahash_cra_init,
  1730. .cra_exit = safexcel_ahash_cra_exit,
  1731. .cra_module = THIS_MODULE,
  1732. },
  1733. },
  1734. },
  1735. };
  1736. static int safexcel_xcbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1737. unsigned int len)
  1738. {
  1739. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1740. u32 key_tmp[3 * AES_BLOCK_SIZE / sizeof(u32)];
  1741. int ret, i;
  1742. ret = aes_expandkey(ctx->aes, key, len);
  1743. if (ret)
  1744. return ret;
  1745. /* precompute the XCBC key material */
  1746. aes_encrypt(ctx->aes, (u8 *)key_tmp + 2 * AES_BLOCK_SIZE,
  1747. "\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1");
  1748. aes_encrypt(ctx->aes, (u8 *)key_tmp,
  1749. "\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2");
  1750. aes_encrypt(ctx->aes, (u8 *)key_tmp + AES_BLOCK_SIZE,
  1751. "\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3");
  1752. for (i = 0; i < 3 * AES_BLOCK_SIZE / sizeof(u32); i++)
  1753. ctx->base.ipad.word[i] = swab32(key_tmp[i]);
  1754. ret = aes_expandkey(ctx->aes,
  1755. (u8 *)key_tmp + 2 * AES_BLOCK_SIZE,
  1756. AES_MIN_KEY_SIZE);
  1757. if (ret)
  1758. return ret;
  1759. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1760. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1761. ctx->cbcmac = false;
  1762. return 0;
  1763. }
  1764. static int safexcel_xcbcmac_cra_init(struct crypto_tfm *tfm)
  1765. {
  1766. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1767. safexcel_ahash_cra_init(tfm);
  1768. ctx->aes = kmalloc(sizeof(*ctx->aes), GFP_KERNEL);
  1769. return ctx->aes == NULL ? -ENOMEM : 0;
  1770. }
  1771. static void safexcel_xcbcmac_cra_exit(struct crypto_tfm *tfm)
  1772. {
  1773. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1774. kfree(ctx->aes);
  1775. safexcel_ahash_cra_exit(tfm);
  1776. }
  1777. struct safexcel_alg_template safexcel_alg_xcbcmac = {
  1778. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1779. .algo_mask = 0,
  1780. .alg.ahash = {
  1781. .init = safexcel_cbcmac_init,
  1782. .update = safexcel_ahash_update,
  1783. .final = safexcel_ahash_final,
  1784. .finup = safexcel_ahash_finup,
  1785. .digest = safexcel_cbcmac_digest,
  1786. .setkey = safexcel_xcbcmac_setkey,
  1787. .export = safexcel_ahash_export,
  1788. .import = safexcel_ahash_import,
  1789. .halg = {
  1790. .digestsize = AES_BLOCK_SIZE,
  1791. .statesize = sizeof(struct safexcel_ahash_export_state),
  1792. .base = {
  1793. .cra_name = "xcbc(aes)",
  1794. .cra_driver_name = "safexcel-xcbc-aes",
  1795. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1796. .cra_flags = CRYPTO_ALG_ASYNC |
  1797. CRYPTO_ALG_ALLOCATES_MEMORY |
  1798. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1799. .cra_blocksize = AES_BLOCK_SIZE,
  1800. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1801. .cra_init = safexcel_xcbcmac_cra_init,
  1802. .cra_exit = safexcel_xcbcmac_cra_exit,
  1803. .cra_module = THIS_MODULE,
  1804. },
  1805. },
  1806. },
  1807. };
  1808. static int safexcel_cmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1809. unsigned int len)
  1810. {
  1811. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1812. __be64 consts[4];
  1813. u64 _const[2];
  1814. u8 msb_mask, gfmask;
  1815. int ret, i;
  1816. /* precompute the CMAC key material */
  1817. ret = aes_expandkey(ctx->aes, key, len);
  1818. if (ret)
  1819. return ret;
  1820. for (i = 0; i < len / sizeof(u32); i++)
  1821. ctx->base.ipad.word[i + 8] = swab32(ctx->aes->key_enc[i]);
  1822. /* code below borrowed from crypto/cmac.c */
  1823. /* encrypt the zero block */
  1824. memset(consts, 0, AES_BLOCK_SIZE);
  1825. aes_encrypt(ctx->aes, (u8 *)consts, (u8 *)consts);
  1826. gfmask = 0x87;
  1827. _const[0] = be64_to_cpu(consts[1]);
  1828. _const[1] = be64_to_cpu(consts[0]);
  1829. /* gf(2^128) multiply zero-ciphertext with u and u^2 */
  1830. for (i = 0; i < 4; i += 2) {
  1831. msb_mask = ((s64)_const[1] >> 63) & gfmask;
  1832. _const[1] = (_const[1] << 1) | (_const[0] >> 63);
  1833. _const[0] = (_const[0] << 1) ^ msb_mask;
  1834. consts[i + 0] = cpu_to_be64(_const[1]);
  1835. consts[i + 1] = cpu_to_be64(_const[0]);
  1836. }
  1837. /* end of code borrowed from crypto/cmac.c */
  1838. for (i = 0; i < 2 * AES_BLOCK_SIZE / sizeof(u32); i++)
  1839. ctx->base.ipad.be[i] = cpu_to_be32(((u32 *)consts)[i]);
  1840. if (len == AES_KEYSIZE_192) {
  1841. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC192;
  1842. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1843. } else if (len == AES_KEYSIZE_256) {
  1844. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC256;
  1845. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1846. } else {
  1847. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1848. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1849. }
  1850. ctx->cbcmac = false;
  1851. return 0;
  1852. }
  1853. struct safexcel_alg_template safexcel_alg_cmac = {
  1854. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1855. .algo_mask = 0,
  1856. .alg.ahash = {
  1857. .init = safexcel_cbcmac_init,
  1858. .update = safexcel_ahash_update,
  1859. .final = safexcel_ahash_final,
  1860. .finup = safexcel_ahash_finup,
  1861. .digest = safexcel_cbcmac_digest,
  1862. .setkey = safexcel_cmac_setkey,
  1863. .export = safexcel_ahash_export,
  1864. .import = safexcel_ahash_import,
  1865. .halg = {
  1866. .digestsize = AES_BLOCK_SIZE,
  1867. .statesize = sizeof(struct safexcel_ahash_export_state),
  1868. .base = {
  1869. .cra_name = "cmac(aes)",
  1870. .cra_driver_name = "safexcel-cmac-aes",
  1871. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1872. .cra_flags = CRYPTO_ALG_ASYNC |
  1873. CRYPTO_ALG_ALLOCATES_MEMORY |
  1874. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1875. .cra_blocksize = AES_BLOCK_SIZE,
  1876. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1877. .cra_init = safexcel_xcbcmac_cra_init,
  1878. .cra_exit = safexcel_xcbcmac_cra_exit,
  1879. .cra_module = THIS_MODULE,
  1880. },
  1881. },
  1882. },
  1883. };
  1884. static int safexcel_sm3_init(struct ahash_request *areq)
  1885. {
  1886. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1887. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1888. memset(req, 0, sizeof(*req));
  1889. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SM3;
  1890. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1891. req->state_sz = SM3_DIGEST_SIZE;
  1892. req->digest_sz = SM3_DIGEST_SIZE;
  1893. req->block_sz = SM3_BLOCK_SIZE;
  1894. return 0;
  1895. }
  1896. static int safexcel_sm3_digest(struct ahash_request *areq)
  1897. {
  1898. int ret = safexcel_sm3_init(areq);
  1899. if (ret)
  1900. return ret;
  1901. return safexcel_ahash_finup(areq);
  1902. }
  1903. struct safexcel_alg_template safexcel_alg_sm3 = {
  1904. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1905. .algo_mask = SAFEXCEL_ALG_SM3,
  1906. .alg.ahash = {
  1907. .init = safexcel_sm3_init,
  1908. .update = safexcel_ahash_update,
  1909. .final = safexcel_ahash_final,
  1910. .finup = safexcel_ahash_finup,
  1911. .digest = safexcel_sm3_digest,
  1912. .export = safexcel_ahash_export,
  1913. .import = safexcel_ahash_import,
  1914. .halg = {
  1915. .digestsize = SM3_DIGEST_SIZE,
  1916. .statesize = sizeof(struct safexcel_ahash_export_state),
  1917. .base = {
  1918. .cra_name = "sm3",
  1919. .cra_driver_name = "safexcel-sm3",
  1920. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1921. .cra_flags = CRYPTO_ALG_ASYNC |
  1922. CRYPTO_ALG_ALLOCATES_MEMORY |
  1923. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1924. .cra_blocksize = SM3_BLOCK_SIZE,
  1925. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1926. .cra_init = safexcel_ahash_cra_init,
  1927. .cra_exit = safexcel_ahash_cra_exit,
  1928. .cra_module = THIS_MODULE,
  1929. },
  1930. },
  1931. },
  1932. };
  1933. static int safexcel_hmac_sm3_setkey(struct crypto_ahash *tfm, const u8 *key,
  1934. unsigned int keylen)
  1935. {
  1936. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sm3",
  1937. SM3_DIGEST_SIZE);
  1938. }
  1939. static int safexcel_hmac_sm3_init(struct ahash_request *areq)
  1940. {
  1941. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1942. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1943. memset(req, 0, sizeof(*req));
  1944. /* Start from ipad precompute */
  1945. memcpy(req->state, &ctx->base.ipad, SM3_DIGEST_SIZE);
  1946. /* Already processed the key^ipad part now! */
  1947. req->len = SM3_BLOCK_SIZE;
  1948. req->processed = SM3_BLOCK_SIZE;
  1949. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SM3;
  1950. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1951. req->state_sz = SM3_DIGEST_SIZE;
  1952. req->digest_sz = SM3_DIGEST_SIZE;
  1953. req->block_sz = SM3_BLOCK_SIZE;
  1954. req->hmac = true;
  1955. return 0;
  1956. }
  1957. static int safexcel_hmac_sm3_digest(struct ahash_request *areq)
  1958. {
  1959. int ret = safexcel_hmac_sm3_init(areq);
  1960. if (ret)
  1961. return ret;
  1962. return safexcel_ahash_finup(areq);
  1963. }
  1964. struct safexcel_alg_template safexcel_alg_hmac_sm3 = {
  1965. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1966. .algo_mask = SAFEXCEL_ALG_SM3,
  1967. .alg.ahash = {
  1968. .init = safexcel_hmac_sm3_init,
  1969. .update = safexcel_ahash_update,
  1970. .final = safexcel_ahash_final,
  1971. .finup = safexcel_ahash_finup,
  1972. .digest = safexcel_hmac_sm3_digest,
  1973. .setkey = safexcel_hmac_sm3_setkey,
  1974. .export = safexcel_ahash_export,
  1975. .import = safexcel_ahash_import,
  1976. .halg = {
  1977. .digestsize = SM3_DIGEST_SIZE,
  1978. .statesize = sizeof(struct safexcel_ahash_export_state),
  1979. .base = {
  1980. .cra_name = "hmac(sm3)",
  1981. .cra_driver_name = "safexcel-hmac-sm3",
  1982. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1983. .cra_flags = CRYPTO_ALG_ASYNC |
  1984. CRYPTO_ALG_ALLOCATES_MEMORY |
  1985. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1986. .cra_blocksize = SM3_BLOCK_SIZE,
  1987. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1988. .cra_init = safexcel_ahash_cra_init,
  1989. .cra_exit = safexcel_ahash_cra_exit,
  1990. .cra_module = THIS_MODULE,
  1991. },
  1992. },
  1993. },
  1994. };
  1995. static int safexcel_sha3_224_init(struct ahash_request *areq)
  1996. {
  1997. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  1998. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1999. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2000. memset(req, 0, sizeof(*req));
  2001. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224;
  2002. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2003. req->state_sz = SHA3_224_DIGEST_SIZE;
  2004. req->digest_sz = SHA3_224_DIGEST_SIZE;
  2005. req->block_sz = SHA3_224_BLOCK_SIZE;
  2006. ctx->do_fallback = false;
  2007. ctx->fb_init_done = false;
  2008. return 0;
  2009. }
  2010. static int safexcel_sha3_fbcheck(struct ahash_request *req)
  2011. {
  2012. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2013. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2014. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2015. int ret = 0;
  2016. if (ctx->do_fallback) {
  2017. ahash_request_set_tfm(subreq, ctx->fback);
  2018. ahash_request_set_callback(subreq, req->base.flags,
  2019. req->base.complete, req->base.data);
  2020. ahash_request_set_crypt(subreq, req->src, req->result,
  2021. req->nbytes);
  2022. if (!ctx->fb_init_done) {
  2023. if (ctx->fb_do_setkey) {
  2024. /* Set fallback cipher HMAC key */
  2025. u8 key[SHA3_224_BLOCK_SIZE];
  2026. memcpy(key, &ctx->base.ipad,
  2027. crypto_ahash_blocksize(ctx->fback) / 2);
  2028. memcpy(key +
  2029. crypto_ahash_blocksize(ctx->fback) / 2,
  2030. &ctx->base.opad,
  2031. crypto_ahash_blocksize(ctx->fback) / 2);
  2032. ret = crypto_ahash_setkey(ctx->fback, key,
  2033. crypto_ahash_blocksize(ctx->fback));
  2034. memzero_explicit(key,
  2035. crypto_ahash_blocksize(ctx->fback));
  2036. ctx->fb_do_setkey = false;
  2037. }
  2038. ret = ret ?: crypto_ahash_init(subreq);
  2039. ctx->fb_init_done = true;
  2040. }
  2041. }
  2042. return ret;
  2043. }
  2044. static int safexcel_sha3_update(struct ahash_request *req)
  2045. {
  2046. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2047. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2048. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2049. ctx->do_fallback = true;
  2050. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_update(subreq);
  2051. }
  2052. static int safexcel_sha3_final(struct ahash_request *req)
  2053. {
  2054. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2055. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2056. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2057. ctx->do_fallback = true;
  2058. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_final(subreq);
  2059. }
  2060. static int safexcel_sha3_finup(struct ahash_request *req)
  2061. {
  2062. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2063. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2064. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2065. ctx->do_fallback |= !req->nbytes;
  2066. if (ctx->do_fallback)
  2067. /* Update or ex/import happened or len 0, cannot use the HW */
  2068. return safexcel_sha3_fbcheck(req) ?:
  2069. crypto_ahash_finup(subreq);
  2070. else
  2071. return safexcel_ahash_finup(req);
  2072. }
  2073. static int safexcel_sha3_digest_fallback(struct ahash_request *req)
  2074. {
  2075. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2076. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2077. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2078. ctx->do_fallback = true;
  2079. ctx->fb_init_done = false;
  2080. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_finup(subreq);
  2081. }
  2082. static int safexcel_sha3_224_digest(struct ahash_request *req)
  2083. {
  2084. if (req->nbytes)
  2085. return safexcel_sha3_224_init(req) ?: safexcel_ahash_finup(req);
  2086. /* HW cannot do zero length hash, use fallback instead */
  2087. return safexcel_sha3_digest_fallback(req);
  2088. }
  2089. static int safexcel_sha3_export(struct ahash_request *req, void *out)
  2090. {
  2091. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2092. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2093. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2094. ctx->do_fallback = true;
  2095. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_export(subreq, out);
  2096. }
  2097. static int safexcel_sha3_import(struct ahash_request *req, const void *in)
  2098. {
  2099. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2100. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2101. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2102. ctx->do_fallback = true;
  2103. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_import(subreq, in);
  2104. // return safexcel_ahash_import(req, in);
  2105. }
  2106. static int safexcel_sha3_cra_init(struct crypto_tfm *tfm)
  2107. {
  2108. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  2109. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2110. safexcel_ahash_cra_init(tfm);
  2111. /* Allocate fallback implementation */
  2112. ctx->fback = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0,
  2113. CRYPTO_ALG_ASYNC |
  2114. CRYPTO_ALG_NEED_FALLBACK);
  2115. if (IS_ERR(ctx->fback))
  2116. return PTR_ERR(ctx->fback);
  2117. /* Update statesize from fallback algorithm! */
  2118. crypto_hash_alg_common(ahash)->statesize =
  2119. crypto_ahash_statesize(ctx->fback);
  2120. crypto_ahash_set_reqsize_dma(
  2121. ahash, max(sizeof(struct safexcel_ahash_req),
  2122. sizeof(struct ahash_request) +
  2123. crypto_ahash_reqsize(ctx->fback)));
  2124. return 0;
  2125. }
  2126. static void safexcel_sha3_cra_exit(struct crypto_tfm *tfm)
  2127. {
  2128. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2129. crypto_free_ahash(ctx->fback);
  2130. safexcel_ahash_cra_exit(tfm);
  2131. }
  2132. struct safexcel_alg_template safexcel_alg_sha3_224 = {
  2133. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2134. .algo_mask = SAFEXCEL_ALG_SHA3,
  2135. .alg.ahash = {
  2136. .init = safexcel_sha3_224_init,
  2137. .update = safexcel_sha3_update,
  2138. .final = safexcel_sha3_final,
  2139. .finup = safexcel_sha3_finup,
  2140. .digest = safexcel_sha3_224_digest,
  2141. .export = safexcel_sha3_export,
  2142. .import = safexcel_sha3_import,
  2143. .halg = {
  2144. .digestsize = SHA3_224_DIGEST_SIZE,
  2145. .statesize = sizeof(struct safexcel_ahash_export_state),
  2146. .base = {
  2147. .cra_name = "sha3-224",
  2148. .cra_driver_name = "safexcel-sha3-224",
  2149. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2150. .cra_flags = CRYPTO_ALG_ASYNC |
  2151. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2152. CRYPTO_ALG_NEED_FALLBACK,
  2153. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  2154. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2155. .cra_init = safexcel_sha3_cra_init,
  2156. .cra_exit = safexcel_sha3_cra_exit,
  2157. .cra_module = THIS_MODULE,
  2158. },
  2159. },
  2160. },
  2161. };
  2162. static int safexcel_sha3_256_init(struct ahash_request *areq)
  2163. {
  2164. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2165. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2166. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2167. memset(req, 0, sizeof(*req));
  2168. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256;
  2169. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2170. req->state_sz = SHA3_256_DIGEST_SIZE;
  2171. req->digest_sz = SHA3_256_DIGEST_SIZE;
  2172. req->block_sz = SHA3_256_BLOCK_SIZE;
  2173. ctx->do_fallback = false;
  2174. ctx->fb_init_done = false;
  2175. return 0;
  2176. }
  2177. static int safexcel_sha3_256_digest(struct ahash_request *req)
  2178. {
  2179. if (req->nbytes)
  2180. return safexcel_sha3_256_init(req) ?: safexcel_ahash_finup(req);
  2181. /* HW cannot do zero length hash, use fallback instead */
  2182. return safexcel_sha3_digest_fallback(req);
  2183. }
  2184. struct safexcel_alg_template safexcel_alg_sha3_256 = {
  2185. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2186. .algo_mask = SAFEXCEL_ALG_SHA3,
  2187. .alg.ahash = {
  2188. .init = safexcel_sha3_256_init,
  2189. .update = safexcel_sha3_update,
  2190. .final = safexcel_sha3_final,
  2191. .finup = safexcel_sha3_finup,
  2192. .digest = safexcel_sha3_256_digest,
  2193. .export = safexcel_sha3_export,
  2194. .import = safexcel_sha3_import,
  2195. .halg = {
  2196. .digestsize = SHA3_256_DIGEST_SIZE,
  2197. .statesize = sizeof(struct safexcel_ahash_export_state),
  2198. .base = {
  2199. .cra_name = "sha3-256",
  2200. .cra_driver_name = "safexcel-sha3-256",
  2201. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2202. .cra_flags = CRYPTO_ALG_ASYNC |
  2203. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2204. CRYPTO_ALG_NEED_FALLBACK,
  2205. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  2206. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2207. .cra_init = safexcel_sha3_cra_init,
  2208. .cra_exit = safexcel_sha3_cra_exit,
  2209. .cra_module = THIS_MODULE,
  2210. },
  2211. },
  2212. },
  2213. };
  2214. static int safexcel_sha3_384_init(struct ahash_request *areq)
  2215. {
  2216. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2217. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2218. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2219. memset(req, 0, sizeof(*req));
  2220. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384;
  2221. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2222. req->state_sz = SHA3_384_DIGEST_SIZE;
  2223. req->digest_sz = SHA3_384_DIGEST_SIZE;
  2224. req->block_sz = SHA3_384_BLOCK_SIZE;
  2225. ctx->do_fallback = false;
  2226. ctx->fb_init_done = false;
  2227. return 0;
  2228. }
  2229. static int safexcel_sha3_384_digest(struct ahash_request *req)
  2230. {
  2231. if (req->nbytes)
  2232. return safexcel_sha3_384_init(req) ?: safexcel_ahash_finup(req);
  2233. /* HW cannot do zero length hash, use fallback instead */
  2234. return safexcel_sha3_digest_fallback(req);
  2235. }
  2236. struct safexcel_alg_template safexcel_alg_sha3_384 = {
  2237. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2238. .algo_mask = SAFEXCEL_ALG_SHA3,
  2239. .alg.ahash = {
  2240. .init = safexcel_sha3_384_init,
  2241. .update = safexcel_sha3_update,
  2242. .final = safexcel_sha3_final,
  2243. .finup = safexcel_sha3_finup,
  2244. .digest = safexcel_sha3_384_digest,
  2245. .export = safexcel_sha3_export,
  2246. .import = safexcel_sha3_import,
  2247. .halg = {
  2248. .digestsize = SHA3_384_DIGEST_SIZE,
  2249. .statesize = sizeof(struct safexcel_ahash_export_state),
  2250. .base = {
  2251. .cra_name = "sha3-384",
  2252. .cra_driver_name = "safexcel-sha3-384",
  2253. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2254. .cra_flags = CRYPTO_ALG_ASYNC |
  2255. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2256. CRYPTO_ALG_NEED_FALLBACK,
  2257. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  2258. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2259. .cra_init = safexcel_sha3_cra_init,
  2260. .cra_exit = safexcel_sha3_cra_exit,
  2261. .cra_module = THIS_MODULE,
  2262. },
  2263. },
  2264. },
  2265. };
  2266. static int safexcel_sha3_512_init(struct ahash_request *areq)
  2267. {
  2268. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2269. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2270. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2271. memset(req, 0, sizeof(*req));
  2272. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512;
  2273. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2274. req->state_sz = SHA3_512_DIGEST_SIZE;
  2275. req->digest_sz = SHA3_512_DIGEST_SIZE;
  2276. req->block_sz = SHA3_512_BLOCK_SIZE;
  2277. ctx->do_fallback = false;
  2278. ctx->fb_init_done = false;
  2279. return 0;
  2280. }
  2281. static int safexcel_sha3_512_digest(struct ahash_request *req)
  2282. {
  2283. if (req->nbytes)
  2284. return safexcel_sha3_512_init(req) ?: safexcel_ahash_finup(req);
  2285. /* HW cannot do zero length hash, use fallback instead */
  2286. return safexcel_sha3_digest_fallback(req);
  2287. }
  2288. struct safexcel_alg_template safexcel_alg_sha3_512 = {
  2289. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2290. .algo_mask = SAFEXCEL_ALG_SHA3,
  2291. .alg.ahash = {
  2292. .init = safexcel_sha3_512_init,
  2293. .update = safexcel_sha3_update,
  2294. .final = safexcel_sha3_final,
  2295. .finup = safexcel_sha3_finup,
  2296. .digest = safexcel_sha3_512_digest,
  2297. .export = safexcel_sha3_export,
  2298. .import = safexcel_sha3_import,
  2299. .halg = {
  2300. .digestsize = SHA3_512_DIGEST_SIZE,
  2301. .statesize = sizeof(struct safexcel_ahash_export_state),
  2302. .base = {
  2303. .cra_name = "sha3-512",
  2304. .cra_driver_name = "safexcel-sha3-512",
  2305. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2306. .cra_flags = CRYPTO_ALG_ASYNC |
  2307. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2308. CRYPTO_ALG_NEED_FALLBACK,
  2309. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  2310. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2311. .cra_init = safexcel_sha3_cra_init,
  2312. .cra_exit = safexcel_sha3_cra_exit,
  2313. .cra_module = THIS_MODULE,
  2314. },
  2315. },
  2316. },
  2317. };
  2318. static int safexcel_hmac_sha3_cra_init(struct crypto_tfm *tfm, const char *alg)
  2319. {
  2320. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2321. int ret;
  2322. ret = safexcel_sha3_cra_init(tfm);
  2323. if (ret)
  2324. return ret;
  2325. /* Allocate precalc basic digest implementation */
  2326. ctx->shpre = crypto_alloc_shash(alg, 0, CRYPTO_ALG_NEED_FALLBACK);
  2327. if (IS_ERR(ctx->shpre))
  2328. return PTR_ERR(ctx->shpre);
  2329. ctx->shdesc = kmalloc(sizeof(*ctx->shdesc) +
  2330. crypto_shash_descsize(ctx->shpre), GFP_KERNEL);
  2331. if (!ctx->shdesc) {
  2332. crypto_free_shash(ctx->shpre);
  2333. return -ENOMEM;
  2334. }
  2335. ctx->shdesc->tfm = ctx->shpre;
  2336. return 0;
  2337. }
  2338. static void safexcel_hmac_sha3_cra_exit(struct crypto_tfm *tfm)
  2339. {
  2340. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2341. crypto_free_ahash(ctx->fback);
  2342. crypto_free_shash(ctx->shpre);
  2343. kfree(ctx->shdesc);
  2344. safexcel_ahash_cra_exit(tfm);
  2345. }
  2346. static int safexcel_hmac_sha3_setkey(struct crypto_ahash *tfm, const u8 *key,
  2347. unsigned int keylen)
  2348. {
  2349. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2350. int ret = 0;
  2351. if (keylen > crypto_ahash_blocksize(tfm)) {
  2352. /*
  2353. * If the key is larger than the blocksize, then hash it
  2354. * first using our fallback cipher
  2355. */
  2356. ret = crypto_shash_digest(ctx->shdesc, key, keylen,
  2357. ctx->base.ipad.byte);
  2358. keylen = crypto_shash_digestsize(ctx->shpre);
  2359. /*
  2360. * If the digest is larger than half the blocksize, we need to
  2361. * move the rest to opad due to the way our HMAC infra works.
  2362. */
  2363. if (keylen > crypto_ahash_blocksize(tfm) / 2)
  2364. /* Buffers overlap, need to use memmove iso memcpy! */
  2365. memmove(&ctx->base.opad,
  2366. ctx->base.ipad.byte +
  2367. crypto_ahash_blocksize(tfm) / 2,
  2368. keylen - crypto_ahash_blocksize(tfm) / 2);
  2369. } else {
  2370. /*
  2371. * Copy the key to our ipad & opad buffers
  2372. * Note that ipad and opad each contain one half of the key,
  2373. * to match the existing HMAC driver infrastructure.
  2374. */
  2375. if (keylen <= crypto_ahash_blocksize(tfm) / 2) {
  2376. memcpy(&ctx->base.ipad, key, keylen);
  2377. } else {
  2378. memcpy(&ctx->base.ipad, key,
  2379. crypto_ahash_blocksize(tfm) / 2);
  2380. memcpy(&ctx->base.opad,
  2381. key + crypto_ahash_blocksize(tfm) / 2,
  2382. keylen - crypto_ahash_blocksize(tfm) / 2);
  2383. }
  2384. }
  2385. /* Pad key with zeroes */
  2386. if (keylen <= crypto_ahash_blocksize(tfm) / 2) {
  2387. memset(ctx->base.ipad.byte + keylen, 0,
  2388. crypto_ahash_blocksize(tfm) / 2 - keylen);
  2389. memset(&ctx->base.opad, 0, crypto_ahash_blocksize(tfm) / 2);
  2390. } else {
  2391. memset(ctx->base.opad.byte + keylen -
  2392. crypto_ahash_blocksize(tfm) / 2, 0,
  2393. crypto_ahash_blocksize(tfm) - keylen);
  2394. }
  2395. /* If doing fallback, still need to set the new key! */
  2396. ctx->fb_do_setkey = true;
  2397. return ret;
  2398. }
  2399. static int safexcel_hmac_sha3_224_init(struct ahash_request *areq)
  2400. {
  2401. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2402. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2403. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2404. memset(req, 0, sizeof(*req));
  2405. /* Copy (half of) the key */
  2406. memcpy(req->state, &ctx->base.ipad, SHA3_224_BLOCK_SIZE / 2);
  2407. /* Start of HMAC should have len == processed == blocksize */
  2408. req->len = SHA3_224_BLOCK_SIZE;
  2409. req->processed = SHA3_224_BLOCK_SIZE;
  2410. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224;
  2411. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2412. req->state_sz = SHA3_224_BLOCK_SIZE / 2;
  2413. req->digest_sz = SHA3_224_DIGEST_SIZE;
  2414. req->block_sz = SHA3_224_BLOCK_SIZE;
  2415. req->hmac = true;
  2416. ctx->do_fallback = false;
  2417. ctx->fb_init_done = false;
  2418. return 0;
  2419. }
  2420. static int safexcel_hmac_sha3_224_digest(struct ahash_request *req)
  2421. {
  2422. if (req->nbytes)
  2423. return safexcel_hmac_sha3_224_init(req) ?:
  2424. safexcel_ahash_finup(req);
  2425. /* HW cannot do zero length HMAC, use fallback instead */
  2426. return safexcel_sha3_digest_fallback(req);
  2427. }
  2428. static int safexcel_hmac_sha3_224_cra_init(struct crypto_tfm *tfm)
  2429. {
  2430. return safexcel_hmac_sha3_cra_init(tfm, "sha3-224");
  2431. }
  2432. struct safexcel_alg_template safexcel_alg_hmac_sha3_224 = {
  2433. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2434. .algo_mask = SAFEXCEL_ALG_SHA3,
  2435. .alg.ahash = {
  2436. .init = safexcel_hmac_sha3_224_init,
  2437. .update = safexcel_sha3_update,
  2438. .final = safexcel_sha3_final,
  2439. .finup = safexcel_sha3_finup,
  2440. .digest = safexcel_hmac_sha3_224_digest,
  2441. .setkey = safexcel_hmac_sha3_setkey,
  2442. .export = safexcel_sha3_export,
  2443. .import = safexcel_sha3_import,
  2444. .halg = {
  2445. .digestsize = SHA3_224_DIGEST_SIZE,
  2446. .statesize = sizeof(struct safexcel_ahash_export_state),
  2447. .base = {
  2448. .cra_name = "hmac(sha3-224)",
  2449. .cra_driver_name = "safexcel-hmac-sha3-224",
  2450. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2451. .cra_flags = CRYPTO_ALG_ASYNC |
  2452. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2453. CRYPTO_ALG_NEED_FALLBACK,
  2454. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  2455. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2456. .cra_init = safexcel_hmac_sha3_224_cra_init,
  2457. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2458. .cra_module = THIS_MODULE,
  2459. },
  2460. },
  2461. },
  2462. };
  2463. static int safexcel_hmac_sha3_256_init(struct ahash_request *areq)
  2464. {
  2465. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2466. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2467. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2468. memset(req, 0, sizeof(*req));
  2469. /* Copy (half of) the key */
  2470. memcpy(req->state, &ctx->base.ipad, SHA3_256_BLOCK_SIZE / 2);
  2471. /* Start of HMAC should have len == processed == blocksize */
  2472. req->len = SHA3_256_BLOCK_SIZE;
  2473. req->processed = SHA3_256_BLOCK_SIZE;
  2474. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256;
  2475. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2476. req->state_sz = SHA3_256_BLOCK_SIZE / 2;
  2477. req->digest_sz = SHA3_256_DIGEST_SIZE;
  2478. req->block_sz = SHA3_256_BLOCK_SIZE;
  2479. req->hmac = true;
  2480. ctx->do_fallback = false;
  2481. ctx->fb_init_done = false;
  2482. return 0;
  2483. }
  2484. static int safexcel_hmac_sha3_256_digest(struct ahash_request *req)
  2485. {
  2486. if (req->nbytes)
  2487. return safexcel_hmac_sha3_256_init(req) ?:
  2488. safexcel_ahash_finup(req);
  2489. /* HW cannot do zero length HMAC, use fallback instead */
  2490. return safexcel_sha3_digest_fallback(req);
  2491. }
  2492. static int safexcel_hmac_sha3_256_cra_init(struct crypto_tfm *tfm)
  2493. {
  2494. return safexcel_hmac_sha3_cra_init(tfm, "sha3-256");
  2495. }
  2496. struct safexcel_alg_template safexcel_alg_hmac_sha3_256 = {
  2497. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2498. .algo_mask = SAFEXCEL_ALG_SHA3,
  2499. .alg.ahash = {
  2500. .init = safexcel_hmac_sha3_256_init,
  2501. .update = safexcel_sha3_update,
  2502. .final = safexcel_sha3_final,
  2503. .finup = safexcel_sha3_finup,
  2504. .digest = safexcel_hmac_sha3_256_digest,
  2505. .setkey = safexcel_hmac_sha3_setkey,
  2506. .export = safexcel_sha3_export,
  2507. .import = safexcel_sha3_import,
  2508. .halg = {
  2509. .digestsize = SHA3_256_DIGEST_SIZE,
  2510. .statesize = sizeof(struct safexcel_ahash_export_state),
  2511. .base = {
  2512. .cra_name = "hmac(sha3-256)",
  2513. .cra_driver_name = "safexcel-hmac-sha3-256",
  2514. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2515. .cra_flags = CRYPTO_ALG_ASYNC |
  2516. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2517. CRYPTO_ALG_NEED_FALLBACK,
  2518. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  2519. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2520. .cra_init = safexcel_hmac_sha3_256_cra_init,
  2521. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2522. .cra_module = THIS_MODULE,
  2523. },
  2524. },
  2525. },
  2526. };
  2527. static int safexcel_hmac_sha3_384_init(struct ahash_request *areq)
  2528. {
  2529. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2530. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2531. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2532. memset(req, 0, sizeof(*req));
  2533. /* Copy (half of) the key */
  2534. memcpy(req->state, &ctx->base.ipad, SHA3_384_BLOCK_SIZE / 2);
  2535. /* Start of HMAC should have len == processed == blocksize */
  2536. req->len = SHA3_384_BLOCK_SIZE;
  2537. req->processed = SHA3_384_BLOCK_SIZE;
  2538. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384;
  2539. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2540. req->state_sz = SHA3_384_BLOCK_SIZE / 2;
  2541. req->digest_sz = SHA3_384_DIGEST_SIZE;
  2542. req->block_sz = SHA3_384_BLOCK_SIZE;
  2543. req->hmac = true;
  2544. ctx->do_fallback = false;
  2545. ctx->fb_init_done = false;
  2546. return 0;
  2547. }
  2548. static int safexcel_hmac_sha3_384_digest(struct ahash_request *req)
  2549. {
  2550. if (req->nbytes)
  2551. return safexcel_hmac_sha3_384_init(req) ?:
  2552. safexcel_ahash_finup(req);
  2553. /* HW cannot do zero length HMAC, use fallback instead */
  2554. return safexcel_sha3_digest_fallback(req);
  2555. }
  2556. static int safexcel_hmac_sha3_384_cra_init(struct crypto_tfm *tfm)
  2557. {
  2558. return safexcel_hmac_sha3_cra_init(tfm, "sha3-384");
  2559. }
  2560. struct safexcel_alg_template safexcel_alg_hmac_sha3_384 = {
  2561. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2562. .algo_mask = SAFEXCEL_ALG_SHA3,
  2563. .alg.ahash = {
  2564. .init = safexcel_hmac_sha3_384_init,
  2565. .update = safexcel_sha3_update,
  2566. .final = safexcel_sha3_final,
  2567. .finup = safexcel_sha3_finup,
  2568. .digest = safexcel_hmac_sha3_384_digest,
  2569. .setkey = safexcel_hmac_sha3_setkey,
  2570. .export = safexcel_sha3_export,
  2571. .import = safexcel_sha3_import,
  2572. .halg = {
  2573. .digestsize = SHA3_384_DIGEST_SIZE,
  2574. .statesize = sizeof(struct safexcel_ahash_export_state),
  2575. .base = {
  2576. .cra_name = "hmac(sha3-384)",
  2577. .cra_driver_name = "safexcel-hmac-sha3-384",
  2578. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2579. .cra_flags = CRYPTO_ALG_ASYNC |
  2580. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2581. CRYPTO_ALG_NEED_FALLBACK,
  2582. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  2583. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2584. .cra_init = safexcel_hmac_sha3_384_cra_init,
  2585. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2586. .cra_module = THIS_MODULE,
  2587. },
  2588. },
  2589. },
  2590. };
  2591. static int safexcel_hmac_sha3_512_init(struct ahash_request *areq)
  2592. {
  2593. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2594. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2595. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2596. memset(req, 0, sizeof(*req));
  2597. /* Copy (half of) the key */
  2598. memcpy(req->state, &ctx->base.ipad, SHA3_512_BLOCK_SIZE / 2);
  2599. /* Start of HMAC should have len == processed == blocksize */
  2600. req->len = SHA3_512_BLOCK_SIZE;
  2601. req->processed = SHA3_512_BLOCK_SIZE;
  2602. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512;
  2603. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2604. req->state_sz = SHA3_512_BLOCK_SIZE / 2;
  2605. req->digest_sz = SHA3_512_DIGEST_SIZE;
  2606. req->block_sz = SHA3_512_BLOCK_SIZE;
  2607. req->hmac = true;
  2608. ctx->do_fallback = false;
  2609. ctx->fb_init_done = false;
  2610. return 0;
  2611. }
  2612. static int safexcel_hmac_sha3_512_digest(struct ahash_request *req)
  2613. {
  2614. if (req->nbytes)
  2615. return safexcel_hmac_sha3_512_init(req) ?:
  2616. safexcel_ahash_finup(req);
  2617. /* HW cannot do zero length HMAC, use fallback instead */
  2618. return safexcel_sha3_digest_fallback(req);
  2619. }
  2620. static int safexcel_hmac_sha3_512_cra_init(struct crypto_tfm *tfm)
  2621. {
  2622. return safexcel_hmac_sha3_cra_init(tfm, "sha3-512");
  2623. }
  2624. struct safexcel_alg_template safexcel_alg_hmac_sha3_512 = {
  2625. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2626. .algo_mask = SAFEXCEL_ALG_SHA3,
  2627. .alg.ahash = {
  2628. .init = safexcel_hmac_sha3_512_init,
  2629. .update = safexcel_sha3_update,
  2630. .final = safexcel_sha3_final,
  2631. .finup = safexcel_sha3_finup,
  2632. .digest = safexcel_hmac_sha3_512_digest,
  2633. .setkey = safexcel_hmac_sha3_setkey,
  2634. .export = safexcel_sha3_export,
  2635. .import = safexcel_sha3_import,
  2636. .halg = {
  2637. .digestsize = SHA3_512_DIGEST_SIZE,
  2638. .statesize = sizeof(struct safexcel_ahash_export_state),
  2639. .base = {
  2640. .cra_name = "hmac(sha3-512)",
  2641. .cra_driver_name = "safexcel-hmac-sha3-512",
  2642. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2643. .cra_flags = CRYPTO_ALG_ASYNC |
  2644. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2645. CRYPTO_ALG_NEED_FALLBACK,
  2646. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  2647. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2648. .cra_init = safexcel_hmac_sha3_512_cra_init,
  2649. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2650. .cra_module = THIS_MODULE,
  2651. },
  2652. },
  2653. },
  2654. };