iaa_crypto_main.c 48 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 2021 Intel Corporation. All rights rsvd. */
  3. #include <linux/init.h>
  4. #include <linux/kernel.h>
  5. #include <linux/module.h>
  6. #include <linux/pci.h>
  7. #include <linux/device.h>
  8. #include <linux/iommu.h>
  9. #include <uapi/linux/idxd.h>
  10. #include <linux/highmem.h>
  11. #include <linux/sched/smt.h>
  12. #include <crypto/internal/acompress.h>
  13. #include "idxd.h"
  14. #include "iaa_crypto.h"
  15. #include "iaa_crypto_stats.h"
  16. #ifdef pr_fmt
  17. #undef pr_fmt
  18. #endif
  19. #define pr_fmt(fmt) "idxd: " IDXD_SUBDRIVER_NAME ": " fmt
  20. #define IAA_ALG_PRIORITY 300
  21. /* number of iaa instances probed */
  22. static unsigned int nr_iaa;
  23. static unsigned int nr_cpus;
  24. static unsigned int nr_nodes;
  25. static unsigned int nr_cpus_per_node;
  26. /* Number of physical cpus sharing each iaa instance */
  27. static unsigned int cpus_per_iaa;
  28. static struct crypto_comp *deflate_generic_tfm;
  29. /* Per-cpu lookup table for balanced wqs */
  30. static struct wq_table_entry __percpu *wq_table;
  31. static struct idxd_wq *wq_table_next_wq(int cpu)
  32. {
  33. struct wq_table_entry *entry = per_cpu_ptr(wq_table, cpu);
  34. if (++entry->cur_wq >= entry->n_wqs)
  35. entry->cur_wq = 0;
  36. if (!entry->wqs[entry->cur_wq])
  37. return NULL;
  38. pr_debug("%s: returning wq at idx %d (iaa wq %d.%d) from cpu %d\n", __func__,
  39. entry->cur_wq, entry->wqs[entry->cur_wq]->idxd->id,
  40. entry->wqs[entry->cur_wq]->id, cpu);
  41. return entry->wqs[entry->cur_wq];
  42. }
  43. static void wq_table_add(int cpu, struct idxd_wq *wq)
  44. {
  45. struct wq_table_entry *entry = per_cpu_ptr(wq_table, cpu);
  46. if (WARN_ON(entry->n_wqs == entry->max_wqs))
  47. return;
  48. entry->wqs[entry->n_wqs++] = wq;
  49. pr_debug("%s: added iaa wq %d.%d to idx %d of cpu %d\n", __func__,
  50. entry->wqs[entry->n_wqs - 1]->idxd->id,
  51. entry->wqs[entry->n_wqs - 1]->id, entry->n_wqs - 1, cpu);
  52. }
  53. static void wq_table_free_entry(int cpu)
  54. {
  55. struct wq_table_entry *entry = per_cpu_ptr(wq_table, cpu);
  56. kfree(entry->wqs);
  57. memset(entry, 0, sizeof(*entry));
  58. }
  59. static void wq_table_clear_entry(int cpu)
  60. {
  61. struct wq_table_entry *entry = per_cpu_ptr(wq_table, cpu);
  62. entry->n_wqs = 0;
  63. entry->cur_wq = 0;
  64. memset(entry->wqs, 0, entry->max_wqs * sizeof(struct idxd_wq *));
  65. }
  66. LIST_HEAD(iaa_devices);
  67. DEFINE_MUTEX(iaa_devices_lock);
  68. /* If enabled, IAA hw crypto algos are registered, unavailable otherwise */
  69. static bool iaa_crypto_enabled;
  70. static bool iaa_crypto_registered;
  71. /* Verify results of IAA compress or not */
  72. static bool iaa_verify_compress = true;
  73. static ssize_t verify_compress_show(struct device_driver *driver, char *buf)
  74. {
  75. return sprintf(buf, "%d\n", iaa_verify_compress);
  76. }
  77. static ssize_t verify_compress_store(struct device_driver *driver,
  78. const char *buf, size_t count)
  79. {
  80. int ret = -EBUSY;
  81. mutex_lock(&iaa_devices_lock);
  82. if (iaa_crypto_enabled)
  83. goto out;
  84. ret = kstrtobool(buf, &iaa_verify_compress);
  85. if (ret)
  86. goto out;
  87. ret = count;
  88. out:
  89. mutex_unlock(&iaa_devices_lock);
  90. return ret;
  91. }
  92. static DRIVER_ATTR_RW(verify_compress);
  93. /*
  94. * The iaa crypto driver supports three 'sync' methods determining how
  95. * compressions and decompressions are performed:
  96. *
  97. * - sync: the compression or decompression completes before
  98. * returning. This is the mode used by the async crypto
  99. * interface when the sync mode is set to 'sync' and by
  100. * the sync crypto interface regardless of setting.
  101. *
  102. * - async: the compression or decompression is submitted and returns
  103. * immediately. Completion interrupts are not used so
  104. * the caller is responsible for polling the descriptor
  105. * for completion. This mode is applicable to only the
  106. * async crypto interface and is ignored for anything
  107. * else.
  108. *
  109. * - async_irq: the compression or decompression is submitted and
  110. * returns immediately. Completion interrupts are
  111. * enabled so the caller can wait for the completion and
  112. * yield to other threads. When the compression or
  113. * decompression completes, the completion is signaled
  114. * and the caller awakened. This mode is applicable to
  115. * only the async crypto interface and is ignored for
  116. * anything else.
  117. *
  118. * These modes can be set using the iaa_crypto sync_mode driver
  119. * attribute.
  120. */
  121. /* Use async mode */
  122. static bool async_mode;
  123. /* Use interrupts */
  124. static bool use_irq;
  125. /**
  126. * set_iaa_sync_mode - Set IAA sync mode
  127. * @name: The name of the sync mode
  128. *
  129. * Make the IAA sync mode named @name the current sync mode used by
  130. * compression/decompression.
  131. */
  132. static int set_iaa_sync_mode(const char *name)
  133. {
  134. int ret = 0;
  135. if (sysfs_streq(name, "sync")) {
  136. async_mode = false;
  137. use_irq = false;
  138. } else if (sysfs_streq(name, "async")) {
  139. async_mode = false;
  140. use_irq = false;
  141. } else if (sysfs_streq(name, "async_irq")) {
  142. async_mode = true;
  143. use_irq = true;
  144. } else {
  145. ret = -EINVAL;
  146. }
  147. return ret;
  148. }
  149. static ssize_t sync_mode_show(struct device_driver *driver, char *buf)
  150. {
  151. int ret = 0;
  152. if (!async_mode && !use_irq)
  153. ret = sprintf(buf, "%s\n", "sync");
  154. else if (async_mode && !use_irq)
  155. ret = sprintf(buf, "%s\n", "async");
  156. else if (async_mode && use_irq)
  157. ret = sprintf(buf, "%s\n", "async_irq");
  158. return ret;
  159. }
  160. static ssize_t sync_mode_store(struct device_driver *driver,
  161. const char *buf, size_t count)
  162. {
  163. int ret = -EBUSY;
  164. mutex_lock(&iaa_devices_lock);
  165. if (iaa_crypto_enabled)
  166. goto out;
  167. ret = set_iaa_sync_mode(buf);
  168. if (ret == 0)
  169. ret = count;
  170. out:
  171. mutex_unlock(&iaa_devices_lock);
  172. return ret;
  173. }
  174. static DRIVER_ATTR_RW(sync_mode);
  175. static struct iaa_compression_mode *iaa_compression_modes[IAA_COMP_MODES_MAX];
  176. static int find_empty_iaa_compression_mode(void)
  177. {
  178. int i = -EINVAL;
  179. for (i = 0; i < IAA_COMP_MODES_MAX; i++) {
  180. if (iaa_compression_modes[i])
  181. continue;
  182. break;
  183. }
  184. return i;
  185. }
  186. static struct iaa_compression_mode *find_iaa_compression_mode(const char *name, int *idx)
  187. {
  188. struct iaa_compression_mode *mode;
  189. int i;
  190. for (i = 0; i < IAA_COMP_MODES_MAX; i++) {
  191. mode = iaa_compression_modes[i];
  192. if (!mode)
  193. continue;
  194. if (!strcmp(mode->name, name)) {
  195. *idx = i;
  196. return iaa_compression_modes[i];
  197. }
  198. }
  199. return NULL;
  200. }
  201. static void free_iaa_compression_mode(struct iaa_compression_mode *mode)
  202. {
  203. kfree(mode->name);
  204. kfree(mode->ll_table);
  205. kfree(mode->d_table);
  206. kfree(mode);
  207. }
  208. /*
  209. * IAA Compression modes are defined by an ll_table and a d_table.
  210. * These tables are typically generated and captured using statistics
  211. * collected from running actual compress/decompress workloads.
  212. *
  213. * A module or other kernel code can add and remove compression modes
  214. * with a given name using the exported @add_iaa_compression_mode()
  215. * and @remove_iaa_compression_mode functions.
  216. *
  217. * When a new compression mode is added, the tables are saved in a
  218. * global compression mode list. When IAA devices are added, a
  219. * per-IAA device dma mapping is created for each IAA device, for each
  220. * compression mode. These are the tables used to do the actual
  221. * compression/deccompression and are unmapped if/when the devices are
  222. * removed. Currently, compression modes must be added before any
  223. * device is added, and removed after all devices have been removed.
  224. */
  225. /**
  226. * remove_iaa_compression_mode - Remove an IAA compression mode
  227. * @name: The name the compression mode will be known as
  228. *
  229. * Remove the IAA compression mode named @name.
  230. */
  231. void remove_iaa_compression_mode(const char *name)
  232. {
  233. struct iaa_compression_mode *mode;
  234. int idx;
  235. mutex_lock(&iaa_devices_lock);
  236. if (!list_empty(&iaa_devices))
  237. goto out;
  238. mode = find_iaa_compression_mode(name, &idx);
  239. if (mode) {
  240. free_iaa_compression_mode(mode);
  241. iaa_compression_modes[idx] = NULL;
  242. }
  243. out:
  244. mutex_unlock(&iaa_devices_lock);
  245. }
  246. EXPORT_SYMBOL_GPL(remove_iaa_compression_mode);
  247. /**
  248. * add_iaa_compression_mode - Add an IAA compression mode
  249. * @name: The name the compression mode will be known as
  250. * @ll_table: The ll table
  251. * @ll_table_size: The ll table size in bytes
  252. * @d_table: The d table
  253. * @d_table_size: The d table size in bytes
  254. * @init: Optional callback function to init the compression mode data
  255. * @free: Optional callback function to free the compression mode data
  256. *
  257. * Add a new IAA compression mode named @name.
  258. *
  259. * Returns 0 if successful, errcode otherwise.
  260. */
  261. int add_iaa_compression_mode(const char *name,
  262. const u32 *ll_table,
  263. int ll_table_size,
  264. const u32 *d_table,
  265. int d_table_size,
  266. iaa_dev_comp_init_fn_t init,
  267. iaa_dev_comp_free_fn_t free)
  268. {
  269. struct iaa_compression_mode *mode;
  270. int idx, ret = -ENOMEM;
  271. mutex_lock(&iaa_devices_lock);
  272. if (!list_empty(&iaa_devices)) {
  273. ret = -EBUSY;
  274. goto out;
  275. }
  276. mode = kzalloc(sizeof(*mode), GFP_KERNEL);
  277. if (!mode)
  278. goto out;
  279. mode->name = kstrdup(name, GFP_KERNEL);
  280. if (!mode->name)
  281. goto free;
  282. if (ll_table) {
  283. mode->ll_table = kmemdup(ll_table, ll_table_size, GFP_KERNEL);
  284. if (!mode->ll_table)
  285. goto free;
  286. mode->ll_table_size = ll_table_size;
  287. }
  288. if (d_table) {
  289. mode->d_table = kmemdup(d_table, d_table_size, GFP_KERNEL);
  290. if (!mode->d_table)
  291. goto free;
  292. mode->d_table_size = d_table_size;
  293. }
  294. mode->init = init;
  295. mode->free = free;
  296. idx = find_empty_iaa_compression_mode();
  297. if (idx < 0)
  298. goto free;
  299. pr_debug("IAA compression mode %s added at idx %d\n",
  300. mode->name, idx);
  301. iaa_compression_modes[idx] = mode;
  302. ret = 0;
  303. out:
  304. mutex_unlock(&iaa_devices_lock);
  305. return ret;
  306. free:
  307. free_iaa_compression_mode(mode);
  308. goto out;
  309. }
  310. EXPORT_SYMBOL_GPL(add_iaa_compression_mode);
  311. static struct iaa_device_compression_mode *
  312. get_iaa_device_compression_mode(struct iaa_device *iaa_device, int idx)
  313. {
  314. return iaa_device->compression_modes[idx];
  315. }
  316. static void free_device_compression_mode(struct iaa_device *iaa_device,
  317. struct iaa_device_compression_mode *device_mode)
  318. {
  319. size_t size = sizeof(struct aecs_comp_table_record) + IAA_AECS_ALIGN;
  320. struct device *dev = &iaa_device->idxd->pdev->dev;
  321. kfree(device_mode->name);
  322. if (device_mode->aecs_comp_table)
  323. dma_free_coherent(dev, size, device_mode->aecs_comp_table,
  324. device_mode->aecs_comp_table_dma_addr);
  325. kfree(device_mode);
  326. }
  327. #define IDXD_OP_FLAG_AECS_RW_TGLS 0x400000
  328. #define IAX_AECS_DEFAULT_FLAG (IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC)
  329. #define IAX_AECS_COMPRESS_FLAG (IAX_AECS_DEFAULT_FLAG | IDXD_OP_FLAG_RD_SRC2_AECS)
  330. #define IAX_AECS_DECOMPRESS_FLAG (IAX_AECS_DEFAULT_FLAG | IDXD_OP_FLAG_RD_SRC2_AECS)
  331. #define IAX_AECS_GEN_FLAG (IAX_AECS_DEFAULT_FLAG | \
  332. IDXD_OP_FLAG_WR_SRC2_AECS_COMP | \
  333. IDXD_OP_FLAG_AECS_RW_TGLS)
  334. static int check_completion(struct device *dev,
  335. struct iax_completion_record *comp,
  336. bool compress,
  337. bool only_once);
  338. static int init_device_compression_mode(struct iaa_device *iaa_device,
  339. struct iaa_compression_mode *mode,
  340. int idx, struct idxd_wq *wq)
  341. {
  342. size_t size = sizeof(struct aecs_comp_table_record) + IAA_AECS_ALIGN;
  343. struct device *dev = &iaa_device->idxd->pdev->dev;
  344. struct iaa_device_compression_mode *device_mode;
  345. int ret = -ENOMEM;
  346. device_mode = kzalloc(sizeof(*device_mode), GFP_KERNEL);
  347. if (!device_mode)
  348. return -ENOMEM;
  349. device_mode->name = kstrdup(mode->name, GFP_KERNEL);
  350. if (!device_mode->name)
  351. goto free;
  352. device_mode->aecs_comp_table = dma_alloc_coherent(dev, size,
  353. &device_mode->aecs_comp_table_dma_addr, GFP_KERNEL);
  354. if (!device_mode->aecs_comp_table)
  355. goto free;
  356. /* Add Huffman table to aecs */
  357. memset(device_mode->aecs_comp_table, 0, sizeof(*device_mode->aecs_comp_table));
  358. memcpy(device_mode->aecs_comp_table->ll_sym, mode->ll_table, mode->ll_table_size);
  359. memcpy(device_mode->aecs_comp_table->d_sym, mode->d_table, mode->d_table_size);
  360. if (mode->init) {
  361. ret = mode->init(device_mode);
  362. if (ret)
  363. goto free;
  364. }
  365. /* mode index should match iaa_compression_modes idx */
  366. iaa_device->compression_modes[idx] = device_mode;
  367. pr_debug("IAA %s compression mode initialized for iaa device %d\n",
  368. mode->name, iaa_device->idxd->id);
  369. ret = 0;
  370. out:
  371. return ret;
  372. free:
  373. pr_debug("IAA %s compression mode initialization failed for iaa device %d\n",
  374. mode->name, iaa_device->idxd->id);
  375. free_device_compression_mode(iaa_device, device_mode);
  376. goto out;
  377. }
  378. static int init_device_compression_modes(struct iaa_device *iaa_device,
  379. struct idxd_wq *wq)
  380. {
  381. struct iaa_compression_mode *mode;
  382. int i, ret = 0;
  383. for (i = 0; i < IAA_COMP_MODES_MAX; i++) {
  384. mode = iaa_compression_modes[i];
  385. if (!mode)
  386. continue;
  387. ret = init_device_compression_mode(iaa_device, mode, i, wq);
  388. if (ret)
  389. break;
  390. }
  391. return ret;
  392. }
  393. static void remove_device_compression_modes(struct iaa_device *iaa_device)
  394. {
  395. struct iaa_device_compression_mode *device_mode;
  396. int i;
  397. for (i = 0; i < IAA_COMP_MODES_MAX; i++) {
  398. device_mode = iaa_device->compression_modes[i];
  399. if (!device_mode)
  400. continue;
  401. if (iaa_compression_modes[i]->free)
  402. iaa_compression_modes[i]->free(device_mode);
  403. free_device_compression_mode(iaa_device, device_mode);
  404. iaa_device->compression_modes[i] = NULL;
  405. }
  406. }
  407. static struct iaa_device *iaa_device_alloc(void)
  408. {
  409. struct iaa_device *iaa_device;
  410. iaa_device = kzalloc(sizeof(*iaa_device), GFP_KERNEL);
  411. if (!iaa_device)
  412. return NULL;
  413. INIT_LIST_HEAD(&iaa_device->wqs);
  414. return iaa_device;
  415. }
  416. static bool iaa_has_wq(struct iaa_device *iaa_device, struct idxd_wq *wq)
  417. {
  418. struct iaa_wq *iaa_wq;
  419. list_for_each_entry(iaa_wq, &iaa_device->wqs, list) {
  420. if (iaa_wq->wq == wq)
  421. return true;
  422. }
  423. return false;
  424. }
  425. static struct iaa_device *add_iaa_device(struct idxd_device *idxd)
  426. {
  427. struct iaa_device *iaa_device;
  428. iaa_device = iaa_device_alloc();
  429. if (!iaa_device)
  430. return NULL;
  431. iaa_device->idxd = idxd;
  432. list_add_tail(&iaa_device->list, &iaa_devices);
  433. nr_iaa++;
  434. return iaa_device;
  435. }
  436. static int init_iaa_device(struct iaa_device *iaa_device, struct iaa_wq *iaa_wq)
  437. {
  438. int ret = 0;
  439. ret = init_device_compression_modes(iaa_device, iaa_wq->wq);
  440. if (ret)
  441. return ret;
  442. return ret;
  443. }
  444. static void del_iaa_device(struct iaa_device *iaa_device)
  445. {
  446. list_del(&iaa_device->list);
  447. nr_iaa--;
  448. }
  449. static int add_iaa_wq(struct iaa_device *iaa_device, struct idxd_wq *wq,
  450. struct iaa_wq **new_wq)
  451. {
  452. struct idxd_device *idxd = iaa_device->idxd;
  453. struct pci_dev *pdev = idxd->pdev;
  454. struct device *dev = &pdev->dev;
  455. struct iaa_wq *iaa_wq;
  456. iaa_wq = kzalloc(sizeof(*iaa_wq), GFP_KERNEL);
  457. if (!iaa_wq)
  458. return -ENOMEM;
  459. iaa_wq->wq = wq;
  460. iaa_wq->iaa_device = iaa_device;
  461. idxd_wq_set_private(wq, iaa_wq);
  462. list_add_tail(&iaa_wq->list, &iaa_device->wqs);
  463. iaa_device->n_wq++;
  464. if (new_wq)
  465. *new_wq = iaa_wq;
  466. dev_dbg(dev, "added wq %d to iaa device %d, n_wq %d\n",
  467. wq->id, iaa_device->idxd->id, iaa_device->n_wq);
  468. return 0;
  469. }
  470. static void del_iaa_wq(struct iaa_device *iaa_device, struct idxd_wq *wq)
  471. {
  472. struct idxd_device *idxd = iaa_device->idxd;
  473. struct pci_dev *pdev = idxd->pdev;
  474. struct device *dev = &pdev->dev;
  475. struct iaa_wq *iaa_wq;
  476. list_for_each_entry(iaa_wq, &iaa_device->wqs, list) {
  477. if (iaa_wq->wq == wq) {
  478. list_del(&iaa_wq->list);
  479. iaa_device->n_wq--;
  480. dev_dbg(dev, "removed wq %d from iaa_device %d, n_wq %d, nr_iaa %d\n",
  481. wq->id, iaa_device->idxd->id,
  482. iaa_device->n_wq, nr_iaa);
  483. if (iaa_device->n_wq == 0)
  484. del_iaa_device(iaa_device);
  485. break;
  486. }
  487. }
  488. }
  489. static void clear_wq_table(void)
  490. {
  491. int cpu;
  492. for (cpu = 0; cpu < nr_cpus; cpu++)
  493. wq_table_clear_entry(cpu);
  494. pr_debug("cleared wq table\n");
  495. }
  496. static void free_iaa_device(struct iaa_device *iaa_device)
  497. {
  498. if (!iaa_device)
  499. return;
  500. remove_device_compression_modes(iaa_device);
  501. kfree(iaa_device);
  502. }
  503. static void __free_iaa_wq(struct iaa_wq *iaa_wq)
  504. {
  505. struct iaa_device *iaa_device;
  506. if (!iaa_wq)
  507. return;
  508. iaa_device = iaa_wq->iaa_device;
  509. if (iaa_device->n_wq == 0)
  510. free_iaa_device(iaa_wq->iaa_device);
  511. }
  512. static void free_iaa_wq(struct iaa_wq *iaa_wq)
  513. {
  514. struct idxd_wq *wq;
  515. __free_iaa_wq(iaa_wq);
  516. wq = iaa_wq->wq;
  517. kfree(iaa_wq);
  518. idxd_wq_set_private(wq, NULL);
  519. }
  520. static int iaa_wq_get(struct idxd_wq *wq)
  521. {
  522. struct idxd_device *idxd = wq->idxd;
  523. struct iaa_wq *iaa_wq;
  524. int ret = 0;
  525. spin_lock(&idxd->dev_lock);
  526. iaa_wq = idxd_wq_get_private(wq);
  527. if (iaa_wq && !iaa_wq->remove) {
  528. iaa_wq->ref++;
  529. idxd_wq_get(wq);
  530. } else {
  531. ret = -ENODEV;
  532. }
  533. spin_unlock(&idxd->dev_lock);
  534. return ret;
  535. }
  536. static int iaa_wq_put(struct idxd_wq *wq)
  537. {
  538. struct idxd_device *idxd = wq->idxd;
  539. struct iaa_wq *iaa_wq;
  540. bool free = false;
  541. int ret = 0;
  542. spin_lock(&idxd->dev_lock);
  543. iaa_wq = idxd_wq_get_private(wq);
  544. if (iaa_wq) {
  545. iaa_wq->ref--;
  546. if (iaa_wq->ref == 0 && iaa_wq->remove) {
  547. idxd_wq_set_private(wq, NULL);
  548. free = true;
  549. }
  550. idxd_wq_put(wq);
  551. } else {
  552. ret = -ENODEV;
  553. }
  554. spin_unlock(&idxd->dev_lock);
  555. if (free) {
  556. __free_iaa_wq(iaa_wq);
  557. kfree(iaa_wq);
  558. }
  559. return ret;
  560. }
  561. static void free_wq_table(void)
  562. {
  563. int cpu;
  564. for (cpu = 0; cpu < nr_cpus; cpu++)
  565. wq_table_free_entry(cpu);
  566. free_percpu(wq_table);
  567. pr_debug("freed wq table\n");
  568. }
  569. static int alloc_wq_table(int max_wqs)
  570. {
  571. struct wq_table_entry *entry;
  572. int cpu;
  573. wq_table = alloc_percpu(struct wq_table_entry);
  574. if (!wq_table)
  575. return -ENOMEM;
  576. for (cpu = 0; cpu < nr_cpus; cpu++) {
  577. entry = per_cpu_ptr(wq_table, cpu);
  578. entry->wqs = kcalloc(max_wqs, sizeof(struct wq *), GFP_KERNEL);
  579. if (!entry->wqs) {
  580. free_wq_table();
  581. return -ENOMEM;
  582. }
  583. entry->max_wqs = max_wqs;
  584. }
  585. pr_debug("initialized wq table\n");
  586. return 0;
  587. }
  588. static int save_iaa_wq(struct idxd_wq *wq)
  589. {
  590. struct iaa_device *iaa_device, *found = NULL;
  591. struct idxd_device *idxd;
  592. struct pci_dev *pdev;
  593. struct device *dev;
  594. int ret = 0;
  595. list_for_each_entry(iaa_device, &iaa_devices, list) {
  596. if (iaa_device->idxd == wq->idxd) {
  597. idxd = iaa_device->idxd;
  598. pdev = idxd->pdev;
  599. dev = &pdev->dev;
  600. /*
  601. * Check to see that we don't already have this wq.
  602. * Shouldn't happen but we don't control probing.
  603. */
  604. if (iaa_has_wq(iaa_device, wq)) {
  605. dev_dbg(dev, "same wq probed multiple times for iaa_device %p\n",
  606. iaa_device);
  607. goto out;
  608. }
  609. found = iaa_device;
  610. ret = add_iaa_wq(iaa_device, wq, NULL);
  611. if (ret)
  612. goto out;
  613. break;
  614. }
  615. }
  616. if (!found) {
  617. struct iaa_device *new_device;
  618. struct iaa_wq *new_wq;
  619. new_device = add_iaa_device(wq->idxd);
  620. if (!new_device) {
  621. ret = -ENOMEM;
  622. goto out;
  623. }
  624. ret = add_iaa_wq(new_device, wq, &new_wq);
  625. if (ret) {
  626. del_iaa_device(new_device);
  627. free_iaa_device(new_device);
  628. goto out;
  629. }
  630. ret = init_iaa_device(new_device, new_wq);
  631. if (ret) {
  632. del_iaa_wq(new_device, new_wq->wq);
  633. del_iaa_device(new_device);
  634. free_iaa_wq(new_wq);
  635. goto out;
  636. }
  637. }
  638. if (WARN_ON(nr_iaa == 0))
  639. return -EINVAL;
  640. cpus_per_iaa = (nr_nodes * nr_cpus_per_node) / nr_iaa;
  641. if (!cpus_per_iaa)
  642. cpus_per_iaa = 1;
  643. out:
  644. return 0;
  645. }
  646. static void remove_iaa_wq(struct idxd_wq *wq)
  647. {
  648. struct iaa_device *iaa_device;
  649. list_for_each_entry(iaa_device, &iaa_devices, list) {
  650. if (iaa_has_wq(iaa_device, wq)) {
  651. del_iaa_wq(iaa_device, wq);
  652. break;
  653. }
  654. }
  655. if (nr_iaa) {
  656. cpus_per_iaa = (nr_nodes * nr_cpus_per_node) / nr_iaa;
  657. if (!cpus_per_iaa)
  658. cpus_per_iaa = 1;
  659. } else
  660. cpus_per_iaa = 1;
  661. }
  662. static int wq_table_add_wqs(int iaa, int cpu)
  663. {
  664. struct iaa_device *iaa_device, *found_device = NULL;
  665. int ret = 0, cur_iaa = 0, n_wqs_added = 0;
  666. struct idxd_device *idxd;
  667. struct iaa_wq *iaa_wq;
  668. struct pci_dev *pdev;
  669. struct device *dev;
  670. list_for_each_entry(iaa_device, &iaa_devices, list) {
  671. idxd = iaa_device->idxd;
  672. pdev = idxd->pdev;
  673. dev = &pdev->dev;
  674. if (cur_iaa != iaa) {
  675. cur_iaa++;
  676. continue;
  677. }
  678. found_device = iaa_device;
  679. dev_dbg(dev, "getting wq from iaa_device %d, cur_iaa %d\n",
  680. found_device->idxd->id, cur_iaa);
  681. break;
  682. }
  683. if (!found_device) {
  684. found_device = list_first_entry_or_null(&iaa_devices,
  685. struct iaa_device, list);
  686. if (!found_device) {
  687. pr_debug("couldn't find any iaa devices with wqs!\n");
  688. ret = -EINVAL;
  689. goto out;
  690. }
  691. cur_iaa = 0;
  692. idxd = found_device->idxd;
  693. pdev = idxd->pdev;
  694. dev = &pdev->dev;
  695. dev_dbg(dev, "getting wq from only iaa_device %d, cur_iaa %d\n",
  696. found_device->idxd->id, cur_iaa);
  697. }
  698. list_for_each_entry(iaa_wq, &found_device->wqs, list) {
  699. wq_table_add(cpu, iaa_wq->wq);
  700. pr_debug("rebalance: added wq for cpu=%d: iaa wq %d.%d\n",
  701. cpu, iaa_wq->wq->idxd->id, iaa_wq->wq->id);
  702. n_wqs_added++;
  703. }
  704. if (!n_wqs_added) {
  705. pr_debug("couldn't find any iaa wqs!\n");
  706. ret = -EINVAL;
  707. goto out;
  708. }
  709. out:
  710. return ret;
  711. }
  712. /*
  713. * Rebalance the wq table so that given a cpu, it's easy to find the
  714. * closest IAA instance. The idea is to try to choose the most
  715. * appropriate IAA instance for a caller and spread available
  716. * workqueues around to clients.
  717. */
  718. static void rebalance_wq_table(void)
  719. {
  720. const struct cpumask *node_cpus;
  721. int node, cpu, iaa = -1;
  722. if (nr_iaa == 0)
  723. return;
  724. pr_debug("rebalance: nr_nodes=%d, nr_cpus %d, nr_iaa %d, cpus_per_iaa %d\n",
  725. nr_nodes, nr_cpus, nr_iaa, cpus_per_iaa);
  726. clear_wq_table();
  727. if (nr_iaa == 1) {
  728. for (cpu = 0; cpu < nr_cpus; cpu++) {
  729. if (WARN_ON(wq_table_add_wqs(0, cpu))) {
  730. pr_debug("could not add any wqs for iaa 0 to cpu %d!\n", cpu);
  731. return;
  732. }
  733. }
  734. return;
  735. }
  736. for_each_node_with_cpus(node) {
  737. node_cpus = cpumask_of_node(node);
  738. for (cpu = 0; cpu < cpumask_weight(node_cpus); cpu++) {
  739. int node_cpu = cpumask_nth(cpu, node_cpus);
  740. if (WARN_ON(node_cpu >= nr_cpu_ids)) {
  741. pr_debug("node_cpu %d doesn't exist!\n", node_cpu);
  742. return;
  743. }
  744. if ((cpu % cpus_per_iaa) == 0)
  745. iaa++;
  746. if (WARN_ON(wq_table_add_wqs(iaa, node_cpu))) {
  747. pr_debug("could not add any wqs for iaa %d to cpu %d!\n", iaa, cpu);
  748. return;
  749. }
  750. }
  751. }
  752. }
  753. static inline int check_completion(struct device *dev,
  754. struct iax_completion_record *comp,
  755. bool compress,
  756. bool only_once)
  757. {
  758. char *op_str = compress ? "compress" : "decompress";
  759. int ret = 0;
  760. while (!comp->status) {
  761. if (only_once)
  762. return -EAGAIN;
  763. cpu_relax();
  764. }
  765. if (comp->status != IAX_COMP_SUCCESS) {
  766. if (comp->status == IAA_ERROR_WATCHDOG_EXPIRED) {
  767. ret = -ETIMEDOUT;
  768. dev_dbg(dev, "%s timed out, size=0x%x\n",
  769. op_str, comp->output_size);
  770. update_completion_timeout_errs();
  771. goto out;
  772. }
  773. if (comp->status == IAA_ANALYTICS_ERROR &&
  774. comp->error_code == IAA_ERROR_COMP_BUF_OVERFLOW && compress) {
  775. ret = -E2BIG;
  776. dev_dbg(dev, "compressed > uncompressed size,"
  777. " not compressing, size=0x%x\n",
  778. comp->output_size);
  779. update_completion_comp_buf_overflow_errs();
  780. goto out;
  781. }
  782. if (comp->status == IAA_ERROR_DECOMP_BUF_OVERFLOW) {
  783. ret = -EOVERFLOW;
  784. goto out;
  785. }
  786. ret = -EINVAL;
  787. dev_dbg(dev, "iaa %s status=0x%x, error=0x%x, size=0x%x\n",
  788. op_str, comp->status, comp->error_code, comp->output_size);
  789. print_hex_dump(KERN_INFO, "cmp-rec: ", DUMP_PREFIX_OFFSET, 8, 1, comp, 64, 0);
  790. update_completion_einval_errs();
  791. goto out;
  792. }
  793. out:
  794. return ret;
  795. }
  796. static int deflate_generic_decompress(struct acomp_req *req)
  797. {
  798. void *src, *dst;
  799. int ret;
  800. src = kmap_local_page(sg_page(req->src)) + req->src->offset;
  801. dst = kmap_local_page(sg_page(req->dst)) + req->dst->offset;
  802. ret = crypto_comp_decompress(deflate_generic_tfm,
  803. src, req->slen, dst, &req->dlen);
  804. kunmap_local(src);
  805. kunmap_local(dst);
  806. update_total_sw_decomp_calls();
  807. return ret;
  808. }
  809. static int iaa_remap_for_verify(struct device *dev, struct iaa_wq *iaa_wq,
  810. struct acomp_req *req,
  811. dma_addr_t *src_addr, dma_addr_t *dst_addr);
  812. static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,
  813. struct idxd_wq *wq,
  814. dma_addr_t src_addr, unsigned int slen,
  815. dma_addr_t dst_addr, unsigned int *dlen,
  816. u32 compression_crc);
  817. static void iaa_desc_complete(struct idxd_desc *idxd_desc,
  818. enum idxd_complete_type comp_type,
  819. bool free_desc, void *__ctx,
  820. u32 *status)
  821. {
  822. struct iaa_device_compression_mode *active_compression_mode;
  823. struct iaa_compression_ctx *compression_ctx;
  824. struct crypto_ctx *ctx = __ctx;
  825. struct iaa_device *iaa_device;
  826. struct idxd_device *idxd;
  827. struct iaa_wq *iaa_wq;
  828. struct pci_dev *pdev;
  829. struct device *dev;
  830. int ret, err = 0;
  831. compression_ctx = crypto_tfm_ctx(ctx->tfm);
  832. iaa_wq = idxd_wq_get_private(idxd_desc->wq);
  833. iaa_device = iaa_wq->iaa_device;
  834. idxd = iaa_device->idxd;
  835. pdev = idxd->pdev;
  836. dev = &pdev->dev;
  837. active_compression_mode = get_iaa_device_compression_mode(iaa_device,
  838. compression_ctx->mode);
  839. dev_dbg(dev, "%s: compression mode %s,"
  840. " ctx->src_addr %llx, ctx->dst_addr %llx\n", __func__,
  841. active_compression_mode->name,
  842. ctx->src_addr, ctx->dst_addr);
  843. ret = check_completion(dev, idxd_desc->iax_completion,
  844. ctx->compress, false);
  845. if (ret) {
  846. dev_dbg(dev, "%s: check_completion failed ret=%d\n", __func__, ret);
  847. if (!ctx->compress &&
  848. idxd_desc->iax_completion->status == IAA_ANALYTICS_ERROR) {
  849. pr_warn("%s: falling back to deflate-generic decompress, "
  850. "analytics error code %x\n", __func__,
  851. idxd_desc->iax_completion->error_code);
  852. ret = deflate_generic_decompress(ctx->req);
  853. if (ret) {
  854. dev_dbg(dev, "%s: deflate-generic failed ret=%d\n",
  855. __func__, ret);
  856. err = -EIO;
  857. goto err;
  858. }
  859. } else {
  860. err = -EIO;
  861. goto err;
  862. }
  863. } else {
  864. ctx->req->dlen = idxd_desc->iax_completion->output_size;
  865. }
  866. /* Update stats */
  867. if (ctx->compress) {
  868. update_total_comp_bytes_out(ctx->req->dlen);
  869. update_wq_comp_bytes(iaa_wq->wq, ctx->req->dlen);
  870. } else {
  871. update_total_decomp_bytes_in(ctx->req->slen);
  872. update_wq_decomp_bytes(iaa_wq->wq, ctx->req->slen);
  873. }
  874. if (ctx->compress && compression_ctx->verify_compress) {
  875. dma_addr_t src_addr, dst_addr;
  876. u32 compression_crc;
  877. compression_crc = idxd_desc->iax_completion->crc;
  878. ret = iaa_remap_for_verify(dev, iaa_wq, ctx->req, &src_addr, &dst_addr);
  879. if (ret) {
  880. dev_dbg(dev, "%s: compress verify remap failed ret=%d\n", __func__, ret);
  881. err = -EIO;
  882. goto out;
  883. }
  884. ret = iaa_compress_verify(ctx->tfm, ctx->req, iaa_wq->wq, src_addr,
  885. ctx->req->slen, dst_addr, &ctx->req->dlen,
  886. compression_crc);
  887. if (ret) {
  888. dev_dbg(dev, "%s: compress verify failed ret=%d\n", __func__, ret);
  889. err = -EIO;
  890. }
  891. dma_unmap_sg(dev, ctx->req->dst, sg_nents(ctx->req->dst), DMA_TO_DEVICE);
  892. dma_unmap_sg(dev, ctx->req->src, sg_nents(ctx->req->src), DMA_FROM_DEVICE);
  893. goto out;
  894. }
  895. err:
  896. dma_unmap_sg(dev, ctx->req->dst, sg_nents(ctx->req->dst), DMA_FROM_DEVICE);
  897. dma_unmap_sg(dev, ctx->req->src, sg_nents(ctx->req->src), DMA_TO_DEVICE);
  898. out:
  899. if (ret != 0)
  900. dev_dbg(dev, "asynchronous compress failed ret=%d\n", ret);
  901. if (ctx->req->base.complete)
  902. acomp_request_complete(ctx->req, err);
  903. if (free_desc)
  904. idxd_free_desc(idxd_desc->wq, idxd_desc);
  905. iaa_wq_put(idxd_desc->wq);
  906. }
  907. static int iaa_compress(struct crypto_tfm *tfm, struct acomp_req *req,
  908. struct idxd_wq *wq,
  909. dma_addr_t src_addr, unsigned int slen,
  910. dma_addr_t dst_addr, unsigned int *dlen,
  911. u32 *compression_crc)
  912. {
  913. struct iaa_device_compression_mode *active_compression_mode;
  914. struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);
  915. struct iaa_device *iaa_device;
  916. struct idxd_desc *idxd_desc;
  917. struct iax_hw_desc *desc;
  918. struct idxd_device *idxd;
  919. struct iaa_wq *iaa_wq;
  920. struct pci_dev *pdev;
  921. struct device *dev;
  922. int ret = 0;
  923. iaa_wq = idxd_wq_get_private(wq);
  924. iaa_device = iaa_wq->iaa_device;
  925. idxd = iaa_device->idxd;
  926. pdev = idxd->pdev;
  927. dev = &pdev->dev;
  928. active_compression_mode = get_iaa_device_compression_mode(iaa_device, ctx->mode);
  929. idxd_desc = idxd_alloc_desc(wq, IDXD_OP_BLOCK);
  930. if (IS_ERR(idxd_desc)) {
  931. dev_dbg(dev, "idxd descriptor allocation failed\n");
  932. dev_dbg(dev, "iaa compress failed: ret=%ld\n", PTR_ERR(idxd_desc));
  933. return PTR_ERR(idxd_desc);
  934. }
  935. desc = idxd_desc->iax_hw;
  936. desc->flags = IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR |
  937. IDXD_OP_FLAG_RD_SRC2_AECS | IDXD_OP_FLAG_CC;
  938. desc->opcode = IAX_OPCODE_COMPRESS;
  939. desc->compr_flags = IAA_COMP_FLAGS;
  940. desc->priv = 0;
  941. desc->src1_addr = (u64)src_addr;
  942. desc->src1_size = slen;
  943. desc->dst_addr = (u64)dst_addr;
  944. desc->max_dst_size = *dlen;
  945. desc->src2_addr = active_compression_mode->aecs_comp_table_dma_addr;
  946. desc->src2_size = sizeof(struct aecs_comp_table_record);
  947. desc->completion_addr = idxd_desc->compl_dma;
  948. if (ctx->use_irq) {
  949. desc->flags |= IDXD_OP_FLAG_RCI;
  950. idxd_desc->crypto.req = req;
  951. idxd_desc->crypto.tfm = tfm;
  952. idxd_desc->crypto.src_addr = src_addr;
  953. idxd_desc->crypto.dst_addr = dst_addr;
  954. idxd_desc->crypto.compress = true;
  955. dev_dbg(dev, "%s use_async_irq: compression mode %s,"
  956. " src_addr %llx, dst_addr %llx\n", __func__,
  957. active_compression_mode->name,
  958. src_addr, dst_addr);
  959. }
  960. dev_dbg(dev, "%s: compression mode %s,"
  961. " desc->src1_addr %llx, desc->src1_size %d,"
  962. " desc->dst_addr %llx, desc->max_dst_size %d,"
  963. " desc->src2_addr %llx, desc->src2_size %d\n", __func__,
  964. active_compression_mode->name,
  965. desc->src1_addr, desc->src1_size, desc->dst_addr,
  966. desc->max_dst_size, desc->src2_addr, desc->src2_size);
  967. ret = idxd_submit_desc(wq, idxd_desc);
  968. if (ret) {
  969. dev_dbg(dev, "submit_desc failed ret=%d\n", ret);
  970. goto err;
  971. }
  972. /* Update stats */
  973. update_total_comp_calls();
  974. update_wq_comp_calls(wq);
  975. if (ctx->async_mode) {
  976. ret = -EINPROGRESS;
  977. dev_dbg(dev, "%s: returning -EINPROGRESS\n", __func__);
  978. goto out;
  979. }
  980. ret = check_completion(dev, idxd_desc->iax_completion, true, false);
  981. if (ret) {
  982. dev_dbg(dev, "check_completion failed ret=%d\n", ret);
  983. goto err;
  984. }
  985. *dlen = idxd_desc->iax_completion->output_size;
  986. /* Update stats */
  987. update_total_comp_bytes_out(*dlen);
  988. update_wq_comp_bytes(wq, *dlen);
  989. *compression_crc = idxd_desc->iax_completion->crc;
  990. if (!ctx->async_mode)
  991. idxd_free_desc(wq, idxd_desc);
  992. out:
  993. return ret;
  994. err:
  995. idxd_free_desc(wq, idxd_desc);
  996. dev_dbg(dev, "iaa compress failed: ret=%d\n", ret);
  997. goto out;
  998. }
  999. static int iaa_remap_for_verify(struct device *dev, struct iaa_wq *iaa_wq,
  1000. struct acomp_req *req,
  1001. dma_addr_t *src_addr, dma_addr_t *dst_addr)
  1002. {
  1003. int ret = 0;
  1004. int nr_sgs;
  1005. dma_unmap_sg(dev, req->dst, sg_nents(req->dst), DMA_FROM_DEVICE);
  1006. dma_unmap_sg(dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
  1007. nr_sgs = dma_map_sg(dev, req->src, sg_nents(req->src), DMA_FROM_DEVICE);
  1008. if (nr_sgs <= 0 || nr_sgs > 1) {
  1009. dev_dbg(dev, "verify: couldn't map src sg for iaa device %d,"
  1010. " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
  1011. iaa_wq->wq->id, ret);
  1012. ret = -EIO;
  1013. goto out;
  1014. }
  1015. *src_addr = sg_dma_address(req->src);
  1016. dev_dbg(dev, "verify: dma_map_sg, src_addr %llx, nr_sgs %d, req->src %p,"
  1017. " req->slen %d, sg_dma_len(sg) %d\n", *src_addr, nr_sgs,
  1018. req->src, req->slen, sg_dma_len(req->src));
  1019. nr_sgs = dma_map_sg(dev, req->dst, sg_nents(req->dst), DMA_TO_DEVICE);
  1020. if (nr_sgs <= 0 || nr_sgs > 1) {
  1021. dev_dbg(dev, "verify: couldn't map dst sg for iaa device %d,"
  1022. " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
  1023. iaa_wq->wq->id, ret);
  1024. ret = -EIO;
  1025. dma_unmap_sg(dev, req->src, sg_nents(req->src), DMA_FROM_DEVICE);
  1026. goto out;
  1027. }
  1028. *dst_addr = sg_dma_address(req->dst);
  1029. dev_dbg(dev, "verify: dma_map_sg, dst_addr %llx, nr_sgs %d, req->dst %p,"
  1030. " req->dlen %d, sg_dma_len(sg) %d\n", *dst_addr, nr_sgs,
  1031. req->dst, req->dlen, sg_dma_len(req->dst));
  1032. out:
  1033. return ret;
  1034. }
  1035. static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,
  1036. struct idxd_wq *wq,
  1037. dma_addr_t src_addr, unsigned int slen,
  1038. dma_addr_t dst_addr, unsigned int *dlen,
  1039. u32 compression_crc)
  1040. {
  1041. struct iaa_device_compression_mode *active_compression_mode;
  1042. struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);
  1043. struct iaa_device *iaa_device;
  1044. struct idxd_desc *idxd_desc;
  1045. struct iax_hw_desc *desc;
  1046. struct idxd_device *idxd;
  1047. struct iaa_wq *iaa_wq;
  1048. struct pci_dev *pdev;
  1049. struct device *dev;
  1050. int ret = 0;
  1051. iaa_wq = idxd_wq_get_private(wq);
  1052. iaa_device = iaa_wq->iaa_device;
  1053. idxd = iaa_device->idxd;
  1054. pdev = idxd->pdev;
  1055. dev = &pdev->dev;
  1056. active_compression_mode = get_iaa_device_compression_mode(iaa_device, ctx->mode);
  1057. idxd_desc = idxd_alloc_desc(wq, IDXD_OP_BLOCK);
  1058. if (IS_ERR(idxd_desc)) {
  1059. dev_dbg(dev, "idxd descriptor allocation failed\n");
  1060. dev_dbg(dev, "iaa compress failed: ret=%ld\n",
  1061. PTR_ERR(idxd_desc));
  1062. return PTR_ERR(idxd_desc);
  1063. }
  1064. desc = idxd_desc->iax_hw;
  1065. /* Verify (optional) - decompress and check crc, suppress dest write */
  1066. desc->flags = IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC;
  1067. desc->opcode = IAX_OPCODE_DECOMPRESS;
  1068. desc->decompr_flags = IAA_DECOMP_FLAGS | IAA_DECOMP_SUPPRESS_OUTPUT;
  1069. desc->priv = 0;
  1070. desc->src1_addr = (u64)dst_addr;
  1071. desc->src1_size = *dlen;
  1072. desc->dst_addr = (u64)src_addr;
  1073. desc->max_dst_size = slen;
  1074. desc->completion_addr = idxd_desc->compl_dma;
  1075. dev_dbg(dev, "(verify) compression mode %s,"
  1076. " desc->src1_addr %llx, desc->src1_size %d,"
  1077. " desc->dst_addr %llx, desc->max_dst_size %d,"
  1078. " desc->src2_addr %llx, desc->src2_size %d\n",
  1079. active_compression_mode->name,
  1080. desc->src1_addr, desc->src1_size, desc->dst_addr,
  1081. desc->max_dst_size, desc->src2_addr, desc->src2_size);
  1082. ret = idxd_submit_desc(wq, idxd_desc);
  1083. if (ret) {
  1084. dev_dbg(dev, "submit_desc (verify) failed ret=%d\n", ret);
  1085. goto err;
  1086. }
  1087. ret = check_completion(dev, idxd_desc->iax_completion, false, false);
  1088. if (ret) {
  1089. dev_dbg(dev, "(verify) check_completion failed ret=%d\n", ret);
  1090. goto err;
  1091. }
  1092. if (compression_crc != idxd_desc->iax_completion->crc) {
  1093. ret = -EINVAL;
  1094. dev_dbg(dev, "(verify) iaa comp/decomp crc mismatch:"
  1095. " comp=0x%x, decomp=0x%x\n", compression_crc,
  1096. idxd_desc->iax_completion->crc);
  1097. print_hex_dump(KERN_INFO, "cmp-rec: ", DUMP_PREFIX_OFFSET,
  1098. 8, 1, idxd_desc->iax_completion, 64, 0);
  1099. goto err;
  1100. }
  1101. idxd_free_desc(wq, idxd_desc);
  1102. out:
  1103. return ret;
  1104. err:
  1105. idxd_free_desc(wq, idxd_desc);
  1106. dev_dbg(dev, "iaa compress failed: ret=%d\n", ret);
  1107. goto out;
  1108. }
  1109. static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,
  1110. struct idxd_wq *wq,
  1111. dma_addr_t src_addr, unsigned int slen,
  1112. dma_addr_t dst_addr, unsigned int *dlen,
  1113. bool disable_async)
  1114. {
  1115. struct iaa_device_compression_mode *active_compression_mode;
  1116. struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);
  1117. struct iaa_device *iaa_device;
  1118. struct idxd_desc *idxd_desc;
  1119. struct iax_hw_desc *desc;
  1120. struct idxd_device *idxd;
  1121. struct iaa_wq *iaa_wq;
  1122. struct pci_dev *pdev;
  1123. struct device *dev;
  1124. int ret = 0;
  1125. iaa_wq = idxd_wq_get_private(wq);
  1126. iaa_device = iaa_wq->iaa_device;
  1127. idxd = iaa_device->idxd;
  1128. pdev = idxd->pdev;
  1129. dev = &pdev->dev;
  1130. active_compression_mode = get_iaa_device_compression_mode(iaa_device, ctx->mode);
  1131. idxd_desc = idxd_alloc_desc(wq, IDXD_OP_BLOCK);
  1132. if (IS_ERR(idxd_desc)) {
  1133. dev_dbg(dev, "idxd descriptor allocation failed\n");
  1134. dev_dbg(dev, "iaa decompress failed: ret=%ld\n",
  1135. PTR_ERR(idxd_desc));
  1136. return PTR_ERR(idxd_desc);
  1137. }
  1138. desc = idxd_desc->iax_hw;
  1139. desc->flags = IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC;
  1140. desc->opcode = IAX_OPCODE_DECOMPRESS;
  1141. desc->max_dst_size = PAGE_SIZE;
  1142. desc->decompr_flags = IAA_DECOMP_FLAGS;
  1143. desc->priv = 0;
  1144. desc->src1_addr = (u64)src_addr;
  1145. desc->dst_addr = (u64)dst_addr;
  1146. desc->max_dst_size = *dlen;
  1147. desc->src1_size = slen;
  1148. desc->completion_addr = idxd_desc->compl_dma;
  1149. if (ctx->use_irq && !disable_async) {
  1150. desc->flags |= IDXD_OP_FLAG_RCI;
  1151. idxd_desc->crypto.req = req;
  1152. idxd_desc->crypto.tfm = tfm;
  1153. idxd_desc->crypto.src_addr = src_addr;
  1154. idxd_desc->crypto.dst_addr = dst_addr;
  1155. idxd_desc->crypto.compress = false;
  1156. dev_dbg(dev, "%s: use_async_irq compression mode %s,"
  1157. " src_addr %llx, dst_addr %llx\n", __func__,
  1158. active_compression_mode->name,
  1159. src_addr, dst_addr);
  1160. }
  1161. dev_dbg(dev, "%s: decompression mode %s,"
  1162. " desc->src1_addr %llx, desc->src1_size %d,"
  1163. " desc->dst_addr %llx, desc->max_dst_size %d,"
  1164. " desc->src2_addr %llx, desc->src2_size %d\n", __func__,
  1165. active_compression_mode->name,
  1166. desc->src1_addr, desc->src1_size, desc->dst_addr,
  1167. desc->max_dst_size, desc->src2_addr, desc->src2_size);
  1168. ret = idxd_submit_desc(wq, idxd_desc);
  1169. if (ret) {
  1170. dev_dbg(dev, "submit_desc failed ret=%d\n", ret);
  1171. goto err;
  1172. }
  1173. /* Update stats */
  1174. update_total_decomp_calls();
  1175. update_wq_decomp_calls(wq);
  1176. if (ctx->async_mode && !disable_async) {
  1177. ret = -EINPROGRESS;
  1178. dev_dbg(dev, "%s: returning -EINPROGRESS\n", __func__);
  1179. goto out;
  1180. }
  1181. ret = check_completion(dev, idxd_desc->iax_completion, false, false);
  1182. if (ret) {
  1183. dev_dbg(dev, "%s: check_completion failed ret=%d\n", __func__, ret);
  1184. if (idxd_desc->iax_completion->status == IAA_ANALYTICS_ERROR) {
  1185. pr_warn("%s: falling back to deflate-generic decompress, "
  1186. "analytics error code %x\n", __func__,
  1187. idxd_desc->iax_completion->error_code);
  1188. ret = deflate_generic_decompress(req);
  1189. if (ret) {
  1190. dev_dbg(dev, "%s: deflate-generic failed ret=%d\n",
  1191. __func__, ret);
  1192. goto err;
  1193. }
  1194. } else {
  1195. goto err;
  1196. }
  1197. } else {
  1198. req->dlen = idxd_desc->iax_completion->output_size;
  1199. }
  1200. *dlen = req->dlen;
  1201. if (!ctx->async_mode || disable_async)
  1202. idxd_free_desc(wq, idxd_desc);
  1203. /* Update stats */
  1204. update_total_decomp_bytes_in(slen);
  1205. update_wq_decomp_bytes(wq, slen);
  1206. out:
  1207. return ret;
  1208. err:
  1209. idxd_free_desc(wq, idxd_desc);
  1210. dev_dbg(dev, "iaa decompress failed: ret=%d\n", ret);
  1211. goto out;
  1212. }
  1213. static int iaa_comp_acompress(struct acomp_req *req)
  1214. {
  1215. struct iaa_compression_ctx *compression_ctx;
  1216. struct crypto_tfm *tfm = req->base.tfm;
  1217. dma_addr_t src_addr, dst_addr;
  1218. int nr_sgs, cpu, ret = 0;
  1219. struct iaa_wq *iaa_wq;
  1220. u32 compression_crc;
  1221. struct idxd_wq *wq;
  1222. struct device *dev;
  1223. compression_ctx = crypto_tfm_ctx(tfm);
  1224. if (!iaa_crypto_enabled) {
  1225. pr_debug("iaa_crypto disabled, not compressing\n");
  1226. return -ENODEV;
  1227. }
  1228. if (!req->src || !req->slen) {
  1229. pr_debug("invalid src, not compressing\n");
  1230. return -EINVAL;
  1231. }
  1232. cpu = get_cpu();
  1233. wq = wq_table_next_wq(cpu);
  1234. put_cpu();
  1235. if (!wq) {
  1236. pr_debug("no wq configured for cpu=%d\n", cpu);
  1237. return -ENODEV;
  1238. }
  1239. ret = iaa_wq_get(wq);
  1240. if (ret) {
  1241. pr_debug("no wq available for cpu=%d\n", cpu);
  1242. return -ENODEV;
  1243. }
  1244. iaa_wq = idxd_wq_get_private(wq);
  1245. dev = &wq->idxd->pdev->dev;
  1246. nr_sgs = dma_map_sg(dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
  1247. if (nr_sgs <= 0 || nr_sgs > 1) {
  1248. dev_dbg(dev, "couldn't map src sg for iaa device %d,"
  1249. " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
  1250. iaa_wq->wq->id, ret);
  1251. ret = -EIO;
  1252. goto out;
  1253. }
  1254. src_addr = sg_dma_address(req->src);
  1255. dev_dbg(dev, "dma_map_sg, src_addr %llx, nr_sgs %d, req->src %p,"
  1256. " req->slen %d, sg_dma_len(sg) %d\n", src_addr, nr_sgs,
  1257. req->src, req->slen, sg_dma_len(req->src));
  1258. nr_sgs = dma_map_sg(dev, req->dst, sg_nents(req->dst), DMA_FROM_DEVICE);
  1259. if (nr_sgs <= 0 || nr_sgs > 1) {
  1260. dev_dbg(dev, "couldn't map dst sg for iaa device %d,"
  1261. " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
  1262. iaa_wq->wq->id, ret);
  1263. ret = -EIO;
  1264. goto err_map_dst;
  1265. }
  1266. dst_addr = sg_dma_address(req->dst);
  1267. dev_dbg(dev, "dma_map_sg, dst_addr %llx, nr_sgs %d, req->dst %p,"
  1268. " req->dlen %d, sg_dma_len(sg) %d\n", dst_addr, nr_sgs,
  1269. req->dst, req->dlen, sg_dma_len(req->dst));
  1270. ret = iaa_compress(tfm, req, wq, src_addr, req->slen, dst_addr,
  1271. &req->dlen, &compression_crc);
  1272. if (ret == -EINPROGRESS)
  1273. return ret;
  1274. if (!ret && compression_ctx->verify_compress) {
  1275. ret = iaa_remap_for_verify(dev, iaa_wq, req, &src_addr, &dst_addr);
  1276. if (ret) {
  1277. dev_dbg(dev, "%s: compress verify remap failed ret=%d\n", __func__, ret);
  1278. goto out;
  1279. }
  1280. ret = iaa_compress_verify(tfm, req, wq, src_addr, req->slen,
  1281. dst_addr, &req->dlen, compression_crc);
  1282. if (ret)
  1283. dev_dbg(dev, "asynchronous compress verification failed ret=%d\n", ret);
  1284. dma_unmap_sg(dev, req->dst, sg_nents(req->dst), DMA_TO_DEVICE);
  1285. dma_unmap_sg(dev, req->src, sg_nents(req->src), DMA_FROM_DEVICE);
  1286. goto out;
  1287. }
  1288. if (ret)
  1289. dev_dbg(dev, "asynchronous compress failed ret=%d\n", ret);
  1290. dma_unmap_sg(dev, req->dst, sg_nents(req->dst), DMA_FROM_DEVICE);
  1291. err_map_dst:
  1292. dma_unmap_sg(dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
  1293. out:
  1294. iaa_wq_put(wq);
  1295. return ret;
  1296. }
  1297. static int iaa_comp_adecompress(struct acomp_req *req)
  1298. {
  1299. struct crypto_tfm *tfm = req->base.tfm;
  1300. dma_addr_t src_addr, dst_addr;
  1301. int nr_sgs, cpu, ret = 0;
  1302. struct iaa_wq *iaa_wq;
  1303. struct device *dev;
  1304. struct idxd_wq *wq;
  1305. if (!iaa_crypto_enabled) {
  1306. pr_debug("iaa_crypto disabled, not decompressing\n");
  1307. return -ENODEV;
  1308. }
  1309. if (!req->src || !req->slen) {
  1310. pr_debug("invalid src, not decompressing\n");
  1311. return -EINVAL;
  1312. }
  1313. cpu = get_cpu();
  1314. wq = wq_table_next_wq(cpu);
  1315. put_cpu();
  1316. if (!wq) {
  1317. pr_debug("no wq configured for cpu=%d\n", cpu);
  1318. return -ENODEV;
  1319. }
  1320. ret = iaa_wq_get(wq);
  1321. if (ret) {
  1322. pr_debug("no wq available for cpu=%d\n", cpu);
  1323. return -ENODEV;
  1324. }
  1325. iaa_wq = idxd_wq_get_private(wq);
  1326. dev = &wq->idxd->pdev->dev;
  1327. nr_sgs = dma_map_sg(dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
  1328. if (nr_sgs <= 0 || nr_sgs > 1) {
  1329. dev_dbg(dev, "couldn't map src sg for iaa device %d,"
  1330. " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
  1331. iaa_wq->wq->id, ret);
  1332. ret = -EIO;
  1333. goto out;
  1334. }
  1335. src_addr = sg_dma_address(req->src);
  1336. dev_dbg(dev, "dma_map_sg, src_addr %llx, nr_sgs %d, req->src %p,"
  1337. " req->slen %d, sg_dma_len(sg) %d\n", src_addr, nr_sgs,
  1338. req->src, req->slen, sg_dma_len(req->src));
  1339. nr_sgs = dma_map_sg(dev, req->dst, sg_nents(req->dst), DMA_FROM_DEVICE);
  1340. if (nr_sgs <= 0 || nr_sgs > 1) {
  1341. dev_dbg(dev, "couldn't map dst sg for iaa device %d,"
  1342. " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
  1343. iaa_wq->wq->id, ret);
  1344. ret = -EIO;
  1345. goto err_map_dst;
  1346. }
  1347. dst_addr = sg_dma_address(req->dst);
  1348. dev_dbg(dev, "dma_map_sg, dst_addr %llx, nr_sgs %d, req->dst %p,"
  1349. " req->dlen %d, sg_dma_len(sg) %d\n", dst_addr, nr_sgs,
  1350. req->dst, req->dlen, sg_dma_len(req->dst));
  1351. ret = iaa_decompress(tfm, req, wq, src_addr, req->slen,
  1352. dst_addr, &req->dlen, false);
  1353. if (ret == -EINPROGRESS)
  1354. return ret;
  1355. if (ret != 0)
  1356. dev_dbg(dev, "asynchronous decompress failed ret=%d\n", ret);
  1357. dma_unmap_sg(dev, req->dst, sg_nents(req->dst), DMA_FROM_DEVICE);
  1358. err_map_dst:
  1359. dma_unmap_sg(dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
  1360. out:
  1361. iaa_wq_put(wq);
  1362. return ret;
  1363. }
  1364. static void compression_ctx_init(struct iaa_compression_ctx *ctx)
  1365. {
  1366. ctx->verify_compress = iaa_verify_compress;
  1367. ctx->async_mode = async_mode;
  1368. ctx->use_irq = use_irq;
  1369. }
  1370. static int iaa_comp_init_fixed(struct crypto_acomp *acomp_tfm)
  1371. {
  1372. struct crypto_tfm *tfm = crypto_acomp_tfm(acomp_tfm);
  1373. struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);
  1374. compression_ctx_init(ctx);
  1375. ctx->mode = IAA_MODE_FIXED;
  1376. return 0;
  1377. }
  1378. static struct acomp_alg iaa_acomp_fixed_deflate = {
  1379. .init = iaa_comp_init_fixed,
  1380. .compress = iaa_comp_acompress,
  1381. .decompress = iaa_comp_adecompress,
  1382. .base = {
  1383. .cra_name = "deflate",
  1384. .cra_driver_name = "deflate-iaa",
  1385. .cra_flags = CRYPTO_ALG_ASYNC,
  1386. .cra_ctxsize = sizeof(struct iaa_compression_ctx),
  1387. .cra_module = THIS_MODULE,
  1388. .cra_priority = IAA_ALG_PRIORITY,
  1389. }
  1390. };
  1391. static int iaa_register_compression_device(void)
  1392. {
  1393. int ret;
  1394. ret = crypto_register_acomp(&iaa_acomp_fixed_deflate);
  1395. if (ret) {
  1396. pr_err("deflate algorithm acomp fixed registration failed (%d)\n", ret);
  1397. goto out;
  1398. }
  1399. iaa_crypto_registered = true;
  1400. out:
  1401. return ret;
  1402. }
  1403. static int iaa_unregister_compression_device(void)
  1404. {
  1405. if (iaa_crypto_registered)
  1406. crypto_unregister_acomp(&iaa_acomp_fixed_deflate);
  1407. return 0;
  1408. }
  1409. static int iaa_crypto_probe(struct idxd_dev *idxd_dev)
  1410. {
  1411. struct idxd_wq *wq = idxd_dev_to_wq(idxd_dev);
  1412. struct idxd_device *idxd = wq->idxd;
  1413. struct idxd_driver_data *data = idxd->data;
  1414. struct device *dev = &idxd_dev->conf_dev;
  1415. bool first_wq = false;
  1416. int ret = 0;
  1417. if (idxd->state != IDXD_DEV_ENABLED)
  1418. return -ENXIO;
  1419. if (data->type != IDXD_TYPE_IAX)
  1420. return -ENODEV;
  1421. mutex_lock(&wq->wq_lock);
  1422. if (idxd_wq_get_private(wq)) {
  1423. mutex_unlock(&wq->wq_lock);
  1424. return -EBUSY;
  1425. }
  1426. if (!idxd_wq_driver_name_match(wq, dev)) {
  1427. dev_dbg(dev, "wq %d.%d driver_name match failed: wq driver_name %s, dev driver name %s\n",
  1428. idxd->id, wq->id, wq->driver_name, dev->driver->name);
  1429. idxd->cmd_status = IDXD_SCMD_WQ_NO_DRV_NAME;
  1430. ret = -ENODEV;
  1431. goto err;
  1432. }
  1433. wq->type = IDXD_WQT_KERNEL;
  1434. ret = idxd_drv_enable_wq(wq);
  1435. if (ret < 0) {
  1436. dev_dbg(dev, "enable wq %d.%d failed: %d\n",
  1437. idxd->id, wq->id, ret);
  1438. ret = -ENXIO;
  1439. goto err;
  1440. }
  1441. mutex_lock(&iaa_devices_lock);
  1442. if (list_empty(&iaa_devices)) {
  1443. ret = alloc_wq_table(wq->idxd->max_wqs);
  1444. if (ret)
  1445. goto err_alloc;
  1446. first_wq = true;
  1447. }
  1448. ret = save_iaa_wq(wq);
  1449. if (ret)
  1450. goto err_save;
  1451. rebalance_wq_table();
  1452. if (first_wq) {
  1453. iaa_crypto_enabled = true;
  1454. ret = iaa_register_compression_device();
  1455. if (ret != 0) {
  1456. iaa_crypto_enabled = false;
  1457. dev_dbg(dev, "IAA compression device registration failed\n");
  1458. goto err_register;
  1459. }
  1460. try_module_get(THIS_MODULE);
  1461. pr_info("iaa_crypto now ENABLED\n");
  1462. }
  1463. mutex_unlock(&iaa_devices_lock);
  1464. out:
  1465. mutex_unlock(&wq->wq_lock);
  1466. return ret;
  1467. err_register:
  1468. remove_iaa_wq(wq);
  1469. free_iaa_wq(idxd_wq_get_private(wq));
  1470. err_save:
  1471. if (first_wq)
  1472. free_wq_table();
  1473. err_alloc:
  1474. mutex_unlock(&iaa_devices_lock);
  1475. idxd_drv_disable_wq(wq);
  1476. err:
  1477. wq->type = IDXD_WQT_NONE;
  1478. goto out;
  1479. }
  1480. static void iaa_crypto_remove(struct idxd_dev *idxd_dev)
  1481. {
  1482. struct idxd_wq *wq = idxd_dev_to_wq(idxd_dev);
  1483. struct idxd_device *idxd = wq->idxd;
  1484. struct iaa_wq *iaa_wq;
  1485. bool free = false;
  1486. idxd_wq_quiesce(wq);
  1487. mutex_lock(&wq->wq_lock);
  1488. mutex_lock(&iaa_devices_lock);
  1489. remove_iaa_wq(wq);
  1490. spin_lock(&idxd->dev_lock);
  1491. iaa_wq = idxd_wq_get_private(wq);
  1492. if (!iaa_wq) {
  1493. spin_unlock(&idxd->dev_lock);
  1494. pr_err("%s: no iaa_wq available to remove\n", __func__);
  1495. goto out;
  1496. }
  1497. if (iaa_wq->ref) {
  1498. iaa_wq->remove = true;
  1499. } else {
  1500. wq = iaa_wq->wq;
  1501. idxd_wq_set_private(wq, NULL);
  1502. free = true;
  1503. }
  1504. spin_unlock(&idxd->dev_lock);
  1505. if (free) {
  1506. __free_iaa_wq(iaa_wq);
  1507. kfree(iaa_wq);
  1508. }
  1509. idxd_drv_disable_wq(wq);
  1510. rebalance_wq_table();
  1511. if (nr_iaa == 0) {
  1512. iaa_crypto_enabled = false;
  1513. free_wq_table();
  1514. module_put(THIS_MODULE);
  1515. pr_info("iaa_crypto now DISABLED\n");
  1516. }
  1517. out:
  1518. mutex_unlock(&iaa_devices_lock);
  1519. mutex_unlock(&wq->wq_lock);
  1520. }
  1521. static enum idxd_dev_type dev_types[] = {
  1522. IDXD_DEV_WQ,
  1523. IDXD_DEV_NONE,
  1524. };
  1525. static struct idxd_device_driver iaa_crypto_driver = {
  1526. .probe = iaa_crypto_probe,
  1527. .remove = iaa_crypto_remove,
  1528. .name = IDXD_SUBDRIVER_NAME,
  1529. .type = dev_types,
  1530. .desc_complete = iaa_desc_complete,
  1531. };
  1532. static int __init iaa_crypto_init_module(void)
  1533. {
  1534. int ret = 0;
  1535. int node;
  1536. nr_cpus = num_possible_cpus();
  1537. for_each_node_with_cpus(node)
  1538. nr_nodes++;
  1539. if (!nr_nodes) {
  1540. pr_err("IAA couldn't find any nodes with cpus\n");
  1541. return -ENODEV;
  1542. }
  1543. nr_cpus_per_node = nr_cpus / nr_nodes;
  1544. if (crypto_has_comp("deflate-generic", 0, 0))
  1545. deflate_generic_tfm = crypto_alloc_comp("deflate-generic", 0, 0);
  1546. if (IS_ERR_OR_NULL(deflate_generic_tfm)) {
  1547. pr_err("IAA could not alloc %s tfm: errcode = %ld\n",
  1548. "deflate-generic", PTR_ERR(deflate_generic_tfm));
  1549. return -ENOMEM;
  1550. }
  1551. ret = iaa_aecs_init_fixed();
  1552. if (ret < 0) {
  1553. pr_debug("IAA fixed compression mode init failed\n");
  1554. goto err_aecs_init;
  1555. }
  1556. ret = idxd_driver_register(&iaa_crypto_driver);
  1557. if (ret) {
  1558. pr_debug("IAA wq sub-driver registration failed\n");
  1559. goto err_driver_reg;
  1560. }
  1561. ret = driver_create_file(&iaa_crypto_driver.drv,
  1562. &driver_attr_verify_compress);
  1563. if (ret) {
  1564. pr_debug("IAA verify_compress attr creation failed\n");
  1565. goto err_verify_attr_create;
  1566. }
  1567. ret = driver_create_file(&iaa_crypto_driver.drv,
  1568. &driver_attr_sync_mode);
  1569. if (ret) {
  1570. pr_debug("IAA sync mode attr creation failed\n");
  1571. goto err_sync_attr_create;
  1572. }
  1573. if (iaa_crypto_debugfs_init())
  1574. pr_warn("debugfs init failed, stats not available\n");
  1575. pr_debug("initialized\n");
  1576. out:
  1577. return ret;
  1578. err_sync_attr_create:
  1579. driver_remove_file(&iaa_crypto_driver.drv,
  1580. &driver_attr_verify_compress);
  1581. err_verify_attr_create:
  1582. idxd_driver_unregister(&iaa_crypto_driver);
  1583. err_driver_reg:
  1584. iaa_aecs_cleanup_fixed();
  1585. err_aecs_init:
  1586. crypto_free_comp(deflate_generic_tfm);
  1587. goto out;
  1588. }
  1589. static void __exit iaa_crypto_cleanup_module(void)
  1590. {
  1591. if (iaa_unregister_compression_device())
  1592. pr_debug("IAA compression device unregister failed\n");
  1593. iaa_crypto_debugfs_cleanup();
  1594. driver_remove_file(&iaa_crypto_driver.drv,
  1595. &driver_attr_sync_mode);
  1596. driver_remove_file(&iaa_crypto_driver.drv,
  1597. &driver_attr_verify_compress);
  1598. idxd_driver_unregister(&iaa_crypto_driver);
  1599. iaa_aecs_cleanup_fixed();
  1600. crypto_free_comp(deflate_generic_tfm);
  1601. pr_debug("cleaned up\n");
  1602. }
  1603. MODULE_IMPORT_NS(IDXD);
  1604. MODULE_LICENSE("GPL");
  1605. MODULE_ALIAS_IDXD_DEVICE(0);
  1606. MODULE_AUTHOR("Intel Corporation");
  1607. MODULE_DESCRIPTION("IAA Compression Accelerator Crypto Driver");
  1608. module_init(iaa_crypto_init_module);
  1609. module_exit(iaa_crypto_cleanup_module);