cdev.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
  3. #include <linux/init.h>
  4. #include <linux/kernel.h>
  5. #include <linux/module.h>
  6. #include <linux/pci.h>
  7. #include <linux/device.h>
  8. #include <linux/sched/task.h>
  9. #include <linux/io-64-nonatomic-lo-hi.h>
  10. #include <linux/cdev.h>
  11. #include <linux/fs.h>
  12. #include <linux/poll.h>
  13. #include <linux/iommu.h>
  14. #include <linux/highmem.h>
  15. #include <uapi/linux/idxd.h>
  16. #include <linux/xarray.h>
  17. #include "registers.h"
  18. #include "idxd.h"
  19. struct idxd_cdev_context {
  20. const char *name;
  21. dev_t devt;
  22. struct ida minor_ida;
  23. };
  24. /*
  25. * Since user file names are global in DSA devices, define their ida's as
  26. * global to avoid conflict file names.
  27. */
  28. static DEFINE_IDA(file_ida);
  29. static DEFINE_MUTEX(ida_lock);
  30. /*
  31. * ictx is an array based off of accelerator types. enum idxd_type
  32. * is used as index
  33. */
  34. static struct idxd_cdev_context ictx[IDXD_TYPE_MAX] = {
  35. { .name = "dsa" },
  36. { .name = "iax" }
  37. };
  38. struct idxd_user_context {
  39. struct idxd_wq *wq;
  40. struct task_struct *task;
  41. unsigned int pasid;
  42. struct mm_struct *mm;
  43. unsigned int flags;
  44. struct iommu_sva *sva;
  45. struct idxd_dev idxd_dev;
  46. u64 counters[COUNTER_MAX];
  47. int id;
  48. pid_t pid;
  49. };
  50. static void idxd_cdev_evl_drain_pasid(struct idxd_wq *wq, u32 pasid);
  51. static void idxd_xa_pasid_remove(struct idxd_user_context *ctx);
  52. static inline struct idxd_user_context *dev_to_uctx(struct device *dev)
  53. {
  54. struct idxd_dev *idxd_dev = confdev_to_idxd_dev(dev);
  55. return container_of(idxd_dev, struct idxd_user_context, idxd_dev);
  56. }
  57. static ssize_t cr_faults_show(struct device *dev, struct device_attribute *attr, char *buf)
  58. {
  59. struct idxd_user_context *ctx = dev_to_uctx(dev);
  60. return sysfs_emit(buf, "%llu\n", ctx->counters[COUNTER_FAULTS]);
  61. }
  62. static DEVICE_ATTR_RO(cr_faults);
  63. static ssize_t cr_fault_failures_show(struct device *dev,
  64. struct device_attribute *attr, char *buf)
  65. {
  66. struct idxd_user_context *ctx = dev_to_uctx(dev);
  67. return sysfs_emit(buf, "%llu\n", ctx->counters[COUNTER_FAULT_FAILS]);
  68. }
  69. static DEVICE_ATTR_RO(cr_fault_failures);
  70. static ssize_t pid_show(struct device *dev, struct device_attribute *attr, char *buf)
  71. {
  72. struct idxd_user_context *ctx = dev_to_uctx(dev);
  73. return sysfs_emit(buf, "%u\n", ctx->pid);
  74. }
  75. static DEVICE_ATTR_RO(pid);
  76. static struct attribute *cdev_file_attributes[] = {
  77. &dev_attr_cr_faults.attr,
  78. &dev_attr_cr_fault_failures.attr,
  79. &dev_attr_pid.attr,
  80. NULL
  81. };
  82. static umode_t cdev_file_attr_visible(struct kobject *kobj, struct attribute *a, int n)
  83. {
  84. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  85. struct idxd_user_context *ctx = dev_to_uctx(dev);
  86. struct idxd_wq *wq = ctx->wq;
  87. if (!wq_pasid_enabled(wq))
  88. return 0;
  89. return a->mode;
  90. }
  91. static const struct attribute_group cdev_file_attribute_group = {
  92. .attrs = cdev_file_attributes,
  93. .is_visible = cdev_file_attr_visible,
  94. };
  95. static const struct attribute_group *cdev_file_attribute_groups[] = {
  96. &cdev_file_attribute_group,
  97. NULL
  98. };
  99. static void idxd_file_dev_release(struct device *dev)
  100. {
  101. struct idxd_user_context *ctx = dev_to_uctx(dev);
  102. struct idxd_wq *wq = ctx->wq;
  103. struct idxd_device *idxd = wq->idxd;
  104. int rc;
  105. mutex_lock(&ida_lock);
  106. ida_free(&file_ida, ctx->id);
  107. mutex_unlock(&ida_lock);
  108. /* Wait for in-flight operations to complete. */
  109. if (wq_shared(wq)) {
  110. idxd_device_drain_pasid(idxd, ctx->pasid);
  111. } else {
  112. if (device_user_pasid_enabled(idxd)) {
  113. /* The wq disable in the disable pasid function will drain the wq */
  114. rc = idxd_wq_disable_pasid(wq);
  115. if (rc < 0)
  116. dev_err(dev, "wq disable pasid failed.\n");
  117. } else {
  118. idxd_wq_drain(wq);
  119. }
  120. }
  121. if (ctx->sva) {
  122. idxd_cdev_evl_drain_pasid(wq, ctx->pasid);
  123. iommu_sva_unbind_device(ctx->sva);
  124. idxd_xa_pasid_remove(ctx);
  125. }
  126. kfree(ctx);
  127. mutex_lock(&wq->wq_lock);
  128. idxd_wq_put(wq);
  129. mutex_unlock(&wq->wq_lock);
  130. }
  131. static const struct device_type idxd_cdev_file_type = {
  132. .name = "idxd_file",
  133. .release = idxd_file_dev_release,
  134. .groups = cdev_file_attribute_groups,
  135. };
  136. static void idxd_cdev_dev_release(struct device *dev)
  137. {
  138. struct idxd_cdev *idxd_cdev = dev_to_cdev(dev);
  139. struct idxd_cdev_context *cdev_ctx;
  140. struct idxd_wq *wq = idxd_cdev->wq;
  141. cdev_ctx = &ictx[wq->idxd->data->type];
  142. ida_free(&cdev_ctx->minor_ida, idxd_cdev->minor);
  143. kfree(idxd_cdev);
  144. }
  145. static const struct device_type idxd_cdev_device_type = {
  146. .name = "idxd_cdev",
  147. .release = idxd_cdev_dev_release,
  148. };
  149. static inline struct idxd_cdev *inode_idxd_cdev(struct inode *inode)
  150. {
  151. struct cdev *cdev = inode->i_cdev;
  152. return container_of(cdev, struct idxd_cdev, cdev);
  153. }
  154. static inline struct idxd_wq *inode_wq(struct inode *inode)
  155. {
  156. struct idxd_cdev *idxd_cdev = inode_idxd_cdev(inode);
  157. return idxd_cdev->wq;
  158. }
  159. static void idxd_xa_pasid_remove(struct idxd_user_context *ctx)
  160. {
  161. struct idxd_wq *wq = ctx->wq;
  162. void *ptr;
  163. mutex_lock(&wq->uc_lock);
  164. ptr = xa_cmpxchg(&wq->upasid_xa, ctx->pasid, ctx, NULL, GFP_KERNEL);
  165. if (ptr != (void *)ctx)
  166. dev_warn(&wq->idxd->pdev->dev, "xarray cmpxchg failed for pasid %u\n",
  167. ctx->pasid);
  168. mutex_unlock(&wq->uc_lock);
  169. }
  170. void idxd_user_counter_increment(struct idxd_wq *wq, u32 pasid, int index)
  171. {
  172. struct idxd_user_context *ctx;
  173. if (index >= COUNTER_MAX)
  174. return;
  175. mutex_lock(&wq->uc_lock);
  176. ctx = xa_load(&wq->upasid_xa, pasid);
  177. if (!ctx) {
  178. mutex_unlock(&wq->uc_lock);
  179. return;
  180. }
  181. ctx->counters[index]++;
  182. mutex_unlock(&wq->uc_lock);
  183. }
  184. static int idxd_cdev_open(struct inode *inode, struct file *filp)
  185. {
  186. struct idxd_user_context *ctx;
  187. struct idxd_device *idxd;
  188. struct idxd_wq *wq;
  189. struct device *dev, *fdev;
  190. int rc = 0;
  191. struct iommu_sva *sva = NULL;
  192. unsigned int pasid;
  193. struct idxd_cdev *idxd_cdev;
  194. wq = inode_wq(inode);
  195. idxd = wq->idxd;
  196. dev = &idxd->pdev->dev;
  197. dev_dbg(dev, "%s called: %d\n", __func__, idxd_wq_refcount(wq));
  198. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  199. if (!ctx)
  200. return -ENOMEM;
  201. mutex_lock(&wq->wq_lock);
  202. if (idxd_wq_refcount(wq) > 0 && wq_dedicated(wq)) {
  203. rc = -EBUSY;
  204. goto failed;
  205. }
  206. ctx->wq = wq;
  207. filp->private_data = ctx;
  208. ctx->pid = current->pid;
  209. if (device_user_pasid_enabled(idxd)) {
  210. sva = iommu_sva_bind_device(dev, current->mm);
  211. if (IS_ERR(sva)) {
  212. rc = PTR_ERR(sva);
  213. dev_err(dev, "pasid allocation failed: %d\n", rc);
  214. goto failed;
  215. }
  216. pasid = iommu_sva_get_pasid(sva);
  217. if (pasid == IOMMU_PASID_INVALID) {
  218. rc = -EINVAL;
  219. goto failed_get_pasid;
  220. }
  221. ctx->sva = sva;
  222. ctx->pasid = pasid;
  223. ctx->mm = current->mm;
  224. mutex_lock(&wq->uc_lock);
  225. rc = xa_insert(&wq->upasid_xa, pasid, ctx, GFP_KERNEL);
  226. mutex_unlock(&wq->uc_lock);
  227. if (rc < 0)
  228. dev_warn(dev, "PASID entry already exist in xarray.\n");
  229. if (wq_dedicated(wq)) {
  230. rc = idxd_wq_set_pasid(wq, pasid);
  231. if (rc < 0) {
  232. dev_err(dev, "wq set pasid failed: %d\n", rc);
  233. goto failed_set_pasid;
  234. }
  235. }
  236. }
  237. idxd_cdev = wq->idxd_cdev;
  238. mutex_lock(&ida_lock);
  239. ctx->id = ida_alloc(&file_ida, GFP_KERNEL);
  240. mutex_unlock(&ida_lock);
  241. if (ctx->id < 0) {
  242. dev_warn(dev, "ida alloc failure\n");
  243. goto failed_ida;
  244. }
  245. ctx->idxd_dev.type = IDXD_DEV_CDEV_FILE;
  246. fdev = user_ctx_dev(ctx);
  247. device_initialize(fdev);
  248. fdev->parent = cdev_dev(idxd_cdev);
  249. fdev->bus = &dsa_bus_type;
  250. fdev->type = &idxd_cdev_file_type;
  251. rc = dev_set_name(fdev, "file%d", ctx->id);
  252. if (rc < 0) {
  253. dev_warn(dev, "set name failure\n");
  254. goto failed_dev_name;
  255. }
  256. rc = device_add(fdev);
  257. if (rc < 0) {
  258. dev_warn(dev, "file device add failure\n");
  259. goto failed_dev_add;
  260. }
  261. idxd_wq_get(wq);
  262. mutex_unlock(&wq->wq_lock);
  263. return 0;
  264. failed_dev_add:
  265. failed_dev_name:
  266. put_device(fdev);
  267. failed_ida:
  268. failed_set_pasid:
  269. if (device_user_pasid_enabled(idxd))
  270. idxd_xa_pasid_remove(ctx);
  271. failed_get_pasid:
  272. if (device_user_pasid_enabled(idxd) && !IS_ERR_OR_NULL(sva))
  273. iommu_sva_unbind_device(sva);
  274. failed:
  275. mutex_unlock(&wq->wq_lock);
  276. kfree(ctx);
  277. return rc;
  278. }
  279. static void idxd_cdev_evl_drain_pasid(struct idxd_wq *wq, u32 pasid)
  280. {
  281. struct idxd_device *idxd = wq->idxd;
  282. struct idxd_evl *evl = idxd->evl;
  283. union evl_status_reg status;
  284. u16 h, t, size;
  285. int ent_size = evl_ent_size(idxd);
  286. struct __evl_entry *entry_head;
  287. if (!evl)
  288. return;
  289. mutex_lock(&evl->lock);
  290. status.bits = ioread64(idxd->reg_base + IDXD_EVLSTATUS_OFFSET);
  291. t = status.tail;
  292. h = status.head;
  293. size = evl->size;
  294. while (h != t) {
  295. entry_head = (struct __evl_entry *)(evl->log + (h * ent_size));
  296. if (entry_head->pasid == pasid && entry_head->wq_idx == wq->id)
  297. set_bit(h, evl->bmap);
  298. h = (h + 1) % size;
  299. }
  300. if (wq->wq)
  301. drain_workqueue(wq->wq);
  302. mutex_unlock(&evl->lock);
  303. }
  304. static int idxd_cdev_release(struct inode *node, struct file *filep)
  305. {
  306. struct idxd_user_context *ctx = filep->private_data;
  307. struct idxd_wq *wq = ctx->wq;
  308. struct idxd_device *idxd = wq->idxd;
  309. struct device *dev = &idxd->pdev->dev;
  310. dev_dbg(dev, "%s called\n", __func__);
  311. filep->private_data = NULL;
  312. device_unregister(user_ctx_dev(ctx));
  313. return 0;
  314. }
  315. static int check_vma(struct idxd_wq *wq, struct vm_area_struct *vma,
  316. const char *func)
  317. {
  318. struct device *dev = &wq->idxd->pdev->dev;
  319. if ((vma->vm_end - vma->vm_start) > PAGE_SIZE) {
  320. dev_info_ratelimited(dev,
  321. "%s: %s: mapping too large: %lu\n",
  322. current->comm, func,
  323. vma->vm_end - vma->vm_start);
  324. return -EINVAL;
  325. }
  326. return 0;
  327. }
  328. static int idxd_cdev_mmap(struct file *filp, struct vm_area_struct *vma)
  329. {
  330. struct idxd_user_context *ctx = filp->private_data;
  331. struct idxd_wq *wq = ctx->wq;
  332. struct idxd_device *idxd = wq->idxd;
  333. struct pci_dev *pdev = idxd->pdev;
  334. phys_addr_t base = pci_resource_start(pdev, IDXD_WQ_BAR);
  335. unsigned long pfn;
  336. int rc;
  337. dev_dbg(&pdev->dev, "%s called\n", __func__);
  338. /*
  339. * Due to an erratum in some of the devices supported by the driver,
  340. * direct user submission to the device can be unsafe.
  341. * (See the INTEL-SA-01084 security advisory)
  342. *
  343. * For the devices that exhibit this behavior, require that the user
  344. * has CAP_SYS_RAWIO capabilities.
  345. */
  346. if (!idxd->user_submission_safe && !capable(CAP_SYS_RAWIO))
  347. return -EPERM;
  348. if (current->mm != ctx->mm)
  349. return -EPERM;
  350. rc = check_vma(wq, vma, __func__);
  351. if (rc < 0)
  352. return rc;
  353. vm_flags_set(vma, VM_DONTCOPY);
  354. pfn = (base + idxd_get_wq_portal_full_offset(wq->id,
  355. IDXD_PORTAL_LIMITED)) >> PAGE_SHIFT;
  356. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  357. vma->vm_private_data = ctx;
  358. return io_remap_pfn_range(vma, vma->vm_start, pfn, PAGE_SIZE,
  359. vma->vm_page_prot);
  360. }
  361. static int idxd_submit_user_descriptor(struct idxd_user_context *ctx,
  362. struct dsa_hw_desc __user *udesc)
  363. {
  364. struct idxd_wq *wq = ctx->wq;
  365. struct idxd_dev *idxd_dev = &wq->idxd->idxd_dev;
  366. const uint64_t comp_addr_align = is_dsa_dev(idxd_dev) ? 0x20 : 0x40;
  367. void __iomem *portal = idxd_wq_portal_addr(wq);
  368. struct dsa_hw_desc descriptor __aligned(64);
  369. int rc;
  370. rc = copy_from_user(&descriptor, udesc, sizeof(descriptor));
  371. if (rc)
  372. return -EFAULT;
  373. /*
  374. * DSA devices are capable of indirect ("batch") command submission.
  375. * On devices where direct user submissions are not safe, we cannot
  376. * allow this since there is no good way for us to verify these
  377. * indirect commands.
  378. */
  379. if (is_dsa_dev(idxd_dev) && descriptor.opcode == DSA_OPCODE_BATCH &&
  380. !wq->idxd->user_submission_safe)
  381. return -EINVAL;
  382. /*
  383. * As per the programming specification, the completion address must be
  384. * aligned to 32 or 64 bytes. If this is violated the hardware
  385. * engine can get very confused (security issue).
  386. */
  387. if (!IS_ALIGNED(descriptor.completion_addr, comp_addr_align))
  388. return -EINVAL;
  389. if (wq_dedicated(wq))
  390. iosubmit_cmds512(portal, &descriptor, 1);
  391. else {
  392. descriptor.priv = 0;
  393. descriptor.pasid = ctx->pasid;
  394. rc = idxd_enqcmds(wq, portal, &descriptor);
  395. if (rc < 0)
  396. return rc;
  397. }
  398. return 0;
  399. }
  400. static ssize_t idxd_cdev_write(struct file *filp, const char __user *buf, size_t len,
  401. loff_t *unused)
  402. {
  403. struct dsa_hw_desc __user *udesc = (struct dsa_hw_desc __user *)buf;
  404. struct idxd_user_context *ctx = filp->private_data;
  405. ssize_t written = 0;
  406. int i;
  407. if (current->mm != ctx->mm)
  408. return -EPERM;
  409. for (i = 0; i < len/sizeof(struct dsa_hw_desc); i++) {
  410. int rc = idxd_submit_user_descriptor(ctx, udesc + i);
  411. if (rc)
  412. return written ? written : rc;
  413. written += sizeof(struct dsa_hw_desc);
  414. }
  415. return written;
  416. }
  417. static __poll_t idxd_cdev_poll(struct file *filp,
  418. struct poll_table_struct *wait)
  419. {
  420. struct idxd_user_context *ctx = filp->private_data;
  421. struct idxd_wq *wq = ctx->wq;
  422. struct idxd_device *idxd = wq->idxd;
  423. __poll_t out = 0;
  424. if (current->mm != ctx->mm)
  425. return POLLNVAL;
  426. poll_wait(filp, &wq->err_queue, wait);
  427. spin_lock(&idxd->dev_lock);
  428. if (idxd->sw_err.valid)
  429. out = EPOLLIN | EPOLLRDNORM;
  430. spin_unlock(&idxd->dev_lock);
  431. return out;
  432. }
  433. static const struct file_operations idxd_cdev_fops = {
  434. .owner = THIS_MODULE,
  435. .open = idxd_cdev_open,
  436. .release = idxd_cdev_release,
  437. .mmap = idxd_cdev_mmap,
  438. .write = idxd_cdev_write,
  439. .poll = idxd_cdev_poll,
  440. };
  441. int idxd_cdev_get_major(struct idxd_device *idxd)
  442. {
  443. return MAJOR(ictx[idxd->data->type].devt);
  444. }
  445. int idxd_wq_add_cdev(struct idxd_wq *wq)
  446. {
  447. struct idxd_device *idxd = wq->idxd;
  448. struct idxd_cdev *idxd_cdev;
  449. struct cdev *cdev;
  450. struct device *dev;
  451. struct idxd_cdev_context *cdev_ctx;
  452. int rc, minor;
  453. idxd_cdev = kzalloc(sizeof(*idxd_cdev), GFP_KERNEL);
  454. if (!idxd_cdev)
  455. return -ENOMEM;
  456. idxd_cdev->idxd_dev.type = IDXD_DEV_CDEV;
  457. idxd_cdev->wq = wq;
  458. cdev = &idxd_cdev->cdev;
  459. dev = cdev_dev(idxd_cdev);
  460. cdev_ctx = &ictx[wq->idxd->data->type];
  461. minor = ida_alloc_max(&cdev_ctx->minor_ida, MINORMASK, GFP_KERNEL);
  462. if (minor < 0) {
  463. kfree(idxd_cdev);
  464. return minor;
  465. }
  466. idxd_cdev->minor = minor;
  467. device_initialize(dev);
  468. dev->parent = wq_confdev(wq);
  469. dev->bus = &dsa_bus_type;
  470. dev->type = &idxd_cdev_device_type;
  471. dev->devt = MKDEV(MAJOR(cdev_ctx->devt), minor);
  472. rc = dev_set_name(dev, "%s/wq%u.%u", idxd->data->name_prefix, idxd->id, wq->id);
  473. if (rc < 0)
  474. goto err;
  475. wq->idxd_cdev = idxd_cdev;
  476. cdev_init(cdev, &idxd_cdev_fops);
  477. rc = cdev_device_add(cdev, dev);
  478. if (rc) {
  479. dev_dbg(&wq->idxd->pdev->dev, "cdev_add failed: %d\n", rc);
  480. goto err;
  481. }
  482. return 0;
  483. err:
  484. put_device(dev);
  485. wq->idxd_cdev = NULL;
  486. return rc;
  487. }
  488. void idxd_wq_del_cdev(struct idxd_wq *wq)
  489. {
  490. struct idxd_cdev *idxd_cdev;
  491. idxd_cdev = wq->idxd_cdev;
  492. wq->idxd_cdev = NULL;
  493. cdev_device_del(&idxd_cdev->cdev, cdev_dev(idxd_cdev));
  494. put_device(cdev_dev(idxd_cdev));
  495. }
  496. static int idxd_user_drv_probe(struct idxd_dev *idxd_dev)
  497. {
  498. struct device *dev = &idxd_dev->conf_dev;
  499. struct idxd_wq *wq = idxd_dev_to_wq(idxd_dev);
  500. struct idxd_device *idxd = wq->idxd;
  501. int rc;
  502. if (idxd->state != IDXD_DEV_ENABLED)
  503. return -ENXIO;
  504. mutex_lock(&wq->wq_lock);
  505. if (!idxd_wq_driver_name_match(wq, dev)) {
  506. idxd->cmd_status = IDXD_SCMD_WQ_NO_DRV_NAME;
  507. rc = -ENODEV;
  508. goto wq_err;
  509. }
  510. /*
  511. * User type WQ is enabled only when SVA is enabled for two reasons:
  512. * - If no IOMMU or IOMMU Passthrough without SVA, userspace
  513. * can directly access physical address through the WQ.
  514. * - The IDXD cdev driver does not provide any ways to pin
  515. * user pages and translate the address from user VA to IOVA or
  516. * PA without IOMMU SVA. Therefore the application has no way
  517. * to instruct the device to perform DMA function. This makes
  518. * the cdev not usable for normal application usage.
  519. */
  520. if (!device_user_pasid_enabled(idxd)) {
  521. idxd->cmd_status = IDXD_SCMD_WQ_USER_NO_IOMMU;
  522. dev_dbg(&idxd->pdev->dev,
  523. "User type WQ cannot be enabled without SVA.\n");
  524. rc = -EOPNOTSUPP;
  525. goto wq_err;
  526. }
  527. wq->wq = create_workqueue(dev_name(wq_confdev(wq)));
  528. if (!wq->wq) {
  529. rc = -ENOMEM;
  530. goto wq_err;
  531. }
  532. wq->type = IDXD_WQT_USER;
  533. rc = idxd_drv_enable_wq(wq);
  534. if (rc < 0)
  535. goto err;
  536. rc = idxd_wq_add_cdev(wq);
  537. if (rc < 0) {
  538. idxd->cmd_status = IDXD_SCMD_CDEV_ERR;
  539. goto err_cdev;
  540. }
  541. idxd->cmd_status = 0;
  542. mutex_unlock(&wq->wq_lock);
  543. return 0;
  544. err_cdev:
  545. idxd_drv_disable_wq(wq);
  546. err:
  547. destroy_workqueue(wq->wq);
  548. wq->type = IDXD_WQT_NONE;
  549. wq_err:
  550. mutex_unlock(&wq->wq_lock);
  551. return rc;
  552. }
  553. static void idxd_user_drv_remove(struct idxd_dev *idxd_dev)
  554. {
  555. struct idxd_wq *wq = idxd_dev_to_wq(idxd_dev);
  556. mutex_lock(&wq->wq_lock);
  557. idxd_wq_del_cdev(wq);
  558. idxd_drv_disable_wq(wq);
  559. wq->type = IDXD_WQT_NONE;
  560. destroy_workqueue(wq->wq);
  561. wq->wq = NULL;
  562. mutex_unlock(&wq->wq_lock);
  563. }
  564. static enum idxd_dev_type dev_types[] = {
  565. IDXD_DEV_WQ,
  566. IDXD_DEV_NONE,
  567. };
  568. struct idxd_device_driver idxd_user_drv = {
  569. .probe = idxd_user_drv_probe,
  570. .remove = idxd_user_drv_remove,
  571. .name = "user",
  572. .type = dev_types,
  573. };
  574. EXPORT_SYMBOL_GPL(idxd_user_drv);
  575. int idxd_cdev_register(void)
  576. {
  577. int rc, i;
  578. for (i = 0; i < IDXD_TYPE_MAX; i++) {
  579. ida_init(&ictx[i].minor_ida);
  580. rc = alloc_chrdev_region(&ictx[i].devt, 0, MINORMASK,
  581. ictx[i].name);
  582. if (rc)
  583. goto err_free_chrdev_region;
  584. }
  585. return 0;
  586. err_free_chrdev_region:
  587. for (i--; i >= 0; i--)
  588. unregister_chrdev_region(ictx[i].devt, MINORMASK);
  589. return rc;
  590. }
  591. void idxd_cdev_remove(void)
  592. {
  593. int i;
  594. for (i = 0; i < IDXD_TYPE_MAX; i++) {
  595. unregister_chrdev_region(ictx[i].devt, MINORMASK);
  596. ida_destroy(&ictx[i].minor_ida);
  597. }
  598. }
  599. /**
  600. * idxd_copy_cr - copy completion record to user address space found by wq and
  601. * PASID
  602. * @wq: work queue
  603. * @pasid: PASID
  604. * @addr: user fault address to write
  605. * @cr: completion record
  606. * @len: number of bytes to copy
  607. *
  608. * This is called by a work that handles completion record fault.
  609. *
  610. * Return: number of bytes copied.
  611. */
  612. int idxd_copy_cr(struct idxd_wq *wq, ioasid_t pasid, unsigned long addr,
  613. void *cr, int len)
  614. {
  615. struct device *dev = &wq->idxd->pdev->dev;
  616. int left = len, status_size = 1;
  617. struct idxd_user_context *ctx;
  618. struct mm_struct *mm;
  619. mutex_lock(&wq->uc_lock);
  620. ctx = xa_load(&wq->upasid_xa, pasid);
  621. if (!ctx) {
  622. dev_warn(dev, "No user context\n");
  623. goto out;
  624. }
  625. mm = ctx->mm;
  626. /*
  627. * The completion record fault handling work is running in kernel
  628. * thread context. It temporarily switches to the mm to copy cr
  629. * to addr in the mm.
  630. */
  631. kthread_use_mm(mm);
  632. left = copy_to_user((void __user *)addr + status_size, cr + status_size,
  633. len - status_size);
  634. /*
  635. * Copy status only after the rest of completion record is copied
  636. * successfully so that the user gets the complete completion record
  637. * when a non-zero status is polled.
  638. */
  639. if (!left) {
  640. u8 status;
  641. /*
  642. * Ensure that the completion record's status field is written
  643. * after the rest of the completion record has been written.
  644. * This ensures that the user receives the correct completion
  645. * record information once polling for a non-zero status.
  646. */
  647. wmb();
  648. status = *(u8 *)cr;
  649. if (put_user(status, (u8 __user *)addr))
  650. left += status_size;
  651. } else {
  652. left += status_size;
  653. }
  654. kthread_unuse_mm(mm);
  655. out:
  656. mutex_unlock(&wq->uc_lock);
  657. return len - left;
  658. }