kfd_debug.c 29 KB

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  1. /*
  2. * Copyright 2023 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #include "kfd_debug.h"
  23. #include "kfd_device_queue_manager.h"
  24. #include "kfd_topology.h"
  25. #include <linux/file.h>
  26. #include <uapi/linux/kfd_ioctl.h>
  27. #include <uapi/linux/kfd_sysfs.h>
  28. #define MAX_WATCH_ADDRESSES 4
  29. int kfd_dbg_ev_query_debug_event(struct kfd_process *process,
  30. unsigned int *queue_id,
  31. unsigned int *gpu_id,
  32. uint64_t exception_clear_mask,
  33. uint64_t *event_status)
  34. {
  35. struct process_queue_manager *pqm;
  36. struct process_queue_node *pqn;
  37. int i;
  38. if (!(process && process->debug_trap_enabled))
  39. return -ENODATA;
  40. mutex_lock(&process->event_mutex);
  41. *event_status = 0;
  42. *queue_id = 0;
  43. *gpu_id = 0;
  44. /* find and report queue events */
  45. pqm = &process->pqm;
  46. list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
  47. uint64_t tmp = process->exception_enable_mask;
  48. if (!pqn->q)
  49. continue;
  50. tmp &= pqn->q->properties.exception_status;
  51. if (!tmp)
  52. continue;
  53. *event_status = pqn->q->properties.exception_status;
  54. *queue_id = pqn->q->properties.queue_id;
  55. *gpu_id = pqn->q->device->id;
  56. pqn->q->properties.exception_status &= ~exception_clear_mask;
  57. goto out;
  58. }
  59. /* find and report device events */
  60. for (i = 0; i < process->n_pdds; i++) {
  61. struct kfd_process_device *pdd = process->pdds[i];
  62. uint64_t tmp = process->exception_enable_mask
  63. & pdd->exception_status;
  64. if (!tmp)
  65. continue;
  66. *event_status = pdd->exception_status;
  67. *gpu_id = pdd->dev->id;
  68. pdd->exception_status &= ~exception_clear_mask;
  69. goto out;
  70. }
  71. /* report process events */
  72. if (process->exception_enable_mask & process->exception_status) {
  73. *event_status = process->exception_status;
  74. process->exception_status &= ~exception_clear_mask;
  75. }
  76. out:
  77. mutex_unlock(&process->event_mutex);
  78. return *event_status ? 0 : -EAGAIN;
  79. }
  80. void debug_event_write_work_handler(struct work_struct *work)
  81. {
  82. struct kfd_process *process;
  83. static const char write_data = '.';
  84. loff_t pos = 0;
  85. process = container_of(work,
  86. struct kfd_process,
  87. debug_event_workarea);
  88. if (process->debug_trap_enabled && process->dbg_ev_file)
  89. kernel_write(process->dbg_ev_file, &write_data, 1, &pos);
  90. }
  91. /* update process/device/queue exception status, write to descriptor
  92. * only if exception_status is enabled.
  93. */
  94. bool kfd_dbg_ev_raise(uint64_t event_mask,
  95. struct kfd_process *process, struct kfd_node *dev,
  96. unsigned int source_id, bool use_worker,
  97. void *exception_data, size_t exception_data_size)
  98. {
  99. struct process_queue_manager *pqm;
  100. struct process_queue_node *pqn;
  101. int i;
  102. static const char write_data = '.';
  103. loff_t pos = 0;
  104. bool is_subscribed = true;
  105. if (!(process && process->debug_trap_enabled))
  106. return false;
  107. mutex_lock(&process->event_mutex);
  108. if (event_mask & KFD_EC_MASK_DEVICE) {
  109. for (i = 0; i < process->n_pdds; i++) {
  110. struct kfd_process_device *pdd = process->pdds[i];
  111. if (pdd->dev != dev)
  112. continue;
  113. pdd->exception_status |= event_mask & KFD_EC_MASK_DEVICE;
  114. if (event_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
  115. if (!pdd->vm_fault_exc_data) {
  116. pdd->vm_fault_exc_data = kmemdup(
  117. exception_data,
  118. exception_data_size,
  119. GFP_KERNEL);
  120. if (!pdd->vm_fault_exc_data)
  121. pr_debug("Failed to allocate exception data memory");
  122. } else {
  123. pr_debug("Debugger exception data not saved\n");
  124. print_hex_dump_bytes("exception data: ",
  125. DUMP_PREFIX_OFFSET,
  126. exception_data,
  127. exception_data_size);
  128. }
  129. }
  130. break;
  131. }
  132. } else if (event_mask & KFD_EC_MASK_PROCESS) {
  133. process->exception_status |= event_mask & KFD_EC_MASK_PROCESS;
  134. } else {
  135. pqm = &process->pqm;
  136. list_for_each_entry(pqn, &pqm->queues,
  137. process_queue_list) {
  138. int target_id;
  139. if (!pqn->q)
  140. continue;
  141. target_id = event_mask & KFD_EC_MASK(EC_QUEUE_NEW) ?
  142. pqn->q->properties.queue_id :
  143. pqn->q->doorbell_id;
  144. if (pqn->q->device != dev || target_id != source_id)
  145. continue;
  146. pqn->q->properties.exception_status |= event_mask;
  147. break;
  148. }
  149. }
  150. if (process->exception_enable_mask & event_mask) {
  151. if (use_worker)
  152. schedule_work(&process->debug_event_workarea);
  153. else
  154. kernel_write(process->dbg_ev_file,
  155. &write_data,
  156. 1,
  157. &pos);
  158. } else {
  159. is_subscribed = false;
  160. }
  161. mutex_unlock(&process->event_mutex);
  162. return is_subscribed;
  163. }
  164. /* set pending event queue entry from ring entry */
  165. bool kfd_set_dbg_ev_from_interrupt(struct kfd_node *dev,
  166. unsigned int pasid,
  167. uint32_t doorbell_id,
  168. uint64_t trap_mask,
  169. void *exception_data,
  170. size_t exception_data_size)
  171. {
  172. struct kfd_process *p;
  173. bool signaled_to_debugger_or_runtime = false;
  174. p = kfd_lookup_process_by_pasid(pasid);
  175. if (!p)
  176. return false;
  177. if (!kfd_dbg_ev_raise(trap_mask, p, dev, doorbell_id, true,
  178. exception_data, exception_data_size)) {
  179. struct process_queue_manager *pqm;
  180. struct process_queue_node *pqn;
  181. if (!!(trap_mask & KFD_EC_MASK_QUEUE) &&
  182. p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED) {
  183. mutex_lock(&p->mutex);
  184. pqm = &p->pqm;
  185. list_for_each_entry(pqn, &pqm->queues,
  186. process_queue_list) {
  187. if (!(pqn->q && pqn->q->device == dev &&
  188. pqn->q->doorbell_id == doorbell_id))
  189. continue;
  190. kfd_send_exception_to_runtime(p, pqn->q->properties.queue_id,
  191. trap_mask);
  192. signaled_to_debugger_or_runtime = true;
  193. break;
  194. }
  195. mutex_unlock(&p->mutex);
  196. } else if (trap_mask & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
  197. kfd_dqm_evict_pasid(dev->dqm, p->pasid);
  198. kfd_signal_vm_fault_event(dev, p->pasid, NULL,
  199. exception_data);
  200. signaled_to_debugger_or_runtime = true;
  201. }
  202. } else {
  203. signaled_to_debugger_or_runtime = true;
  204. }
  205. kfd_unref_process(p);
  206. return signaled_to_debugger_or_runtime;
  207. }
  208. int kfd_dbg_send_exception_to_runtime(struct kfd_process *p,
  209. unsigned int dev_id,
  210. unsigned int queue_id,
  211. uint64_t error_reason)
  212. {
  213. if (error_reason & KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION)) {
  214. struct kfd_process_device *pdd = NULL;
  215. struct kfd_hsa_memory_exception_data *data;
  216. int i;
  217. for (i = 0; i < p->n_pdds; i++) {
  218. if (p->pdds[i]->dev->id == dev_id) {
  219. pdd = p->pdds[i];
  220. break;
  221. }
  222. }
  223. if (!pdd)
  224. return -ENODEV;
  225. data = (struct kfd_hsa_memory_exception_data *)
  226. pdd->vm_fault_exc_data;
  227. kfd_dqm_evict_pasid(pdd->dev->dqm, p->pasid);
  228. kfd_signal_vm_fault_event(pdd->dev, p->pasid, NULL, data);
  229. error_reason &= ~KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION);
  230. }
  231. if (error_reason & (KFD_EC_MASK(EC_PROCESS_RUNTIME))) {
  232. /*
  233. * block should only happen after the debugger receives runtime
  234. * enable notice.
  235. */
  236. up(&p->runtime_enable_sema);
  237. error_reason &= ~KFD_EC_MASK(EC_PROCESS_RUNTIME);
  238. }
  239. if (error_reason)
  240. return kfd_send_exception_to_runtime(p, queue_id, error_reason);
  241. return 0;
  242. }
  243. static int kfd_dbg_set_queue_workaround(struct queue *q, bool enable)
  244. {
  245. struct mqd_update_info minfo = {0};
  246. int err;
  247. if (!q)
  248. return 0;
  249. if (!kfd_dbg_has_cwsr_workaround(q->device))
  250. return 0;
  251. if (enable && q->properties.is_user_cu_masked)
  252. return -EBUSY;
  253. minfo.update_flag = enable ? UPDATE_FLAG_DBG_WA_ENABLE : UPDATE_FLAG_DBG_WA_DISABLE;
  254. q->properties.is_dbg_wa = enable;
  255. err = q->device->dqm->ops.update_queue(q->device->dqm, q, &minfo);
  256. if (err)
  257. q->properties.is_dbg_wa = false;
  258. return err;
  259. }
  260. static int kfd_dbg_set_workaround(struct kfd_process *target, bool enable)
  261. {
  262. struct process_queue_manager *pqm = &target->pqm;
  263. struct process_queue_node *pqn;
  264. int r = 0;
  265. list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
  266. r = kfd_dbg_set_queue_workaround(pqn->q, enable);
  267. if (enable && r)
  268. goto unwind;
  269. }
  270. return 0;
  271. unwind:
  272. list_for_each_entry(pqn, &pqm->queues, process_queue_list)
  273. kfd_dbg_set_queue_workaround(pqn->q, false);
  274. if (enable)
  275. target->runtime_info.runtime_state = r == -EBUSY ?
  276. DEBUG_RUNTIME_STATE_ENABLED_BUSY :
  277. DEBUG_RUNTIME_STATE_ENABLED_ERROR;
  278. return r;
  279. }
  280. int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en)
  281. {
  282. uint32_t spi_dbg_cntl = pdd->spi_dbg_override | pdd->spi_dbg_launch_mode;
  283. uint32_t flags = pdd->process->dbg_flags;
  284. struct amdgpu_device *adev = pdd->dev->adev;
  285. int r;
  286. if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
  287. return 0;
  288. if (!pdd->proc_ctx_cpu_ptr) {
  289. r = amdgpu_amdkfd_alloc_gtt_mem(adev,
  290. AMDGPU_MES_PROC_CTX_SIZE,
  291. &pdd->proc_ctx_bo,
  292. &pdd->proc_ctx_gpu_addr,
  293. &pdd->proc_ctx_cpu_ptr,
  294. false);
  295. if (r) {
  296. dev_err(adev->dev,
  297. "failed to allocate process context bo\n");
  298. return r;
  299. }
  300. memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
  301. }
  302. return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
  303. pdd->watch_points, flags, sq_trap_en);
  304. }
  305. #define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1
  306. static int kfd_dbg_get_dev_watch_id(struct kfd_process_device *pdd, int *watch_id)
  307. {
  308. int i;
  309. *watch_id = KFD_DEBUGGER_INVALID_WATCH_POINT_ID;
  310. spin_lock(&pdd->dev->watch_points_lock);
  311. for (i = 0; i < MAX_WATCH_ADDRESSES; i++) {
  312. /* device watchpoint in use so skip */
  313. if ((pdd->dev->alloc_watch_ids >> i) & 0x1)
  314. continue;
  315. pdd->alloc_watch_ids |= 0x1 << i;
  316. pdd->dev->alloc_watch_ids |= 0x1 << i;
  317. *watch_id = i;
  318. spin_unlock(&pdd->dev->watch_points_lock);
  319. return 0;
  320. }
  321. spin_unlock(&pdd->dev->watch_points_lock);
  322. return -ENOMEM;
  323. }
  324. static void kfd_dbg_clear_dev_watch_id(struct kfd_process_device *pdd, int watch_id)
  325. {
  326. spin_lock(&pdd->dev->watch_points_lock);
  327. /* process owns device watch point so safe to clear */
  328. if ((pdd->alloc_watch_ids >> watch_id) & 0x1) {
  329. pdd->alloc_watch_ids &= ~(0x1 << watch_id);
  330. pdd->dev->alloc_watch_ids &= ~(0x1 << watch_id);
  331. }
  332. spin_unlock(&pdd->dev->watch_points_lock);
  333. }
  334. static bool kfd_dbg_owns_dev_watch_id(struct kfd_process_device *pdd, int watch_id)
  335. {
  336. bool owns_watch_id = false;
  337. spin_lock(&pdd->dev->watch_points_lock);
  338. owns_watch_id = watch_id < MAX_WATCH_ADDRESSES &&
  339. ((pdd->alloc_watch_ids >> watch_id) & 0x1);
  340. spin_unlock(&pdd->dev->watch_points_lock);
  341. return owns_watch_id;
  342. }
  343. int kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device *pdd,
  344. uint32_t watch_id)
  345. {
  346. int r;
  347. if (!kfd_dbg_owns_dev_watch_id(pdd, watch_id))
  348. return -EINVAL;
  349. if (!pdd->dev->kfd->shared_resources.enable_mes) {
  350. r = debug_lock_and_unmap(pdd->dev->dqm);
  351. if (r)
  352. return r;
  353. }
  354. amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
  355. pdd->watch_points[watch_id] = pdd->dev->kfd2kgd->clear_address_watch(
  356. pdd->dev->adev,
  357. watch_id);
  358. amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
  359. if (!pdd->dev->kfd->shared_resources.enable_mes)
  360. r = debug_map_and_unlock(pdd->dev->dqm);
  361. else
  362. r = kfd_dbg_set_mes_debug_mode(pdd, true);
  363. kfd_dbg_clear_dev_watch_id(pdd, watch_id);
  364. return r;
  365. }
  366. int kfd_dbg_trap_set_dev_address_watch(struct kfd_process_device *pdd,
  367. uint64_t watch_address,
  368. uint32_t watch_address_mask,
  369. uint32_t *watch_id,
  370. uint32_t watch_mode)
  371. {
  372. int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id);
  373. uint32_t xcc_mask = pdd->dev->xcc_mask;
  374. if (r)
  375. return r;
  376. if (!pdd->dev->kfd->shared_resources.enable_mes) {
  377. r = debug_lock_and_unmap(pdd->dev->dqm);
  378. if (r) {
  379. kfd_dbg_clear_dev_watch_id(pdd, *watch_id);
  380. return r;
  381. }
  382. }
  383. amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
  384. for_each_inst(xcc_id, xcc_mask)
  385. pdd->watch_points[*watch_id] = pdd->dev->kfd2kgd->set_address_watch(
  386. pdd->dev->adev,
  387. watch_address,
  388. watch_address_mask,
  389. *watch_id,
  390. watch_mode,
  391. pdd->dev->vm_info.last_vmid_kfd,
  392. xcc_id);
  393. amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
  394. if (!pdd->dev->kfd->shared_resources.enable_mes)
  395. r = debug_map_and_unlock(pdd->dev->dqm);
  396. else
  397. r = kfd_dbg_set_mes_debug_mode(pdd, true);
  398. /* HWS is broken so no point in HW rollback but release the watchpoint anyways */
  399. if (r)
  400. kfd_dbg_clear_dev_watch_id(pdd, *watch_id);
  401. return 0;
  402. }
  403. static void kfd_dbg_clear_process_address_watch(struct kfd_process *target)
  404. {
  405. int i, j;
  406. for (i = 0; i < target->n_pdds; i++)
  407. for (j = 0; j < MAX_WATCH_ADDRESSES; j++)
  408. kfd_dbg_trap_clear_dev_address_watch(target->pdds[i], j);
  409. }
  410. int kfd_dbg_trap_set_flags(struct kfd_process *target, uint32_t *flags)
  411. {
  412. uint32_t prev_flags = target->dbg_flags;
  413. int i, r = 0, rewind_count = 0;
  414. for (i = 0; i < target->n_pdds; i++) {
  415. struct kfd_topology_device *topo_dev =
  416. kfd_topology_device_by_id(target->pdds[i]->dev->id);
  417. uint32_t caps = topo_dev->node_props.capability;
  418. if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED) &&
  419. (*flags & KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP)) {
  420. *flags = prev_flags;
  421. return -EACCES;
  422. }
  423. if (!(caps & HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED) &&
  424. (*flags & KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP)) {
  425. *flags = prev_flags;
  426. return -EACCES;
  427. }
  428. }
  429. target->dbg_flags = *flags;
  430. *flags = prev_flags;
  431. for (i = 0; i < target->n_pdds; i++) {
  432. struct kfd_process_device *pdd = target->pdds[i];
  433. if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
  434. continue;
  435. if (!pdd->dev->kfd->shared_resources.enable_mes)
  436. r = debug_refresh_runlist(pdd->dev->dqm);
  437. else
  438. r = kfd_dbg_set_mes_debug_mode(pdd, true);
  439. if (r) {
  440. target->dbg_flags = prev_flags;
  441. break;
  442. }
  443. rewind_count++;
  444. }
  445. /* Rewind flags */
  446. if (r) {
  447. target->dbg_flags = prev_flags;
  448. for (i = 0; i < rewind_count; i++) {
  449. struct kfd_process_device *pdd = target->pdds[i];
  450. if (!kfd_dbg_is_per_vmid_supported(pdd->dev))
  451. continue;
  452. if (!pdd->dev->kfd->shared_resources.enable_mes)
  453. debug_refresh_runlist(pdd->dev->dqm);
  454. else
  455. kfd_dbg_set_mes_debug_mode(pdd, true);
  456. }
  457. }
  458. return r;
  459. }
  460. /* kfd_dbg_trap_deactivate:
  461. * target: target process
  462. * unwind: If this is unwinding a failed kfd_dbg_trap_enable()
  463. * unwind_count:
  464. * If unwind == true, how far down the pdd list we need
  465. * to unwind
  466. * else: ignored
  467. */
  468. void kfd_dbg_trap_deactivate(struct kfd_process *target, bool unwind, int unwind_count)
  469. {
  470. int i;
  471. if (!unwind) {
  472. uint32_t flags = 0;
  473. int resume_count = resume_queues(target, 0, NULL);
  474. if (resume_count)
  475. pr_debug("Resumed %d queues\n", resume_count);
  476. cancel_work_sync(&target->debug_event_workarea);
  477. kfd_dbg_clear_process_address_watch(target);
  478. kfd_dbg_trap_set_wave_launch_mode(target, 0);
  479. kfd_dbg_trap_set_flags(target, &flags);
  480. }
  481. for (i = 0; i < target->n_pdds; i++) {
  482. struct kfd_process_device *pdd = target->pdds[i];
  483. /* If this is an unwind, and we have unwound the required
  484. * enable calls on the pdd list, we need to stop now
  485. * otherwise we may mess up another debugger session.
  486. */
  487. if (unwind && i == unwind_count)
  488. break;
  489. kfd_process_set_trap_debug_flag(&pdd->qpd, false);
  490. /* GFX off is already disabled by debug activate if not RLC restore supported. */
  491. if (kfd_dbg_is_rlc_restore_supported(pdd->dev))
  492. amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
  493. pdd->spi_dbg_override =
  494. pdd->dev->kfd2kgd->disable_debug_trap(
  495. pdd->dev->adev,
  496. target->runtime_info.ttmp_setup,
  497. pdd->dev->vm_info.last_vmid_kfd);
  498. amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
  499. if (!kfd_dbg_is_per_vmid_supported(pdd->dev) &&
  500. release_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd))
  501. pr_err("Failed to release debug vmid on [%i]\n", pdd->dev->id);
  502. if (!pdd->dev->kfd->shared_resources.enable_mes)
  503. debug_refresh_runlist(pdd->dev->dqm);
  504. else
  505. kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev));
  506. }
  507. kfd_dbg_set_workaround(target, false);
  508. }
  509. static void kfd_dbg_clean_exception_status(struct kfd_process *target)
  510. {
  511. struct process_queue_manager *pqm;
  512. struct process_queue_node *pqn;
  513. int i;
  514. for (i = 0; i < target->n_pdds; i++) {
  515. struct kfd_process_device *pdd = target->pdds[i];
  516. kfd_process_drain_interrupts(pdd);
  517. pdd->exception_status = 0;
  518. }
  519. pqm = &target->pqm;
  520. list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
  521. if (!pqn->q)
  522. continue;
  523. pqn->q->properties.exception_status = 0;
  524. }
  525. target->exception_status = 0;
  526. }
  527. int kfd_dbg_trap_disable(struct kfd_process *target)
  528. {
  529. if (!target->debug_trap_enabled)
  530. return 0;
  531. /*
  532. * Defer deactivation to runtime if runtime not enabled otherwise reset
  533. * attached running target runtime state to enable for re-attach.
  534. */
  535. if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED)
  536. kfd_dbg_trap_deactivate(target, false, 0);
  537. else if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED)
  538. target->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED;
  539. cancel_work_sync(&target->debug_event_workarea);
  540. fput(target->dbg_ev_file);
  541. target->dbg_ev_file = NULL;
  542. if (target->debugger_process) {
  543. atomic_dec(&target->debugger_process->debugged_process_count);
  544. target->debugger_process = NULL;
  545. }
  546. target->debug_trap_enabled = false;
  547. kfd_dbg_clean_exception_status(target);
  548. kfd_unref_process(target);
  549. return 0;
  550. }
  551. int kfd_dbg_trap_activate(struct kfd_process *target)
  552. {
  553. int i, r = 0;
  554. r = kfd_dbg_set_workaround(target, true);
  555. if (r)
  556. return r;
  557. for (i = 0; i < target->n_pdds; i++) {
  558. struct kfd_process_device *pdd = target->pdds[i];
  559. if (!kfd_dbg_is_per_vmid_supported(pdd->dev)) {
  560. r = reserve_debug_trap_vmid(pdd->dev->dqm, &pdd->qpd);
  561. if (r) {
  562. target->runtime_info.runtime_state = (r == -EBUSY) ?
  563. DEBUG_RUNTIME_STATE_ENABLED_BUSY :
  564. DEBUG_RUNTIME_STATE_ENABLED_ERROR;
  565. goto unwind_err;
  566. }
  567. }
  568. /* Disable GFX OFF to prevent garbage read/writes to debug registers.
  569. * If RLC restore of debug registers is not supported and runtime enable
  570. * hasn't done so already on ttmp setup request, restore the trap config registers.
  571. *
  572. * If RLC restore of debug registers is not supported, keep gfx off disabled for
  573. * the debug session.
  574. */
  575. amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
  576. if (!(kfd_dbg_is_rlc_restore_supported(pdd->dev) ||
  577. target->runtime_info.ttmp_setup))
  578. pdd->dev->kfd2kgd->enable_debug_trap(pdd->dev->adev, true,
  579. pdd->dev->vm_info.last_vmid_kfd);
  580. pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap(
  581. pdd->dev->adev,
  582. false,
  583. pdd->dev->vm_info.last_vmid_kfd);
  584. if (kfd_dbg_is_rlc_restore_supported(pdd->dev))
  585. amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
  586. /*
  587. * Setting the debug flag in the trap handler requires that the TMA has been
  588. * allocated, which occurs during CWSR initialization.
  589. * In the event that CWSR has not been initialized at this point, setting the
  590. * flag will be called again during CWSR initialization if the target process
  591. * is still debug enabled.
  592. */
  593. kfd_process_set_trap_debug_flag(&pdd->qpd, true);
  594. if (!pdd->dev->kfd->shared_resources.enable_mes)
  595. r = debug_refresh_runlist(pdd->dev->dqm);
  596. else
  597. r = kfd_dbg_set_mes_debug_mode(pdd, true);
  598. if (r) {
  599. target->runtime_info.runtime_state =
  600. DEBUG_RUNTIME_STATE_ENABLED_ERROR;
  601. goto unwind_err;
  602. }
  603. }
  604. return 0;
  605. unwind_err:
  606. /* Enabling debug failed, we need to disable on
  607. * all GPUs so the enable is all or nothing.
  608. */
  609. kfd_dbg_trap_deactivate(target, true, i);
  610. return r;
  611. }
  612. int kfd_dbg_trap_enable(struct kfd_process *target, uint32_t fd,
  613. void __user *runtime_info, uint32_t *runtime_size)
  614. {
  615. struct file *f;
  616. uint32_t copy_size;
  617. int i, r = 0;
  618. if (target->debug_trap_enabled)
  619. return -EALREADY;
  620. /* Enable pre-checks */
  621. for (i = 0; i < target->n_pdds; i++) {
  622. struct kfd_process_device *pdd = target->pdds[i];
  623. if (!KFD_IS_SOC15(pdd->dev))
  624. return -ENODEV;
  625. if (pdd->qpd.num_gws && (!kfd_dbg_has_gws_support(pdd->dev) ||
  626. kfd_dbg_has_cwsr_workaround(pdd->dev)))
  627. return -EBUSY;
  628. }
  629. copy_size = min((size_t)(*runtime_size), sizeof(target->runtime_info));
  630. f = fget(fd);
  631. if (!f) {
  632. pr_err("Failed to get file for (%i)\n", fd);
  633. return -EBADF;
  634. }
  635. target->dbg_ev_file = f;
  636. /* defer activation to runtime if not runtime enabled */
  637. if (target->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED)
  638. kfd_dbg_trap_activate(target);
  639. /* We already hold the process reference but hold another one for the
  640. * debug session.
  641. */
  642. kref_get(&target->ref);
  643. target->debug_trap_enabled = true;
  644. if (target->debugger_process)
  645. atomic_inc(&target->debugger_process->debugged_process_count);
  646. if (copy_to_user(runtime_info, (void *)&target->runtime_info, copy_size)) {
  647. kfd_dbg_trap_deactivate(target, false, 0);
  648. r = -EFAULT;
  649. }
  650. *runtime_size = sizeof(target->runtime_info);
  651. return r;
  652. }
  653. static int kfd_dbg_validate_trap_override_request(struct kfd_process *p,
  654. uint32_t trap_override,
  655. uint32_t trap_mask_request,
  656. uint32_t *trap_mask_supported)
  657. {
  658. int i = 0;
  659. *trap_mask_supported = 0xffffffff;
  660. for (i = 0; i < p->n_pdds; i++) {
  661. struct kfd_process_device *pdd = p->pdds[i];
  662. int err = pdd->dev->kfd2kgd->validate_trap_override_request(
  663. pdd->dev->adev,
  664. trap_override,
  665. trap_mask_supported);
  666. if (err)
  667. return err;
  668. }
  669. if (trap_mask_request & ~*trap_mask_supported)
  670. return -EACCES;
  671. return 0;
  672. }
  673. int kfd_dbg_trap_set_wave_launch_override(struct kfd_process *target,
  674. uint32_t trap_override,
  675. uint32_t trap_mask_bits,
  676. uint32_t trap_mask_request,
  677. uint32_t *trap_mask_prev,
  678. uint32_t *trap_mask_supported)
  679. {
  680. int r = 0, i;
  681. r = kfd_dbg_validate_trap_override_request(target,
  682. trap_override,
  683. trap_mask_request,
  684. trap_mask_supported);
  685. if (r)
  686. return r;
  687. for (i = 0; i < target->n_pdds; i++) {
  688. struct kfd_process_device *pdd = target->pdds[i];
  689. amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
  690. pdd->spi_dbg_override = pdd->dev->kfd2kgd->set_wave_launch_trap_override(
  691. pdd->dev->adev,
  692. pdd->dev->vm_info.last_vmid_kfd,
  693. trap_override,
  694. trap_mask_bits,
  695. trap_mask_request,
  696. trap_mask_prev,
  697. pdd->spi_dbg_override);
  698. amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
  699. if (!pdd->dev->kfd->shared_resources.enable_mes)
  700. r = debug_refresh_runlist(pdd->dev->dqm);
  701. else
  702. r = kfd_dbg_set_mes_debug_mode(pdd, true);
  703. if (r)
  704. break;
  705. }
  706. return r;
  707. }
  708. int kfd_dbg_trap_set_wave_launch_mode(struct kfd_process *target,
  709. uint8_t wave_launch_mode)
  710. {
  711. int r = 0, i;
  712. if (wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL &&
  713. wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT &&
  714. wave_launch_mode != KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG)
  715. return -EINVAL;
  716. for (i = 0; i < target->n_pdds; i++) {
  717. struct kfd_process_device *pdd = target->pdds[i];
  718. amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
  719. pdd->spi_dbg_launch_mode = pdd->dev->kfd2kgd->set_wave_launch_mode(
  720. pdd->dev->adev,
  721. wave_launch_mode,
  722. pdd->dev->vm_info.last_vmid_kfd);
  723. amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
  724. if (!pdd->dev->kfd->shared_resources.enable_mes)
  725. r = debug_refresh_runlist(pdd->dev->dqm);
  726. else
  727. r = kfd_dbg_set_mes_debug_mode(pdd, true);
  728. if (r)
  729. break;
  730. }
  731. return r;
  732. }
  733. int kfd_dbg_trap_query_exception_info(struct kfd_process *target,
  734. uint32_t source_id,
  735. uint32_t exception_code,
  736. bool clear_exception,
  737. void __user *info,
  738. uint32_t *info_size)
  739. {
  740. bool found = false;
  741. int r = 0;
  742. uint32_t copy_size, actual_info_size = 0;
  743. uint64_t *exception_status_ptr = NULL;
  744. if (!target)
  745. return -EINVAL;
  746. if (!info || !info_size)
  747. return -EINVAL;
  748. mutex_lock(&target->event_mutex);
  749. if (KFD_DBG_EC_TYPE_IS_QUEUE(exception_code)) {
  750. /* Per queue exceptions */
  751. struct queue *queue = NULL;
  752. int i;
  753. for (i = 0; i < target->n_pdds; i++) {
  754. struct kfd_process_device *pdd = target->pdds[i];
  755. struct qcm_process_device *qpd = &pdd->qpd;
  756. list_for_each_entry(queue, &qpd->queues_list, list) {
  757. if (!found && queue->properties.queue_id == source_id) {
  758. found = true;
  759. break;
  760. }
  761. }
  762. if (found)
  763. break;
  764. }
  765. if (!found) {
  766. r = -EINVAL;
  767. goto out;
  768. }
  769. if (!(queue->properties.exception_status & KFD_EC_MASK(exception_code))) {
  770. r = -ENODATA;
  771. goto out;
  772. }
  773. exception_status_ptr = &queue->properties.exception_status;
  774. } else if (KFD_DBG_EC_TYPE_IS_DEVICE(exception_code)) {
  775. /* Per device exceptions */
  776. struct kfd_process_device *pdd = NULL;
  777. int i;
  778. for (i = 0; i < target->n_pdds; i++) {
  779. pdd = target->pdds[i];
  780. if (pdd->dev->id == source_id) {
  781. found = true;
  782. break;
  783. }
  784. }
  785. if (!found) {
  786. r = -EINVAL;
  787. goto out;
  788. }
  789. if (!(pdd->exception_status & KFD_EC_MASK(exception_code))) {
  790. r = -ENODATA;
  791. goto out;
  792. }
  793. if (exception_code == EC_DEVICE_MEMORY_VIOLATION) {
  794. copy_size = min((size_t)(*info_size), pdd->vm_fault_exc_data_size);
  795. if (copy_to_user(info, pdd->vm_fault_exc_data, copy_size)) {
  796. r = -EFAULT;
  797. goto out;
  798. }
  799. actual_info_size = pdd->vm_fault_exc_data_size;
  800. if (clear_exception) {
  801. kfree(pdd->vm_fault_exc_data);
  802. pdd->vm_fault_exc_data = NULL;
  803. pdd->vm_fault_exc_data_size = 0;
  804. }
  805. }
  806. exception_status_ptr = &pdd->exception_status;
  807. } else if (KFD_DBG_EC_TYPE_IS_PROCESS(exception_code)) {
  808. /* Per process exceptions */
  809. if (!(target->exception_status & KFD_EC_MASK(exception_code))) {
  810. r = -ENODATA;
  811. goto out;
  812. }
  813. if (exception_code == EC_PROCESS_RUNTIME) {
  814. copy_size = min((size_t)(*info_size), sizeof(target->runtime_info));
  815. if (copy_to_user(info, (void *)&target->runtime_info, copy_size)) {
  816. r = -EFAULT;
  817. goto out;
  818. }
  819. actual_info_size = sizeof(target->runtime_info);
  820. }
  821. exception_status_ptr = &target->exception_status;
  822. } else {
  823. pr_debug("Bad exception type [%i]\n", exception_code);
  824. r = -EINVAL;
  825. goto out;
  826. }
  827. *info_size = actual_info_size;
  828. if (clear_exception)
  829. *exception_status_ptr &= ~KFD_EC_MASK(exception_code);
  830. out:
  831. mutex_unlock(&target->event_mutex);
  832. return r;
  833. }
  834. int kfd_dbg_trap_device_snapshot(struct kfd_process *target,
  835. uint64_t exception_clear_mask,
  836. void __user *user_info,
  837. uint32_t *number_of_device_infos,
  838. uint32_t *entry_size)
  839. {
  840. struct kfd_dbg_device_info_entry device_info;
  841. uint32_t tmp_entry_size, tmp_num_devices;
  842. int i, r = 0;
  843. if (!(target && user_info && number_of_device_infos && entry_size))
  844. return -EINVAL;
  845. tmp_entry_size = *entry_size;
  846. tmp_num_devices = min_t(size_t, *number_of_device_infos, target->n_pdds);
  847. *number_of_device_infos = target->n_pdds;
  848. *entry_size = min_t(size_t, *entry_size, sizeof(device_info));
  849. if (!tmp_num_devices)
  850. return 0;
  851. memset(&device_info, 0, sizeof(device_info));
  852. mutex_lock(&target->event_mutex);
  853. /* Run over all pdd of the process */
  854. for (i = 0; i < tmp_num_devices; i++) {
  855. struct kfd_process_device *pdd = target->pdds[i];
  856. struct kfd_topology_device *topo_dev = kfd_topology_device_by_id(pdd->dev->id);
  857. device_info.gpu_id = pdd->dev->id;
  858. device_info.exception_status = pdd->exception_status;
  859. device_info.lds_base = pdd->lds_base;
  860. device_info.lds_limit = pdd->lds_limit;
  861. device_info.scratch_base = pdd->scratch_base;
  862. device_info.scratch_limit = pdd->scratch_limit;
  863. device_info.gpuvm_base = pdd->gpuvm_base;
  864. device_info.gpuvm_limit = pdd->gpuvm_limit;
  865. device_info.location_id = topo_dev->node_props.location_id;
  866. device_info.vendor_id = topo_dev->node_props.vendor_id;
  867. device_info.device_id = topo_dev->node_props.device_id;
  868. device_info.revision_id = pdd->dev->adev->pdev->revision;
  869. device_info.subsystem_vendor_id = pdd->dev->adev->pdev->subsystem_vendor;
  870. device_info.subsystem_device_id = pdd->dev->adev->pdev->subsystem_device;
  871. device_info.fw_version = pdd->dev->kfd->mec_fw_version;
  872. device_info.gfx_target_version =
  873. topo_dev->node_props.gfx_target_version;
  874. device_info.simd_count = topo_dev->node_props.simd_count;
  875. device_info.max_waves_per_simd =
  876. topo_dev->node_props.max_waves_per_simd;
  877. device_info.array_count = topo_dev->node_props.array_count;
  878. device_info.simd_arrays_per_engine =
  879. topo_dev->node_props.simd_arrays_per_engine;
  880. device_info.num_xcc = NUM_XCC(pdd->dev->xcc_mask);
  881. device_info.capability = topo_dev->node_props.capability;
  882. device_info.debug_prop = topo_dev->node_props.debug_prop;
  883. if (exception_clear_mask)
  884. pdd->exception_status &= ~exception_clear_mask;
  885. if (copy_to_user(user_info, &device_info, *entry_size)) {
  886. r = -EFAULT;
  887. break;
  888. }
  889. user_info += tmp_entry_size;
  890. }
  891. mutex_unlock(&target->event_mutex);
  892. return r;
  893. }
  894. void kfd_dbg_set_enabled_debug_exception_mask(struct kfd_process *target,
  895. uint64_t exception_set_mask)
  896. {
  897. uint64_t found_mask = 0;
  898. struct process_queue_manager *pqm;
  899. struct process_queue_node *pqn;
  900. static const char write_data = '.';
  901. loff_t pos = 0;
  902. int i;
  903. mutex_lock(&target->event_mutex);
  904. found_mask |= target->exception_status;
  905. pqm = &target->pqm;
  906. list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
  907. if (!pqn->q)
  908. continue;
  909. found_mask |= pqn->q->properties.exception_status;
  910. }
  911. for (i = 0; i < target->n_pdds; i++) {
  912. struct kfd_process_device *pdd = target->pdds[i];
  913. found_mask |= pdd->exception_status;
  914. }
  915. if (exception_set_mask & found_mask)
  916. kernel_write(target->dbg_ev_file, &write_data, 1, &pos);
  917. target->exception_enable_mask = exception_set_mask;
  918. mutex_unlock(&target->event_mutex);
  919. }