sii902x.c 34 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2018 Renesas Electronics
  4. *
  5. * Copyright (C) 2016 Atmel
  6. * Bo Shen <voice.shen@atmel.com>
  7. *
  8. * Authors: Bo Shen <voice.shen@atmel.com>
  9. * Boris Brezillon <boris.brezillon@free-electrons.com>
  10. * Wu, Songjun <Songjun.Wu@atmel.com>
  11. *
  12. * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
  13. */
  14. #include <linux/gpio/consumer.h>
  15. #include <linux/i2c-mux.h>
  16. #include <linux/i2c.h>
  17. #include <linux/media-bus-format.h>
  18. #include <linux/module.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/clk.h>
  22. #include <drm/drm_atomic_helper.h>
  23. #include <drm/drm_bridge.h>
  24. #include <drm/drm_drv.h>
  25. #include <drm/drm_edid.h>
  26. #include <drm/drm_print.h>
  27. #include <drm/drm_probe_helper.h>
  28. #include <sound/hdmi-codec.h>
  29. #define SII902X_TPI_VIDEO_DATA 0x0
  30. #define SII902X_TPI_PIXEL_REPETITION 0x8
  31. #define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)
  32. #define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)
  33. #define SII902X_TPI_AVI_PIXEL_REP_4X 3
  34. #define SII902X_TPI_AVI_PIXEL_REP_2X 1
  35. #define SII902X_TPI_AVI_PIXEL_REP_NONE 0
  36. #define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
  37. #define SII902X_TPI_CLK_RATIO_1X (1 << 6)
  38. #define SII902X_TPI_CLK_RATIO_2X (2 << 6)
  39. #define SII902X_TPI_CLK_RATIO_4X (3 << 6)
  40. #define SII902X_TPI_AVI_IN_FORMAT 0x9
  41. #define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)
  42. #define SII902X_TPI_AVI_INPUT_DITHER BIT(6)
  43. #define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)
  44. #define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)
  45. #define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
  46. #define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
  47. #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
  48. #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
  49. #define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
  50. #define SII902X_TPI_AVI_INFOFRAME 0x0c
  51. #define SII902X_SYS_CTRL_DATA 0x1a
  52. #define SII902X_SYS_CTRL_PWR_DWN BIT(4)
  53. #define SII902X_SYS_CTRL_AV_MUTE BIT(3)
  54. #define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)
  55. #define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)
  56. #define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
  57. #define SII902X_SYS_CTRL_OUTPUT_HDMI 1
  58. #define SII902X_SYS_CTRL_OUTPUT_DVI 0
  59. #define SII902X_REG_CHIPID(n) (0x1b + (n))
  60. #define SII902X_PWR_STATE_CTRL 0x1e
  61. #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
  62. #define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)
  63. /* Audio */
  64. #define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
  65. #define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
  66. #define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
  67. #define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
  68. #define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
  69. #define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)
  70. #define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)
  71. #define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
  72. #define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)
  73. #define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)
  74. #define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)
  75. #define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)
  76. #define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
  77. #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
  78. #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
  79. #define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
  80. #define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)
  81. #define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
  82. #define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)
  83. #define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
  84. #define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)
  85. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
  86. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)
  87. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)
  88. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)
  89. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)
  90. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)
  91. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)
  92. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)
  93. #define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
  94. #define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)
  95. #define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
  96. #define SII902X_TPI_I2S_STRM_HDR_SIZE 5
  97. #define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
  98. #define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
  99. #define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
  100. #define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
  101. #define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
  102. #define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
  103. #define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
  104. #define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
  105. #define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
  106. #define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
  107. #define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
  108. #define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)
  109. #define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
  110. #define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)
  111. #define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
  112. #define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)
  113. #define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)
  114. #define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
  115. #define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
  116. #define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)
  117. #define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)
  118. #define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)
  119. #define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)
  120. #define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)
  121. #define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)
  122. #define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)
  123. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
  124. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)
  125. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)
  126. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)
  127. #define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
  128. #define SII902X_INT_ENABLE 0x3c
  129. #define SII902X_INT_STATUS 0x3d
  130. #define SII902X_HOTPLUG_EVENT BIT(0)
  131. #define SII902X_PLUGGED_STATUS BIT(2)
  132. #define SII902X_REG_TPI_RQB 0xc7
  133. /* Indirect internal register access */
  134. #define SII902X_IND_SET_PAGE 0xbc
  135. #define SII902X_IND_OFFSET 0xbd
  136. #define SII902X_IND_VALUE 0xbe
  137. #define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
  138. #define SII902X_TPI_MISC_INFOFRAME_END 0xde
  139. #define SII902X_TPI_MISC_INFOFRAME_SIZE \
  140. (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
  141. #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500
  142. #define SII902X_AUDIO_PORT_INDEX 3
  143. /*
  144. * The maximum resolution supported by the HDMI bridge is 1080p@60Hz
  145. * and 1920x1200 requiring a pixel clock of 165MHz and the minimum
  146. * resolution supported is 480p@60Hz requiring a pixel clock of 25MHz
  147. */
  148. #define SII902X_MIN_PIXEL_CLOCK_KHZ 25000
  149. #define SII902X_MAX_PIXEL_CLOCK_KHZ 165000
  150. struct sii902x {
  151. struct i2c_client *i2c;
  152. struct regmap *regmap;
  153. struct drm_bridge bridge;
  154. struct drm_bridge *next_bridge;
  155. struct drm_connector connector;
  156. struct gpio_desc *reset_gpio;
  157. struct i2c_mux_core *i2cmux;
  158. bool sink_is_hdmi;
  159. /*
  160. * Mutex protects audio and video functions from interfering
  161. * each other, by keeping their i2c command sequences atomic.
  162. */
  163. struct mutex mutex;
  164. struct sii902x_audio {
  165. struct platform_device *pdev;
  166. struct clk *mclk;
  167. u32 i2s_fifo_sequence[4];
  168. } audio;
  169. };
  170. static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
  171. {
  172. union i2c_smbus_data data;
  173. int ret;
  174. ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
  175. I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
  176. if (ret < 0)
  177. return ret;
  178. *val = data.byte;
  179. return 0;
  180. }
  181. static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
  182. {
  183. union i2c_smbus_data data;
  184. data.byte = val;
  185. return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
  186. I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
  187. &data);
  188. }
  189. static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
  190. u8 val)
  191. {
  192. int ret;
  193. u8 status;
  194. ret = sii902x_read_unlocked(i2c, reg, &status);
  195. if (ret)
  196. return ret;
  197. status &= ~mask;
  198. status |= val & mask;
  199. return sii902x_write_unlocked(i2c, reg, status);
  200. }
  201. static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
  202. {
  203. return container_of(bridge, struct sii902x, bridge);
  204. }
  205. static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
  206. {
  207. return container_of(con, struct sii902x, connector);
  208. }
  209. static void sii902x_reset(struct sii902x *sii902x)
  210. {
  211. if (!sii902x->reset_gpio)
  212. return;
  213. gpiod_set_value_cansleep(sii902x->reset_gpio, 1);
  214. /* The datasheet says treset-min = 100us. Make it 150us to be sure. */
  215. usleep_range(150, 200);
  216. gpiod_set_value_cansleep(sii902x->reset_gpio, 0);
  217. }
  218. static enum drm_connector_status sii902x_detect(struct sii902x *sii902x)
  219. {
  220. unsigned int status;
  221. mutex_lock(&sii902x->mutex);
  222. regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
  223. mutex_unlock(&sii902x->mutex);
  224. return (status & SII902X_PLUGGED_STATUS) ?
  225. connector_status_connected : connector_status_disconnected;
  226. }
  227. static enum drm_connector_status
  228. sii902x_connector_detect(struct drm_connector *connector, bool force)
  229. {
  230. struct sii902x *sii902x = connector_to_sii902x(connector);
  231. return sii902x_detect(sii902x);
  232. }
  233. static const struct drm_connector_funcs sii902x_connector_funcs = {
  234. .detect = sii902x_connector_detect,
  235. .fill_modes = drm_helper_probe_single_connector_modes,
  236. .destroy = drm_connector_cleanup,
  237. .reset = drm_atomic_helper_connector_reset,
  238. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  239. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  240. };
  241. static const struct drm_edid *sii902x_edid_read(struct sii902x *sii902x,
  242. struct drm_connector *connector)
  243. {
  244. const struct drm_edid *drm_edid;
  245. mutex_lock(&sii902x->mutex);
  246. drm_edid = drm_edid_read_ddc(connector, sii902x->i2cmux->adapter[0]);
  247. mutex_unlock(&sii902x->mutex);
  248. return drm_edid;
  249. }
  250. static int sii902x_get_modes(struct drm_connector *connector)
  251. {
  252. struct sii902x *sii902x = connector_to_sii902x(connector);
  253. const struct drm_edid *drm_edid;
  254. int num = 0;
  255. drm_edid = sii902x_edid_read(sii902x, connector);
  256. drm_edid_connector_update(connector, drm_edid);
  257. if (drm_edid) {
  258. num = drm_edid_connector_add_modes(connector);
  259. drm_edid_free(drm_edid);
  260. }
  261. sii902x->sink_is_hdmi = connector->display_info.is_hdmi;
  262. return num;
  263. }
  264. static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
  265. .get_modes = sii902x_get_modes,
  266. };
  267. static void sii902x_bridge_atomic_disable(struct drm_bridge *bridge,
  268. struct drm_bridge_state *old_bridge_state)
  269. {
  270. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  271. mutex_lock(&sii902x->mutex);
  272. regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
  273. SII902X_SYS_CTRL_PWR_DWN,
  274. SII902X_SYS_CTRL_PWR_DWN);
  275. mutex_unlock(&sii902x->mutex);
  276. }
  277. static void sii902x_bridge_atomic_enable(struct drm_bridge *bridge,
  278. struct drm_bridge_state *old_bridge_state)
  279. {
  280. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  281. mutex_lock(&sii902x->mutex);
  282. regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
  283. SII902X_AVI_POWER_STATE_MSK,
  284. SII902X_AVI_POWER_STATE_D(0));
  285. regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
  286. SII902X_SYS_CTRL_PWR_DWN, 0);
  287. mutex_unlock(&sii902x->mutex);
  288. }
  289. static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
  290. const struct drm_display_mode *mode,
  291. const struct drm_display_mode *adj)
  292. {
  293. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  294. u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
  295. struct regmap *regmap = sii902x->regmap;
  296. u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
  297. struct hdmi_avi_infoframe frame;
  298. u16 pixel_clock_10kHz = adj->clock / 10;
  299. int ret;
  300. if (sii902x->sink_is_hdmi)
  301. output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
  302. buf[0] = pixel_clock_10kHz & 0xff;
  303. buf[1] = pixel_clock_10kHz >> 8;
  304. buf[2] = drm_mode_vrefresh(adj);
  305. buf[3] = 0x00;
  306. buf[4] = adj->hdisplay;
  307. buf[5] = adj->hdisplay >> 8;
  308. buf[6] = adj->vdisplay;
  309. buf[7] = adj->vdisplay >> 8;
  310. buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
  311. SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
  312. buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
  313. SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
  314. mutex_lock(&sii902x->mutex);
  315. ret = regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
  316. SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
  317. if (ret)
  318. goto out;
  319. ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
  320. if (ret)
  321. goto out;
  322. ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
  323. &sii902x->connector, adj);
  324. if (ret < 0) {
  325. DRM_ERROR("couldn't fill AVI infoframe\n");
  326. goto out;
  327. }
  328. ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
  329. if (ret < 0) {
  330. DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
  331. goto out;
  332. }
  333. /* Do not send the infoframe header, but keep the CRC field. */
  334. regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
  335. buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
  336. HDMI_AVI_INFOFRAME_SIZE + 1);
  337. out:
  338. mutex_unlock(&sii902x->mutex);
  339. }
  340. static int sii902x_bridge_attach(struct drm_bridge *bridge,
  341. enum drm_bridge_attach_flags flags)
  342. {
  343. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  344. u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
  345. struct drm_device *drm = bridge->dev;
  346. int ret;
  347. if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
  348. return drm_bridge_attach(bridge->encoder, sii902x->next_bridge,
  349. bridge, flags);
  350. drm_connector_helper_add(&sii902x->connector,
  351. &sii902x_connector_helper_funcs);
  352. if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
  353. dev_err(&sii902x->i2c->dev,
  354. "sii902x driver is only compatible with DRM devices supporting atomic updates\n");
  355. return -ENOTSUPP;
  356. }
  357. ret = drm_connector_init(drm, &sii902x->connector,
  358. &sii902x_connector_funcs,
  359. DRM_MODE_CONNECTOR_HDMIA);
  360. if (ret)
  361. return ret;
  362. if (sii902x->i2c->irq > 0)
  363. sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
  364. else
  365. sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
  366. ret = drm_display_info_set_bus_formats(&sii902x->connector.display_info,
  367. &bus_format, 1);
  368. if (ret)
  369. return ret;
  370. drm_connector_attach_encoder(&sii902x->connector, bridge->encoder);
  371. return 0;
  372. }
  373. static enum drm_connector_status sii902x_bridge_detect(struct drm_bridge *bridge)
  374. {
  375. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  376. return sii902x_detect(sii902x);
  377. }
  378. static const struct drm_edid *sii902x_bridge_edid_read(struct drm_bridge *bridge,
  379. struct drm_connector *connector)
  380. {
  381. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  382. return sii902x_edid_read(sii902x, connector);
  383. }
  384. static u32 *sii902x_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
  385. struct drm_bridge_state *bridge_state,
  386. struct drm_crtc_state *crtc_state,
  387. struct drm_connector_state *conn_state,
  388. u32 output_fmt,
  389. unsigned int *num_input_fmts)
  390. {
  391. u32 *input_fmts;
  392. *num_input_fmts = 0;
  393. input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL);
  394. if (!input_fmts)
  395. return NULL;
  396. input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
  397. *num_input_fmts = 1;
  398. return input_fmts;
  399. }
  400. static int sii902x_bridge_atomic_check(struct drm_bridge *bridge,
  401. struct drm_bridge_state *bridge_state,
  402. struct drm_crtc_state *crtc_state,
  403. struct drm_connector_state *conn_state)
  404. {
  405. if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ ||
  406. crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
  407. return -EINVAL;
  408. /*
  409. * There might be flags negotiation supported in future but
  410. * set the bus flags in atomic_check statically for now.
  411. */
  412. bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;
  413. return 0;
  414. }
  415. static enum drm_mode_status
  416. sii902x_bridge_mode_valid(struct drm_bridge *bridge,
  417. const struct drm_display_info *info,
  418. const struct drm_display_mode *mode)
  419. {
  420. if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ)
  421. return MODE_CLOCK_LOW;
  422. if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
  423. return MODE_CLOCK_HIGH;
  424. return MODE_OK;
  425. }
  426. static const struct drm_bridge_funcs sii902x_bridge_funcs = {
  427. .attach = sii902x_bridge_attach,
  428. .mode_set = sii902x_bridge_mode_set,
  429. .atomic_disable = sii902x_bridge_atomic_disable,
  430. .atomic_enable = sii902x_bridge_atomic_enable,
  431. .detect = sii902x_bridge_detect,
  432. .edid_read = sii902x_bridge_edid_read,
  433. .atomic_reset = drm_atomic_helper_bridge_reset,
  434. .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
  435. .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
  436. .atomic_get_input_bus_fmts = sii902x_bridge_atomic_get_input_bus_fmts,
  437. .atomic_check = sii902x_bridge_atomic_check,
  438. .mode_valid = sii902x_bridge_mode_valid,
  439. };
  440. static int sii902x_mute(struct sii902x *sii902x, bool mute)
  441. {
  442. struct device *dev = &sii902x->i2c->dev;
  443. unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
  444. SII902X_TPI_AUDIO_MUTE_DISABLE;
  445. dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
  446. return regmap_update_bits(sii902x->regmap,
  447. SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
  448. SII902X_TPI_AUDIO_MUTE_ENABLE, val);
  449. }
  450. static const int sii902x_mclk_div_table[] = {
  451. 128, 256, 384, 512, 768, 1024, 1152, 192 };
  452. static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
  453. unsigned int mclk)
  454. {
  455. int div = mclk / rate;
  456. int distance = 100000;
  457. u8 i, nearest = 0;
  458. for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
  459. unsigned int d = abs(div - sii902x_mclk_div_table[i]);
  460. if (d >= distance)
  461. continue;
  462. nearest = i;
  463. distance = d;
  464. if (d == 0)
  465. break;
  466. }
  467. *i2s_config_reg |= nearest << 4;
  468. return sii902x_mclk_div_table[nearest];
  469. }
  470. static const struct sii902x_sample_freq {
  471. u32 freq;
  472. u8 val;
  473. } sii902x_sample_freq[] = {
  474. { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },
  475. { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },
  476. { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },
  477. { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },
  478. { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },
  479. { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },
  480. { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },
  481. };
  482. static int sii902x_audio_hw_params(struct device *dev, void *data,
  483. struct hdmi_codec_daifmt *daifmt,
  484. struct hdmi_codec_params *params)
  485. {
  486. struct sii902x *sii902x = dev_get_drvdata(dev);
  487. u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
  488. u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
  489. SII902X_TPI_AUDIO_MUTE_ENABLE |
  490. SII902X_TPI_AUDIO_CODING_PCM);
  491. u8 config_byte3_reg = 0;
  492. u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
  493. unsigned long mclk_rate;
  494. int i, ret;
  495. if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) {
  496. dev_dbg(dev, "%s: I2S clock provider mode not supported\n",
  497. __func__);
  498. return -EINVAL;
  499. }
  500. switch (daifmt->fmt) {
  501. case HDMI_I2S:
  502. i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
  503. SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
  504. break;
  505. case HDMI_RIGHT_J:
  506. i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
  507. break;
  508. case HDMI_LEFT_J:
  509. i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
  510. break;
  511. default:
  512. dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
  513. daifmt->fmt);
  514. return -EINVAL;
  515. }
  516. if (daifmt->bit_clk_inv)
  517. i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
  518. else
  519. i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
  520. if (daifmt->frame_clk_inv)
  521. i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
  522. else
  523. i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
  524. if (params->channels > 2)
  525. config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
  526. else
  527. config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
  528. switch (params->sample_width) {
  529. case 16:
  530. config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
  531. break;
  532. case 20:
  533. config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
  534. break;
  535. case 24:
  536. case 32:
  537. config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
  538. break;
  539. default:
  540. dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
  541. params->sample_width);
  542. return -EINVAL;
  543. }
  544. for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
  545. if (params->sample_rate == sii902x_sample_freq[i].freq) {
  546. config_byte3_reg |= sii902x_sample_freq[i].val;
  547. break;
  548. }
  549. }
  550. ret = clk_prepare_enable(sii902x->audio.mclk);
  551. if (ret) {
  552. dev_err(dev, "Enabling mclk failed: %d\n", ret);
  553. return ret;
  554. }
  555. if (sii902x->audio.mclk) {
  556. mclk_rate = clk_get_rate(sii902x->audio.mclk);
  557. ret = sii902x_select_mclk_div(&i2s_config_reg,
  558. params->sample_rate, mclk_rate);
  559. if (mclk_rate != ret * params->sample_rate)
  560. dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
  561. mclk_rate, ret, params->sample_rate);
  562. }
  563. mutex_lock(&sii902x->mutex);
  564. ret = regmap_write(sii902x->regmap,
  565. SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
  566. config_byte2_reg);
  567. if (ret < 0)
  568. goto out;
  569. ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
  570. i2s_config_reg);
  571. if (ret)
  572. goto out;
  573. for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
  574. sii902x->audio.i2s_fifo_sequence[i]; i++)
  575. regmap_write(sii902x->regmap,
  576. SII902X_TPI_I2S_ENABLE_MAPPING_REG,
  577. sii902x->audio.i2s_fifo_sequence[i]);
  578. ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
  579. config_byte3_reg);
  580. if (ret)
  581. goto out;
  582. ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
  583. params->iec.status,
  584. min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
  585. sizeof(params->iec.status)));
  586. if (ret)
  587. goto out;
  588. ret = hdmi_audio_infoframe_pack(&params->cea, infoframe_buf,
  589. sizeof(infoframe_buf));
  590. if (ret < 0) {
  591. dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
  592. __func__, ret);
  593. goto out;
  594. }
  595. ret = regmap_bulk_write(sii902x->regmap,
  596. SII902X_TPI_MISC_INFOFRAME_BASE,
  597. infoframe_buf,
  598. min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
  599. if (ret)
  600. goto out;
  601. /* Decode Level 0 Packets */
  602. ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
  603. if (ret)
  604. goto out;
  605. ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
  606. if (ret)
  607. goto out;
  608. ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
  609. if (ret)
  610. goto out;
  611. dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
  612. out:
  613. mutex_unlock(&sii902x->mutex);
  614. if (ret) {
  615. clk_disable_unprepare(sii902x->audio.mclk);
  616. dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
  617. ret);
  618. }
  619. return ret;
  620. }
  621. static void sii902x_audio_shutdown(struct device *dev, void *data)
  622. {
  623. struct sii902x *sii902x = dev_get_drvdata(dev);
  624. mutex_lock(&sii902x->mutex);
  625. regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
  626. SII902X_TPI_AUDIO_INTERFACE_DISABLE);
  627. mutex_unlock(&sii902x->mutex);
  628. clk_disable_unprepare(sii902x->audio.mclk);
  629. }
  630. static int sii902x_audio_mute(struct device *dev, void *data,
  631. bool enable, int direction)
  632. {
  633. struct sii902x *sii902x = dev_get_drvdata(dev);
  634. mutex_lock(&sii902x->mutex);
  635. sii902x_mute(sii902x, enable);
  636. mutex_unlock(&sii902x->mutex);
  637. return 0;
  638. }
  639. static int sii902x_audio_get_eld(struct device *dev, void *data,
  640. uint8_t *buf, size_t len)
  641. {
  642. struct sii902x *sii902x = dev_get_drvdata(dev);
  643. mutex_lock(&sii902x->mutex);
  644. memcpy(buf, sii902x->connector.eld,
  645. min(sizeof(sii902x->connector.eld), len));
  646. mutex_unlock(&sii902x->mutex);
  647. return 0;
  648. }
  649. static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
  650. struct device_node *endpoint)
  651. {
  652. struct of_endpoint of_ep;
  653. int ret;
  654. ret = of_graph_parse_endpoint(endpoint, &of_ep);
  655. if (ret < 0)
  656. return ret;
  657. /*
  658. * HDMI sound should be located at reg = <3>
  659. * Return expected DAI index 0.
  660. */
  661. if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
  662. return 0;
  663. return -EINVAL;
  664. }
  665. static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
  666. .hw_params = sii902x_audio_hw_params,
  667. .audio_shutdown = sii902x_audio_shutdown,
  668. .mute_stream = sii902x_audio_mute,
  669. .get_eld = sii902x_audio_get_eld,
  670. .get_dai_id = sii902x_audio_get_dai_id,
  671. .no_capture_mute = 1,
  672. };
  673. static int sii902x_audio_codec_init(struct sii902x *sii902x,
  674. struct device *dev)
  675. {
  676. static const u8 audio_fifo_id[] = {
  677. SII902X_TPI_I2S_CONFIG_FIFO0,
  678. SII902X_TPI_I2S_CONFIG_FIFO1,
  679. SII902X_TPI_I2S_CONFIG_FIFO2,
  680. SII902X_TPI_I2S_CONFIG_FIFO3,
  681. };
  682. static const u8 i2s_lane_id[] = {
  683. SII902X_TPI_I2S_SELECT_SD0,
  684. SII902X_TPI_I2S_SELECT_SD1,
  685. SII902X_TPI_I2S_SELECT_SD2,
  686. SII902X_TPI_I2S_SELECT_SD3,
  687. };
  688. struct hdmi_codec_pdata codec_data = {
  689. .ops = &sii902x_audio_codec_ops,
  690. .i2s = 1, /* Only i2s support for now. */
  691. .spdif = 0,
  692. .max_i2s_channels = 0,
  693. };
  694. u8 lanes[4];
  695. int num_lanes, i;
  696. if (!of_property_read_bool(dev->of_node, "#sound-dai-cells")) {
  697. dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
  698. __func__);
  699. return 0;
  700. }
  701. num_lanes = of_property_read_variable_u8_array(dev->of_node,
  702. "sil,i2s-data-lanes",
  703. lanes, 1,
  704. ARRAY_SIZE(lanes));
  705. if (num_lanes == -EINVAL) {
  706. dev_dbg(dev,
  707. "%s: No \"sil,i2s-data-lanes\", use default <0>\n",
  708. __func__);
  709. num_lanes = 1;
  710. lanes[0] = 0;
  711. } else if (num_lanes < 0) {
  712. dev_err(dev,
  713. "%s: Error gettin \"sil,i2s-data-lanes\": %d\n",
  714. __func__, num_lanes);
  715. return num_lanes;
  716. }
  717. codec_data.max_i2s_channels = 2 * num_lanes;
  718. for (i = 0; i < num_lanes; i++)
  719. sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
  720. i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;
  721. sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
  722. if (IS_ERR(sii902x->audio.mclk)) {
  723. dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
  724. __func__, PTR_ERR(sii902x->audio.mclk));
  725. return PTR_ERR(sii902x->audio.mclk);
  726. }
  727. sii902x->audio.pdev = platform_device_register_data(
  728. dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
  729. &codec_data, sizeof(codec_data));
  730. return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
  731. }
  732. static const struct regmap_range sii902x_volatile_ranges[] = {
  733. { .range_min = 0, .range_max = 0xff },
  734. };
  735. static const struct regmap_access_table sii902x_volatile_table = {
  736. .yes_ranges = sii902x_volatile_ranges,
  737. .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
  738. };
  739. static const struct regmap_config sii902x_regmap_config = {
  740. .reg_bits = 8,
  741. .val_bits = 8,
  742. .disable_locking = true, /* struct sii902x mutex should be enough */
  743. .max_register = SII902X_TPI_MISC_INFOFRAME_END,
  744. .volatile_table = &sii902x_volatile_table,
  745. .cache_type = REGCACHE_NONE,
  746. };
  747. static irqreturn_t sii902x_interrupt(int irq, void *data)
  748. {
  749. struct sii902x *sii902x = data;
  750. unsigned int status = 0;
  751. mutex_lock(&sii902x->mutex);
  752. regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
  753. regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
  754. mutex_unlock(&sii902x->mutex);
  755. if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) {
  756. drm_helper_hpd_irq_event(sii902x->bridge.dev);
  757. drm_bridge_hpd_notify(&sii902x->bridge, (status & SII902X_PLUGGED_STATUS)
  758. ? connector_status_connected
  759. : connector_status_disconnected);
  760. }
  761. return IRQ_HANDLED;
  762. }
  763. /*
  764. * The purpose of sii902x_i2c_bypass_select is to enable the pass through
  765. * mode of the HDMI transmitter. Do not use regmap from within this function,
  766. * only use sii902x_*_unlocked functions to read/modify/write registers.
  767. * We are holding the parent adapter lock here, keep this in mind before
  768. * adding more i2c transactions.
  769. *
  770. * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
  771. * in this driver, we need to make sure that we only touch 0x1A[2:1] from
  772. * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
  773. * we leave the remaining bits as we have found them.
  774. */
  775. static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
  776. {
  777. struct sii902x *sii902x = i2c_mux_priv(mux);
  778. struct device *dev = &sii902x->i2c->dev;
  779. unsigned long timeout;
  780. u8 status;
  781. int ret;
  782. ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  783. SII902X_SYS_CTRL_DDC_BUS_REQ,
  784. SII902X_SYS_CTRL_DDC_BUS_REQ);
  785. if (ret)
  786. return ret;
  787. timeout = jiffies +
  788. msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
  789. do {
  790. ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  791. &status);
  792. if (ret)
  793. return ret;
  794. } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
  795. time_before(jiffies, timeout));
  796. if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
  797. dev_err(dev, "Failed to acquire the i2c bus\n");
  798. return -ETIMEDOUT;
  799. }
  800. return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  801. status);
  802. }
  803. /*
  804. * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
  805. * mode of the HDMI transmitter. Do not use regmap from within this function,
  806. * only use sii902x_*_unlocked functions to read/modify/write registers.
  807. * We are holding the parent adapter lock here, keep this in mind before
  808. * adding more i2c transactions.
  809. *
  810. * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
  811. * in this driver, we need to make sure that we only touch 0x1A[2:1] from
  812. * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
  813. * we leave the remaining bits as we have found them.
  814. */
  815. static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
  816. {
  817. struct sii902x *sii902x = i2c_mux_priv(mux);
  818. struct device *dev = &sii902x->i2c->dev;
  819. unsigned long timeout;
  820. unsigned int retries;
  821. u8 status;
  822. int ret;
  823. /*
  824. * When the HDMI transmitter is in pass through mode, we need an
  825. * (undocumented) additional delay between STOP and START conditions
  826. * to guarantee the bus won't get stuck.
  827. */
  828. udelay(30);
  829. /*
  830. * Sometimes the I2C bus can stall after failure to use the
  831. * EDID channel. Retry a few times to see if things clear
  832. * up, else continue anyway.
  833. */
  834. retries = 5;
  835. do {
  836. ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  837. &status);
  838. retries--;
  839. } while (ret && retries);
  840. if (ret) {
  841. dev_err(dev, "failed to read status (%d)\n", ret);
  842. return ret;
  843. }
  844. ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  845. SII902X_SYS_CTRL_DDC_BUS_REQ |
  846. SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
  847. if (ret)
  848. return ret;
  849. timeout = jiffies +
  850. msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
  851. do {
  852. ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  853. &status);
  854. if (ret)
  855. return ret;
  856. } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
  857. SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
  858. time_before(jiffies, timeout));
  859. if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
  860. SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
  861. dev_err(dev, "failed to release the i2c bus\n");
  862. return -ETIMEDOUT;
  863. }
  864. return 0;
  865. }
  866. static const struct drm_bridge_timings default_sii902x_timings = {
  867. .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
  868. | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
  869. | DRM_BUS_FLAG_DE_HIGH,
  870. };
  871. static int sii902x_init(struct sii902x *sii902x)
  872. {
  873. struct device *dev = &sii902x->i2c->dev;
  874. unsigned int status = 0;
  875. u8 chipid[4];
  876. int ret;
  877. sii902x_reset(sii902x);
  878. ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
  879. if (ret)
  880. return ret;
  881. ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
  882. &chipid, 4);
  883. if (ret) {
  884. dev_err(dev, "regmap_read failed %d\n", ret);
  885. return ret;
  886. }
  887. if (chipid[0] != 0xb0) {
  888. dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
  889. chipid[0]);
  890. return -EINVAL;
  891. }
  892. /* Clear all pending interrupts */
  893. regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
  894. regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
  895. if (sii902x->i2c->irq > 0) {
  896. regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
  897. SII902X_HOTPLUG_EVENT);
  898. ret = devm_request_threaded_irq(dev, sii902x->i2c->irq, NULL,
  899. sii902x_interrupt,
  900. IRQF_ONESHOT, dev_name(dev),
  901. sii902x);
  902. if (ret)
  903. return ret;
  904. }
  905. ret = sii902x_audio_codec_init(sii902x, dev);
  906. if (ret)
  907. return ret;
  908. i2c_set_clientdata(sii902x->i2c, sii902x);
  909. sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,
  910. 1, 0, I2C_MUX_GATE,
  911. sii902x_i2c_bypass_select,
  912. sii902x_i2c_bypass_deselect);
  913. if (!sii902x->i2cmux) {
  914. ret = -ENOMEM;
  915. goto err_unreg_audio;
  916. }
  917. sii902x->i2cmux->priv = sii902x;
  918. ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0);
  919. if (ret)
  920. goto err_unreg_audio;
  921. sii902x->bridge.funcs = &sii902x_bridge_funcs;
  922. sii902x->bridge.of_node = dev->of_node;
  923. sii902x->bridge.timings = &default_sii902x_timings;
  924. sii902x->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
  925. if (sii902x->i2c->irq > 0)
  926. sii902x->bridge.ops |= DRM_BRIDGE_OP_HPD;
  927. drm_bridge_add(&sii902x->bridge);
  928. return 0;
  929. err_unreg_audio:
  930. if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
  931. platform_device_unregister(sii902x->audio.pdev);
  932. return ret;
  933. }
  934. static int sii902x_probe(struct i2c_client *client)
  935. {
  936. struct device *dev = &client->dev;
  937. struct device_node *endpoint;
  938. struct sii902x *sii902x;
  939. static const char * const supplies[] = {"iovcc", "cvcc12"};
  940. int ret;
  941. ret = i2c_check_functionality(client->adapter,
  942. I2C_FUNC_SMBUS_BYTE_DATA);
  943. if (!ret) {
  944. dev_err(dev, "I2C adapter not suitable\n");
  945. return -EIO;
  946. }
  947. sii902x = devm_kzalloc(dev, sizeof(*sii902x), GFP_KERNEL);
  948. if (!sii902x)
  949. return -ENOMEM;
  950. sii902x->i2c = client;
  951. sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
  952. if (IS_ERR(sii902x->regmap))
  953. return PTR_ERR(sii902x->regmap);
  954. sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
  955. GPIOD_OUT_LOW);
  956. if (IS_ERR(sii902x->reset_gpio)) {
  957. dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
  958. PTR_ERR(sii902x->reset_gpio));
  959. return PTR_ERR(sii902x->reset_gpio);
  960. }
  961. endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);
  962. if (endpoint) {
  963. struct device_node *remote = of_graph_get_remote_port_parent(endpoint);
  964. of_node_put(endpoint);
  965. if (!remote) {
  966. dev_err(dev, "Endpoint in port@1 unconnected\n");
  967. return -ENODEV;
  968. }
  969. if (!of_device_is_available(remote)) {
  970. dev_err(dev, "port@1 remote device is disabled\n");
  971. of_node_put(remote);
  972. return -ENODEV;
  973. }
  974. sii902x->next_bridge = of_drm_find_bridge(remote);
  975. of_node_put(remote);
  976. if (!sii902x->next_bridge)
  977. return dev_err_probe(dev, -EPROBE_DEFER,
  978. "Failed to find remote bridge\n");
  979. }
  980. mutex_init(&sii902x->mutex);
  981. ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(supplies), supplies);
  982. if (ret < 0)
  983. return dev_err_probe(dev, ret, "Failed to enable supplies");
  984. return sii902x_init(sii902x);
  985. }
  986. static void sii902x_remove(struct i2c_client *client)
  987. {
  988. struct sii902x *sii902x = i2c_get_clientdata(client);
  989. drm_bridge_remove(&sii902x->bridge);
  990. i2c_mux_del_adapters(sii902x->i2cmux);
  991. if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
  992. platform_device_unregister(sii902x->audio.pdev);
  993. }
  994. static const struct of_device_id sii902x_dt_ids[] = {
  995. { .compatible = "sil,sii9022", },
  996. { }
  997. };
  998. MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
  999. static const struct i2c_device_id sii902x_i2c_ids[] = {
  1000. { "sii9022", 0 },
  1001. { },
  1002. };
  1003. MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
  1004. static struct i2c_driver sii902x_driver = {
  1005. .probe = sii902x_probe,
  1006. .remove = sii902x_remove,
  1007. .driver = {
  1008. .name = "sii902x",
  1009. .of_match_table = sii902x_dt_ids,
  1010. },
  1011. .id_table = sii902x_i2c_ids,
  1012. };
  1013. module_i2c_driver(sii902x_driver);
  1014. MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
  1015. MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
  1016. MODULE_LICENSE("GPL");