exynos_drm_ipp.c 25 KB

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  1. /*
  2. * Copyright (C) 2017 Samsung Electronics Co.Ltd
  3. * Authors:
  4. * Marek Szyprowski <m.szyprowski@samsung.com>
  5. *
  6. * Exynos DRM Image Post Processing (IPP) related functions
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. */
  18. #include <linux/uaccess.h>
  19. #include <drm/drm_blend.h>
  20. #include <drm/drm_file.h>
  21. #include <drm/drm_fourcc.h>
  22. #include <drm/drm_mode.h>
  23. #include <drm/exynos_drm.h>
  24. #include "exynos_drm_drv.h"
  25. #include "exynos_drm_gem.h"
  26. #include "exynos_drm_ipp.h"
  27. static int num_ipp;
  28. static LIST_HEAD(ipp_list);
  29. /**
  30. * exynos_drm_ipp_register - Register a new picture processor hardware module
  31. * @dev: DRM device
  32. * @ipp: ipp module to init
  33. * @funcs: callbacks for the new ipp object
  34. * @caps: bitmask of ipp capabilities (%DRM_EXYNOS_IPP_CAP_*)
  35. * @formats: array of supported formats
  36. * @num_formats: size of the supported formats array
  37. * @name: name (for debugging purposes)
  38. *
  39. * Initializes a ipp module.
  40. *
  41. * Returns:
  42. * Zero on success, error code on failure.
  43. */
  44. int exynos_drm_ipp_register(struct device *dev, struct exynos_drm_ipp *ipp,
  45. const struct exynos_drm_ipp_funcs *funcs, unsigned int caps,
  46. const struct exynos_drm_ipp_formats *formats,
  47. unsigned int num_formats, const char *name)
  48. {
  49. WARN_ON(!ipp);
  50. WARN_ON(!funcs);
  51. WARN_ON(!formats);
  52. WARN_ON(!num_formats);
  53. spin_lock_init(&ipp->lock);
  54. INIT_LIST_HEAD(&ipp->todo_list);
  55. init_waitqueue_head(&ipp->done_wq);
  56. ipp->dev = dev;
  57. ipp->funcs = funcs;
  58. ipp->capabilities = caps;
  59. ipp->name = name;
  60. ipp->formats = formats;
  61. ipp->num_formats = num_formats;
  62. /* ipp_list modification is serialized by component framework */
  63. list_add_tail(&ipp->head, &ipp_list);
  64. ipp->id = num_ipp++;
  65. DRM_DEV_DEBUG_DRIVER(dev, "Registered ipp %d\n", ipp->id);
  66. return 0;
  67. }
  68. /**
  69. * exynos_drm_ipp_unregister - Unregister the picture processor module
  70. * @dev: DRM device
  71. * @ipp: ipp module
  72. */
  73. void exynos_drm_ipp_unregister(struct device *dev,
  74. struct exynos_drm_ipp *ipp)
  75. {
  76. WARN_ON(ipp->task);
  77. WARN_ON(!list_empty(&ipp->todo_list));
  78. list_del(&ipp->head);
  79. }
  80. /**
  81. * exynos_drm_ipp_get_res_ioctl - enumerate all ipp modules
  82. * @dev: DRM device
  83. * @data: ioctl data
  84. * @file_priv: DRM file info
  85. *
  86. * Construct a list of ipp ids.
  87. *
  88. * Called by the user via ioctl.
  89. *
  90. * Returns:
  91. * Zero on success, negative errno on failure.
  92. */
  93. int exynos_drm_ipp_get_res_ioctl(struct drm_device *dev, void *data,
  94. struct drm_file *file_priv)
  95. {
  96. struct drm_exynos_ioctl_ipp_get_res *resp = data;
  97. struct exynos_drm_ipp *ipp;
  98. uint32_t __user *ipp_ptr = (uint32_t __user *)
  99. (unsigned long)resp->ipp_id_ptr;
  100. unsigned int count = num_ipp, copied = 0;
  101. /*
  102. * This ioctl is called twice, once to determine how much space is
  103. * needed, and the 2nd time to fill it.
  104. */
  105. if (count && resp->count_ipps >= count) {
  106. list_for_each_entry(ipp, &ipp_list, head) {
  107. if (put_user(ipp->id, ipp_ptr + copied))
  108. return -EFAULT;
  109. copied++;
  110. }
  111. }
  112. resp->count_ipps = count;
  113. return 0;
  114. }
  115. static inline struct exynos_drm_ipp *__ipp_get(uint32_t id)
  116. {
  117. struct exynos_drm_ipp *ipp;
  118. list_for_each_entry(ipp, &ipp_list, head)
  119. if (ipp->id == id)
  120. return ipp;
  121. return NULL;
  122. }
  123. /**
  124. * exynos_drm_ipp_get_caps_ioctl - get ipp module capabilities and formats
  125. * @dev: DRM device
  126. * @data: ioctl data
  127. * @file_priv: DRM file info
  128. *
  129. * Construct a structure describing ipp module capabilities.
  130. *
  131. * Called by the user via ioctl.
  132. *
  133. * Returns:
  134. * Zero on success, negative errno on failure.
  135. */
  136. int exynos_drm_ipp_get_caps_ioctl(struct drm_device *dev, void *data,
  137. struct drm_file *file_priv)
  138. {
  139. struct drm_exynos_ioctl_ipp_get_caps *resp = data;
  140. void __user *ptr = (void __user *)(unsigned long)resp->formats_ptr;
  141. struct exynos_drm_ipp *ipp;
  142. int i;
  143. ipp = __ipp_get(resp->ipp_id);
  144. if (!ipp)
  145. return -ENOENT;
  146. resp->ipp_id = ipp->id;
  147. resp->capabilities = ipp->capabilities;
  148. /*
  149. * This ioctl is called twice, once to determine how much space is
  150. * needed, and the 2nd time to fill it.
  151. */
  152. if (resp->formats_count >= ipp->num_formats) {
  153. for (i = 0; i < ipp->num_formats; i++) {
  154. struct drm_exynos_ipp_format tmp = {
  155. .fourcc = ipp->formats[i].fourcc,
  156. .type = ipp->formats[i].type,
  157. .modifier = ipp->formats[i].modifier,
  158. };
  159. if (copy_to_user(ptr, &tmp, sizeof(tmp)))
  160. return -EFAULT;
  161. ptr += sizeof(tmp);
  162. }
  163. }
  164. resp->formats_count = ipp->num_formats;
  165. return 0;
  166. }
  167. static inline const struct exynos_drm_ipp_formats *__ipp_format_get(
  168. struct exynos_drm_ipp *ipp, uint32_t fourcc,
  169. uint64_t mod, unsigned int type)
  170. {
  171. int i;
  172. for (i = 0; i < ipp->num_formats; i++) {
  173. if ((ipp->formats[i].type & type) &&
  174. ipp->formats[i].fourcc == fourcc &&
  175. ipp->formats[i].modifier == mod)
  176. return &ipp->formats[i];
  177. }
  178. return NULL;
  179. }
  180. /**
  181. * exynos_drm_ipp_get_limits_ioctl - get ipp module limits
  182. * @dev: DRM device
  183. * @data: ioctl data
  184. * @file_priv: DRM file info
  185. *
  186. * Construct a structure describing ipp module limitations for provided
  187. * picture format.
  188. *
  189. * Called by the user via ioctl.
  190. *
  191. * Returns:
  192. * Zero on success, negative errno on failure.
  193. */
  194. int exynos_drm_ipp_get_limits_ioctl(struct drm_device *dev, void *data,
  195. struct drm_file *file_priv)
  196. {
  197. struct drm_exynos_ioctl_ipp_get_limits *resp = data;
  198. void __user *ptr = (void __user *)(unsigned long)resp->limits_ptr;
  199. const struct exynos_drm_ipp_formats *format;
  200. struct exynos_drm_ipp *ipp;
  201. if (resp->type != DRM_EXYNOS_IPP_FORMAT_SOURCE &&
  202. resp->type != DRM_EXYNOS_IPP_FORMAT_DESTINATION)
  203. return -EINVAL;
  204. ipp = __ipp_get(resp->ipp_id);
  205. if (!ipp)
  206. return -ENOENT;
  207. format = __ipp_format_get(ipp, resp->fourcc, resp->modifier,
  208. resp->type);
  209. if (!format)
  210. return -EINVAL;
  211. /*
  212. * This ioctl is called twice, once to determine how much space is
  213. * needed, and the 2nd time to fill it.
  214. */
  215. if (format->num_limits && resp->limits_count >= format->num_limits)
  216. if (copy_to_user((void __user *)ptr, format->limits,
  217. sizeof(*format->limits) * format->num_limits))
  218. return -EFAULT;
  219. resp->limits_count = format->num_limits;
  220. return 0;
  221. }
  222. struct drm_pending_exynos_ipp_event {
  223. struct drm_pending_event base;
  224. struct drm_exynos_ipp_event event;
  225. };
  226. static inline struct exynos_drm_ipp_task *
  227. exynos_drm_ipp_task_alloc(struct exynos_drm_ipp *ipp)
  228. {
  229. struct exynos_drm_ipp_task *task;
  230. task = kzalloc(sizeof(*task), GFP_KERNEL);
  231. if (!task)
  232. return NULL;
  233. task->dev = ipp->dev;
  234. task->ipp = ipp;
  235. /* some defaults */
  236. task->src.rect.w = task->dst.rect.w = UINT_MAX;
  237. task->src.rect.h = task->dst.rect.h = UINT_MAX;
  238. task->transform.rotation = DRM_MODE_ROTATE_0;
  239. DRM_DEV_DEBUG_DRIVER(task->dev, "Allocated task %pK\n", task);
  240. return task;
  241. }
  242. static const struct exynos_drm_param_map {
  243. unsigned int id;
  244. unsigned int size;
  245. unsigned int offset;
  246. } exynos_drm_ipp_params_maps[] = {
  247. {
  248. DRM_EXYNOS_IPP_TASK_BUFFER | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE,
  249. sizeof(struct drm_exynos_ipp_task_buffer),
  250. offsetof(struct exynos_drm_ipp_task, src.buf),
  251. }, {
  252. DRM_EXYNOS_IPP_TASK_BUFFER |
  253. DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION,
  254. sizeof(struct drm_exynos_ipp_task_buffer),
  255. offsetof(struct exynos_drm_ipp_task, dst.buf),
  256. }, {
  257. DRM_EXYNOS_IPP_TASK_RECTANGLE | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE,
  258. sizeof(struct drm_exynos_ipp_task_rect),
  259. offsetof(struct exynos_drm_ipp_task, src.rect),
  260. }, {
  261. DRM_EXYNOS_IPP_TASK_RECTANGLE |
  262. DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION,
  263. sizeof(struct drm_exynos_ipp_task_rect),
  264. offsetof(struct exynos_drm_ipp_task, dst.rect),
  265. }, {
  266. DRM_EXYNOS_IPP_TASK_TRANSFORM,
  267. sizeof(struct drm_exynos_ipp_task_transform),
  268. offsetof(struct exynos_drm_ipp_task, transform),
  269. }, {
  270. DRM_EXYNOS_IPP_TASK_ALPHA,
  271. sizeof(struct drm_exynos_ipp_task_alpha),
  272. offsetof(struct exynos_drm_ipp_task, alpha),
  273. },
  274. };
  275. static int exynos_drm_ipp_task_set(struct exynos_drm_ipp_task *task,
  276. struct drm_exynos_ioctl_ipp_commit *arg)
  277. {
  278. const struct exynos_drm_param_map *map = exynos_drm_ipp_params_maps;
  279. void __user *params = (void __user *)(unsigned long)arg->params_ptr;
  280. unsigned int size = arg->params_size;
  281. uint32_t id;
  282. int i;
  283. while (size) {
  284. if (get_user(id, (uint32_t __user *)params))
  285. return -EFAULT;
  286. for (i = 0; i < ARRAY_SIZE(exynos_drm_ipp_params_maps); i++)
  287. if (map[i].id == id)
  288. break;
  289. if (i == ARRAY_SIZE(exynos_drm_ipp_params_maps) ||
  290. map[i].size > size)
  291. return -EINVAL;
  292. if (copy_from_user((void *)task + map[i].offset, params,
  293. map[i].size))
  294. return -EFAULT;
  295. params += map[i].size;
  296. size -= map[i].size;
  297. }
  298. DRM_DEV_DEBUG_DRIVER(task->dev,
  299. "Got task %pK configuration from userspace\n",
  300. task);
  301. return 0;
  302. }
  303. static int exynos_drm_ipp_task_setup_buffer(struct exynos_drm_ipp_buffer *buf,
  304. struct drm_file *filp)
  305. {
  306. int ret = 0;
  307. int i;
  308. /* get GEM buffers and check their size */
  309. for (i = 0; i < buf->format->num_planes; i++) {
  310. unsigned int height = (i == 0) ? buf->buf.height :
  311. DIV_ROUND_UP(buf->buf.height, buf->format->vsub);
  312. unsigned long size = height * buf->buf.pitch[i];
  313. struct exynos_drm_gem *gem = exynos_drm_gem_get(filp,
  314. buf->buf.gem_id[i]);
  315. if (!gem) {
  316. ret = -ENOENT;
  317. goto gem_free;
  318. }
  319. buf->exynos_gem[i] = gem;
  320. if (size + buf->buf.offset[i] > buf->exynos_gem[i]->size) {
  321. i++;
  322. ret = -EINVAL;
  323. goto gem_free;
  324. }
  325. buf->dma_addr[i] = buf->exynos_gem[i]->dma_addr +
  326. buf->buf.offset[i];
  327. }
  328. return 0;
  329. gem_free:
  330. while (i--) {
  331. exynos_drm_gem_put(buf->exynos_gem[i]);
  332. buf->exynos_gem[i] = NULL;
  333. }
  334. return ret;
  335. }
  336. static void exynos_drm_ipp_task_release_buf(struct exynos_drm_ipp_buffer *buf)
  337. {
  338. int i;
  339. if (!buf->exynos_gem[0])
  340. return;
  341. for (i = 0; i < buf->format->num_planes; i++)
  342. exynos_drm_gem_put(buf->exynos_gem[i]);
  343. }
  344. static void exynos_drm_ipp_task_free(struct exynos_drm_ipp *ipp,
  345. struct exynos_drm_ipp_task *task)
  346. {
  347. DRM_DEV_DEBUG_DRIVER(task->dev, "Freeing task %pK\n", task);
  348. exynos_drm_ipp_task_release_buf(&task->src);
  349. exynos_drm_ipp_task_release_buf(&task->dst);
  350. if (task->event)
  351. drm_event_cancel_free(ipp->drm_dev, &task->event->base);
  352. kfree(task);
  353. }
  354. struct drm_ipp_limit {
  355. struct drm_exynos_ipp_limit_val h;
  356. struct drm_exynos_ipp_limit_val v;
  357. };
  358. enum drm_ipp_size_id {
  359. IPP_LIMIT_BUFFER, IPP_LIMIT_AREA, IPP_LIMIT_ROTATED, IPP_LIMIT_MAX
  360. };
  361. static const enum drm_exynos_ipp_limit_type limit_id_fallback[IPP_LIMIT_MAX][4] = {
  362. [IPP_LIMIT_BUFFER] = { DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  363. [IPP_LIMIT_AREA] = { DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
  364. DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  365. [IPP_LIMIT_ROTATED] = { DRM_EXYNOS_IPP_LIMIT_SIZE_ROTATED,
  366. DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
  367. DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  368. };
  369. static inline void __limit_set_val(unsigned int *ptr, unsigned int val)
  370. {
  371. if (!*ptr)
  372. *ptr = val;
  373. }
  374. static void __get_size_limit(const struct drm_exynos_ipp_limit *limits,
  375. unsigned int num_limits, enum drm_ipp_size_id id,
  376. struct drm_ipp_limit *res)
  377. {
  378. const struct drm_exynos_ipp_limit *l = limits;
  379. int i = 0;
  380. memset(res, 0, sizeof(*res));
  381. for (i = 0; limit_id_fallback[id][i]; i++)
  382. for (l = limits; l - limits < num_limits; l++) {
  383. if (((l->type & DRM_EXYNOS_IPP_LIMIT_TYPE_MASK) !=
  384. DRM_EXYNOS_IPP_LIMIT_TYPE_SIZE) ||
  385. ((l->type & DRM_EXYNOS_IPP_LIMIT_SIZE_MASK) !=
  386. limit_id_fallback[id][i]))
  387. continue;
  388. __limit_set_val(&res->h.min, l->h.min);
  389. __limit_set_val(&res->h.max, l->h.max);
  390. __limit_set_val(&res->h.align, l->h.align);
  391. __limit_set_val(&res->v.min, l->v.min);
  392. __limit_set_val(&res->v.max, l->v.max);
  393. __limit_set_val(&res->v.align, l->v.align);
  394. }
  395. }
  396. static inline bool __align_check(unsigned int val, unsigned int align)
  397. {
  398. if (align && (val & (align - 1))) {
  399. DRM_DEBUG_DRIVER("Value %d exceeds HW limits (align %d)\n",
  400. val, align);
  401. return false;
  402. }
  403. return true;
  404. }
  405. static inline bool __size_limit_check(unsigned int val,
  406. struct drm_exynos_ipp_limit_val *l)
  407. {
  408. if ((l->min && val < l->min) || (l->max && val > l->max)) {
  409. DRM_DEBUG_DRIVER("Value %d exceeds HW limits (min %d, max %d)\n",
  410. val, l->min, l->max);
  411. return false;
  412. }
  413. return __align_check(val, l->align);
  414. }
  415. static int exynos_drm_ipp_check_size_limits(struct exynos_drm_ipp_buffer *buf,
  416. const struct drm_exynos_ipp_limit *limits, unsigned int num_limits,
  417. bool rotate, bool swap)
  418. {
  419. enum drm_ipp_size_id id = rotate ? IPP_LIMIT_ROTATED : IPP_LIMIT_AREA;
  420. struct drm_ipp_limit l;
  421. struct drm_exynos_ipp_limit_val *lh = &l.h, *lv = &l.v;
  422. int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
  423. if (!limits)
  424. return 0;
  425. __get_size_limit(limits, num_limits, IPP_LIMIT_BUFFER, &l);
  426. if (!__size_limit_check(real_width, &l.h) ||
  427. !__size_limit_check(buf->buf.height, &l.v))
  428. return -EINVAL;
  429. if (swap) {
  430. lv = &l.h;
  431. lh = &l.v;
  432. }
  433. __get_size_limit(limits, num_limits, id, &l);
  434. if (!__size_limit_check(buf->rect.w, lh) ||
  435. !__align_check(buf->rect.x, lh->align) ||
  436. !__size_limit_check(buf->rect.h, lv) ||
  437. !__align_check(buf->rect.y, lv->align))
  438. return -EINVAL;
  439. return 0;
  440. }
  441. static inline bool __scale_limit_check(unsigned int src, unsigned int dst,
  442. unsigned int min, unsigned int max)
  443. {
  444. if ((max && (dst << 16) > src * max) ||
  445. (min && (dst << 16) < src * min)) {
  446. DRM_DEBUG_DRIVER("Scale from %d to %d exceeds HW limits (ratio min %d.%05d, max %d.%05d)\n",
  447. src, dst,
  448. min >> 16, 100000 * (min & 0xffff) / (1 << 16),
  449. max >> 16, 100000 * (max & 0xffff) / (1 << 16));
  450. return false;
  451. }
  452. return true;
  453. }
  454. static int exynos_drm_ipp_check_scale_limits(
  455. struct drm_exynos_ipp_task_rect *src,
  456. struct drm_exynos_ipp_task_rect *dst,
  457. const struct drm_exynos_ipp_limit *limits,
  458. unsigned int num_limits, bool swap)
  459. {
  460. const struct drm_exynos_ipp_limit_val *lh, *lv;
  461. int dw, dh;
  462. for (; num_limits; limits++, num_limits--)
  463. if ((limits->type & DRM_EXYNOS_IPP_LIMIT_TYPE_MASK) ==
  464. DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE)
  465. break;
  466. if (!num_limits)
  467. return 0;
  468. lh = (!swap) ? &limits->h : &limits->v;
  469. lv = (!swap) ? &limits->v : &limits->h;
  470. dw = (!swap) ? dst->w : dst->h;
  471. dh = (!swap) ? dst->h : dst->w;
  472. if (!__scale_limit_check(src->w, dw, lh->min, lh->max) ||
  473. !__scale_limit_check(src->h, dh, lv->min, lv->max))
  474. return -EINVAL;
  475. return 0;
  476. }
  477. static int exynos_drm_ipp_check_format(struct exynos_drm_ipp_task *task,
  478. struct exynos_drm_ipp_buffer *buf,
  479. struct exynos_drm_ipp_buffer *src,
  480. struct exynos_drm_ipp_buffer *dst,
  481. bool rotate, bool swap)
  482. {
  483. const struct exynos_drm_ipp_formats *fmt;
  484. int ret, i;
  485. fmt = __ipp_format_get(task->ipp, buf->buf.fourcc, buf->buf.modifier,
  486. buf == src ? DRM_EXYNOS_IPP_FORMAT_SOURCE :
  487. DRM_EXYNOS_IPP_FORMAT_DESTINATION);
  488. if (!fmt) {
  489. DRM_DEV_DEBUG_DRIVER(task->dev,
  490. "Task %pK: %s format not supported\n",
  491. task, buf == src ? "src" : "dst");
  492. return -EINVAL;
  493. }
  494. /* basic checks */
  495. if (buf->buf.width == 0 || buf->buf.height == 0)
  496. return -EINVAL;
  497. buf->format = drm_format_info(buf->buf.fourcc);
  498. for (i = 0; i < buf->format->num_planes; i++) {
  499. unsigned int width = (i == 0) ? buf->buf.width :
  500. DIV_ROUND_UP(buf->buf.width, buf->format->hsub);
  501. if (buf->buf.pitch[i] == 0)
  502. buf->buf.pitch[i] = width * buf->format->cpp[i];
  503. if (buf->buf.pitch[i] < width * buf->format->cpp[i])
  504. return -EINVAL;
  505. if (!buf->buf.gem_id[i])
  506. return -ENOENT;
  507. }
  508. /* pitch for additional planes must match */
  509. if (buf->format->num_planes > 2 &&
  510. buf->buf.pitch[1] != buf->buf.pitch[2])
  511. return -EINVAL;
  512. /* check driver limits */
  513. ret = exynos_drm_ipp_check_size_limits(buf, fmt->limits,
  514. fmt->num_limits,
  515. rotate,
  516. buf == dst ? swap : false);
  517. if (ret)
  518. return ret;
  519. ret = exynos_drm_ipp_check_scale_limits(&src->rect, &dst->rect,
  520. fmt->limits,
  521. fmt->num_limits, swap);
  522. return ret;
  523. }
  524. static int exynos_drm_ipp_task_check(struct exynos_drm_ipp_task *task)
  525. {
  526. struct exynos_drm_ipp *ipp = task->ipp;
  527. struct exynos_drm_ipp_buffer *src = &task->src, *dst = &task->dst;
  528. unsigned int rotation = task->transform.rotation;
  529. int ret = 0;
  530. bool swap = drm_rotation_90_or_270(rotation);
  531. bool rotate = (rotation != DRM_MODE_ROTATE_0);
  532. bool scale = false;
  533. DRM_DEV_DEBUG_DRIVER(task->dev, "Checking task %pK\n", task);
  534. if (src->rect.w == UINT_MAX)
  535. src->rect.w = src->buf.width;
  536. if (src->rect.h == UINT_MAX)
  537. src->rect.h = src->buf.height;
  538. if (dst->rect.w == UINT_MAX)
  539. dst->rect.w = dst->buf.width;
  540. if (dst->rect.h == UINT_MAX)
  541. dst->rect.h = dst->buf.height;
  542. if (src->rect.x + src->rect.w > (src->buf.width) ||
  543. src->rect.y + src->rect.h > (src->buf.height) ||
  544. dst->rect.x + dst->rect.w > (dst->buf.width) ||
  545. dst->rect.y + dst->rect.h > (dst->buf.height)) {
  546. DRM_DEV_DEBUG_DRIVER(task->dev,
  547. "Task %pK: defined area is outside provided buffers\n",
  548. task);
  549. return -EINVAL;
  550. }
  551. if ((!swap && (src->rect.w != dst->rect.w ||
  552. src->rect.h != dst->rect.h)) ||
  553. (swap && (src->rect.w != dst->rect.h ||
  554. src->rect.h != dst->rect.w)))
  555. scale = true;
  556. if ((!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CROP) &&
  557. (src->rect.x || src->rect.y || dst->rect.x || dst->rect.y)) ||
  558. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_ROTATE) && rotate) ||
  559. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_SCALE) && scale) ||
  560. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CONVERT) &&
  561. src->buf.fourcc != dst->buf.fourcc)) {
  562. DRM_DEV_DEBUG_DRIVER(task->dev, "Task %pK: hw capabilities exceeded\n",
  563. task);
  564. return -EINVAL;
  565. }
  566. ret = exynos_drm_ipp_check_format(task, src, src, dst, rotate, swap);
  567. if (ret)
  568. return ret;
  569. ret = exynos_drm_ipp_check_format(task, dst, src, dst, false, swap);
  570. if (ret)
  571. return ret;
  572. DRM_DEV_DEBUG_DRIVER(ipp->dev, "Task %pK: all checks done.\n",
  573. task);
  574. return ret;
  575. }
  576. static int exynos_drm_ipp_task_setup_buffers(struct exynos_drm_ipp_task *task,
  577. struct drm_file *filp)
  578. {
  579. struct exynos_drm_ipp_buffer *src = &task->src, *dst = &task->dst;
  580. int ret = 0;
  581. DRM_DEV_DEBUG_DRIVER(task->dev, "Setting buffer for task %pK\n",
  582. task);
  583. ret = exynos_drm_ipp_task_setup_buffer(src, filp);
  584. if (ret) {
  585. DRM_DEV_DEBUG_DRIVER(task->dev,
  586. "Task %pK: src buffer setup failed\n",
  587. task);
  588. return ret;
  589. }
  590. ret = exynos_drm_ipp_task_setup_buffer(dst, filp);
  591. if (ret) {
  592. DRM_DEV_DEBUG_DRIVER(task->dev,
  593. "Task %pK: dst buffer setup failed\n",
  594. task);
  595. return ret;
  596. }
  597. DRM_DEV_DEBUG_DRIVER(task->dev, "Task %pK: buffers prepared.\n",
  598. task);
  599. return ret;
  600. }
  601. static int exynos_drm_ipp_event_create(struct exynos_drm_ipp_task *task,
  602. struct drm_file *file_priv, uint64_t user_data)
  603. {
  604. struct drm_pending_exynos_ipp_event *e = NULL;
  605. int ret;
  606. e = kzalloc(sizeof(*e), GFP_KERNEL);
  607. if (!e)
  608. return -ENOMEM;
  609. e->event.base.type = DRM_EXYNOS_IPP_EVENT;
  610. e->event.base.length = sizeof(e->event);
  611. e->event.user_data = user_data;
  612. ret = drm_event_reserve_init(task->ipp->drm_dev, file_priv, &e->base,
  613. &e->event.base);
  614. if (ret)
  615. goto free;
  616. task->event = e;
  617. return 0;
  618. free:
  619. kfree(e);
  620. return ret;
  621. }
  622. static void exynos_drm_ipp_event_send(struct exynos_drm_ipp_task *task)
  623. {
  624. struct timespec64 now;
  625. ktime_get_ts64(&now);
  626. task->event->event.tv_sec = now.tv_sec;
  627. task->event->event.tv_usec = now.tv_nsec / NSEC_PER_USEC;
  628. task->event->event.sequence = atomic_inc_return(&task->ipp->sequence);
  629. drm_send_event(task->ipp->drm_dev, &task->event->base);
  630. }
  631. static int exynos_drm_ipp_task_cleanup(struct exynos_drm_ipp_task *task)
  632. {
  633. int ret = task->ret;
  634. if (ret == 0 && task->event) {
  635. exynos_drm_ipp_event_send(task);
  636. /* ensure event won't be canceled on task free */
  637. task->event = NULL;
  638. }
  639. exynos_drm_ipp_task_free(task->ipp, task);
  640. return ret;
  641. }
  642. static void exynos_drm_ipp_cleanup_work(struct work_struct *work)
  643. {
  644. struct exynos_drm_ipp_task *task = container_of(work,
  645. struct exynos_drm_ipp_task, cleanup_work);
  646. exynos_drm_ipp_task_cleanup(task);
  647. }
  648. static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp);
  649. /**
  650. * exynos_drm_ipp_task_done - finish given task and set return code
  651. * @task: ipp task to finish
  652. * @ret: error code or 0 if operation has been performed successfully
  653. */
  654. void exynos_drm_ipp_task_done(struct exynos_drm_ipp_task *task, int ret)
  655. {
  656. struct exynos_drm_ipp *ipp = task->ipp;
  657. unsigned long flags;
  658. DRM_DEV_DEBUG_DRIVER(task->dev, "ipp: %d, task %pK done: %d\n",
  659. ipp->id, task, ret);
  660. spin_lock_irqsave(&ipp->lock, flags);
  661. if (ipp->task == task)
  662. ipp->task = NULL;
  663. task->flags |= DRM_EXYNOS_IPP_TASK_DONE;
  664. task->ret = ret;
  665. spin_unlock_irqrestore(&ipp->lock, flags);
  666. exynos_drm_ipp_next_task(ipp);
  667. wake_up(&ipp->done_wq);
  668. if (task->flags & DRM_EXYNOS_IPP_TASK_ASYNC) {
  669. INIT_WORK(&task->cleanup_work, exynos_drm_ipp_cleanup_work);
  670. schedule_work(&task->cleanup_work);
  671. }
  672. }
  673. static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp)
  674. {
  675. struct exynos_drm_ipp_task *task;
  676. unsigned long flags;
  677. int ret;
  678. DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, try to run new task\n",
  679. ipp->id);
  680. spin_lock_irqsave(&ipp->lock, flags);
  681. if (ipp->task || list_empty(&ipp->todo_list)) {
  682. spin_unlock_irqrestore(&ipp->lock, flags);
  683. return;
  684. }
  685. task = list_first_entry(&ipp->todo_list, struct exynos_drm_ipp_task,
  686. head);
  687. list_del_init(&task->head);
  688. ipp->task = task;
  689. spin_unlock_irqrestore(&ipp->lock, flags);
  690. DRM_DEV_DEBUG_DRIVER(ipp->dev,
  691. "ipp: %d, selected task %pK to run\n", ipp->id,
  692. task);
  693. ret = ipp->funcs->commit(ipp, task);
  694. if (ret)
  695. exynos_drm_ipp_task_done(task, ret);
  696. }
  697. static void exynos_drm_ipp_schedule_task(struct exynos_drm_ipp *ipp,
  698. struct exynos_drm_ipp_task *task)
  699. {
  700. unsigned long flags;
  701. spin_lock_irqsave(&ipp->lock, flags);
  702. list_add(&task->head, &ipp->todo_list);
  703. spin_unlock_irqrestore(&ipp->lock, flags);
  704. exynos_drm_ipp_next_task(ipp);
  705. }
  706. static void exynos_drm_ipp_task_abort(struct exynos_drm_ipp *ipp,
  707. struct exynos_drm_ipp_task *task)
  708. {
  709. unsigned long flags;
  710. spin_lock_irqsave(&ipp->lock, flags);
  711. if (task->flags & DRM_EXYNOS_IPP_TASK_DONE) {
  712. /* already completed task */
  713. exynos_drm_ipp_task_cleanup(task);
  714. } else if (ipp->task != task) {
  715. /* task has not been scheduled for execution yet */
  716. list_del_init(&task->head);
  717. exynos_drm_ipp_task_cleanup(task);
  718. } else {
  719. /*
  720. * currently processed task, call abort() and perform
  721. * cleanup with async worker
  722. */
  723. task->flags |= DRM_EXYNOS_IPP_TASK_ASYNC;
  724. spin_unlock_irqrestore(&ipp->lock, flags);
  725. if (ipp->funcs->abort)
  726. ipp->funcs->abort(ipp, task);
  727. return;
  728. }
  729. spin_unlock_irqrestore(&ipp->lock, flags);
  730. }
  731. /**
  732. * exynos_drm_ipp_commit_ioctl - perform image processing operation
  733. * @dev: DRM device
  734. * @data: ioctl data
  735. * @file_priv: DRM file info
  736. *
  737. * Construct a ipp task from the set of properties provided from the user
  738. * and try to schedule it to framebuffer processor hardware.
  739. *
  740. * Called by the user via ioctl.
  741. *
  742. * Returns:
  743. * Zero on success, negative errno on failure.
  744. */
  745. int exynos_drm_ipp_commit_ioctl(struct drm_device *dev, void *data,
  746. struct drm_file *file_priv)
  747. {
  748. struct drm_exynos_ioctl_ipp_commit *arg = data;
  749. struct exynos_drm_ipp *ipp;
  750. struct exynos_drm_ipp_task *task;
  751. int ret = 0;
  752. if ((arg->flags & ~DRM_EXYNOS_IPP_FLAGS) || arg->reserved)
  753. return -EINVAL;
  754. /* can't test and expect an event at the same time */
  755. if ((arg->flags & DRM_EXYNOS_IPP_FLAG_TEST_ONLY) &&
  756. (arg->flags & DRM_EXYNOS_IPP_FLAG_EVENT))
  757. return -EINVAL;
  758. ipp = __ipp_get(arg->ipp_id);
  759. if (!ipp)
  760. return -ENOENT;
  761. task = exynos_drm_ipp_task_alloc(ipp);
  762. if (!task)
  763. return -ENOMEM;
  764. ret = exynos_drm_ipp_task_set(task, arg);
  765. if (ret)
  766. goto free;
  767. ret = exynos_drm_ipp_task_check(task);
  768. if (ret)
  769. goto free;
  770. ret = exynos_drm_ipp_task_setup_buffers(task, file_priv);
  771. if (ret || arg->flags & DRM_EXYNOS_IPP_FLAG_TEST_ONLY)
  772. goto free;
  773. if (arg->flags & DRM_EXYNOS_IPP_FLAG_EVENT) {
  774. ret = exynos_drm_ipp_event_create(task, file_priv,
  775. arg->user_data);
  776. if (ret)
  777. goto free;
  778. }
  779. /*
  780. * Queue task for processing on the hardware. task object will be
  781. * then freed after exynos_drm_ipp_task_done()
  782. */
  783. if (arg->flags & DRM_EXYNOS_IPP_FLAG_NONBLOCK) {
  784. DRM_DEV_DEBUG_DRIVER(ipp->dev,
  785. "ipp: %d, nonblocking processing task %pK\n",
  786. ipp->id, task);
  787. task->flags |= DRM_EXYNOS_IPP_TASK_ASYNC;
  788. exynos_drm_ipp_schedule_task(task->ipp, task);
  789. ret = 0;
  790. } else {
  791. DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, processing task %pK\n",
  792. ipp->id, task);
  793. exynos_drm_ipp_schedule_task(ipp, task);
  794. ret = wait_event_interruptible(ipp->done_wq,
  795. task->flags & DRM_EXYNOS_IPP_TASK_DONE);
  796. if (ret)
  797. exynos_drm_ipp_task_abort(ipp, task);
  798. else
  799. ret = exynos_drm_ipp_task_cleanup(task);
  800. }
  801. return ret;
  802. free:
  803. exynos_drm_ipp_task_free(ipp, task);
  804. return ret;
  805. }