pvr_ccb.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only OR MIT
  2. /* Copyright (c) 2023 Imagination Technologies Ltd. */
  3. #include "pvr_ccb.h"
  4. #include "pvr_device.h"
  5. #include "pvr_drv.h"
  6. #include "pvr_free_list.h"
  7. #include "pvr_fw.h"
  8. #include "pvr_gem.h"
  9. #include "pvr_power.h"
  10. #include <drm/drm_managed.h>
  11. #include <linux/compiler.h>
  12. #include <linux/delay.h>
  13. #include <linux/jiffies.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/types.h>
  17. #include <linux/workqueue.h>
  18. #define RESERVE_SLOT_TIMEOUT (1 * HZ) /* 1s */
  19. #define RESERVE_SLOT_MIN_RETRIES 10
  20. static void
  21. ccb_ctrl_init(void *cpu_ptr, void *priv)
  22. {
  23. struct rogue_fwif_ccb_ctl *ctrl = cpu_ptr;
  24. struct pvr_ccb *pvr_ccb = priv;
  25. ctrl->write_offset = 0;
  26. ctrl->read_offset = 0;
  27. ctrl->wrap_mask = pvr_ccb->num_cmds - 1;
  28. ctrl->cmd_size = pvr_ccb->cmd_size;
  29. }
  30. /**
  31. * pvr_ccb_init() - Initialise a CCB
  32. * @pvr_dev: Device pointer.
  33. * @pvr_ccb: Pointer to CCB structure to initialise.
  34. * @num_cmds_log2: Log2 of number of commands in this CCB.
  35. * @cmd_size: Command size for this CCB.
  36. *
  37. * Return:
  38. * * Zero on success, or
  39. * * Any error code returned by pvr_fw_object_create_and_map().
  40. */
  41. static int
  42. pvr_ccb_init(struct pvr_device *pvr_dev, struct pvr_ccb *pvr_ccb,
  43. u32 num_cmds_log2, size_t cmd_size)
  44. {
  45. u32 num_cmds = 1 << num_cmds_log2;
  46. u32 ccb_size = num_cmds * cmd_size;
  47. int err;
  48. pvr_ccb->num_cmds = num_cmds;
  49. pvr_ccb->cmd_size = cmd_size;
  50. err = drmm_mutex_init(from_pvr_device(pvr_dev), &pvr_ccb->lock);
  51. if (err)
  52. return err;
  53. /*
  54. * Map CCB and control structure as uncached, so we don't have to flush
  55. * CPU cache repeatedly when polling for space.
  56. */
  57. pvr_ccb->ctrl = pvr_fw_object_create_and_map(pvr_dev, sizeof(*pvr_ccb->ctrl),
  58. PVR_BO_FW_FLAGS_DEVICE_UNCACHED,
  59. ccb_ctrl_init, pvr_ccb, &pvr_ccb->ctrl_obj);
  60. if (IS_ERR(pvr_ccb->ctrl))
  61. return PTR_ERR(pvr_ccb->ctrl);
  62. pvr_ccb->ccb = pvr_fw_object_create_and_map(pvr_dev, ccb_size,
  63. PVR_BO_FW_FLAGS_DEVICE_UNCACHED,
  64. NULL, NULL, &pvr_ccb->ccb_obj);
  65. if (IS_ERR(pvr_ccb->ccb)) {
  66. err = PTR_ERR(pvr_ccb->ccb);
  67. goto err_free_ctrl;
  68. }
  69. pvr_fw_object_get_fw_addr(pvr_ccb->ctrl_obj, &pvr_ccb->ctrl_fw_addr);
  70. pvr_fw_object_get_fw_addr(pvr_ccb->ccb_obj, &pvr_ccb->ccb_fw_addr);
  71. WRITE_ONCE(pvr_ccb->ctrl->write_offset, 0);
  72. WRITE_ONCE(pvr_ccb->ctrl->read_offset, 0);
  73. WRITE_ONCE(pvr_ccb->ctrl->wrap_mask, num_cmds - 1);
  74. WRITE_ONCE(pvr_ccb->ctrl->cmd_size, cmd_size);
  75. return 0;
  76. err_free_ctrl:
  77. pvr_fw_object_unmap_and_destroy(pvr_ccb->ctrl_obj);
  78. return err;
  79. }
  80. /**
  81. * pvr_ccb_fini() - Release CCB structure
  82. * @pvr_ccb: CCB to release.
  83. */
  84. void
  85. pvr_ccb_fini(struct pvr_ccb *pvr_ccb)
  86. {
  87. pvr_fw_object_unmap_and_destroy(pvr_ccb->ccb_obj);
  88. pvr_fw_object_unmap_and_destroy(pvr_ccb->ctrl_obj);
  89. }
  90. /**
  91. * pvr_ccb_slot_available_locked() - Test whether any slots are available in CCB
  92. * @pvr_ccb: CCB to test.
  93. * @write_offset: Address to store number of next available slot. May be %NULL.
  94. *
  95. * Caller must hold @pvr_ccb->lock.
  96. *
  97. * Return:
  98. * * %true if a slot is available, or
  99. * * %false if no slot is available.
  100. */
  101. static __always_inline bool
  102. pvr_ccb_slot_available_locked(struct pvr_ccb *pvr_ccb, u32 *write_offset)
  103. {
  104. struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;
  105. u32 next_write_offset = (READ_ONCE(ctrl->write_offset) + 1) & READ_ONCE(ctrl->wrap_mask);
  106. lockdep_assert_held(&pvr_ccb->lock);
  107. if (READ_ONCE(ctrl->read_offset) != next_write_offset) {
  108. if (write_offset)
  109. *write_offset = next_write_offset;
  110. return true;
  111. }
  112. return false;
  113. }
  114. static void
  115. process_fwccb_command(struct pvr_device *pvr_dev, struct rogue_fwif_fwccb_cmd *cmd)
  116. {
  117. switch (cmd->cmd_type) {
  118. case ROGUE_FWIF_FWCCB_CMD_REQUEST_GPU_RESTART:
  119. pvr_power_reset(pvr_dev, false);
  120. break;
  121. case ROGUE_FWIF_FWCCB_CMD_FREELISTS_RECONSTRUCTION:
  122. pvr_free_list_process_reconstruct_req(pvr_dev,
  123. &cmd->cmd_data.cmd_freelists_reconstruction);
  124. break;
  125. case ROGUE_FWIF_FWCCB_CMD_FREELIST_GROW:
  126. pvr_free_list_process_grow_req(pvr_dev, &cmd->cmd_data.cmd_free_list_gs);
  127. break;
  128. default:
  129. drm_info(from_pvr_device(pvr_dev), "Received unknown FWCCB command %x\n",
  130. cmd->cmd_type);
  131. break;
  132. }
  133. }
  134. /**
  135. * pvr_fwccb_process() - Process any pending FWCCB commands
  136. * @pvr_dev: Target PowerVR device
  137. */
  138. void pvr_fwccb_process(struct pvr_device *pvr_dev)
  139. {
  140. struct rogue_fwif_fwccb_cmd *fwccb = pvr_dev->fwccb.ccb;
  141. struct rogue_fwif_ccb_ctl *ctrl = pvr_dev->fwccb.ctrl;
  142. u32 read_offset;
  143. mutex_lock(&pvr_dev->fwccb.lock);
  144. while ((read_offset = READ_ONCE(ctrl->read_offset)) != READ_ONCE(ctrl->write_offset)) {
  145. struct rogue_fwif_fwccb_cmd cmd = fwccb[read_offset];
  146. WRITE_ONCE(ctrl->read_offset, (read_offset + 1) & READ_ONCE(ctrl->wrap_mask));
  147. /* Drop FWCCB lock while we process command. */
  148. mutex_unlock(&pvr_dev->fwccb.lock);
  149. process_fwccb_command(pvr_dev, &cmd);
  150. mutex_lock(&pvr_dev->fwccb.lock);
  151. }
  152. mutex_unlock(&pvr_dev->fwccb.lock);
  153. }
  154. /**
  155. * pvr_kccb_capacity() - Returns the maximum number of usable KCCB slots.
  156. * @pvr_dev: Target PowerVR device
  157. *
  158. * Return:
  159. * * The maximum number of active slots.
  160. */
  161. static u32 pvr_kccb_capacity(struct pvr_device *pvr_dev)
  162. {
  163. /* Capacity is the number of slot minus one to cope with the wrapping
  164. * mechanisms. If we were to use all slots, we might end up with
  165. * read_offset == write_offset, which the FW considers as a KCCB-is-empty
  166. * condition.
  167. */
  168. return pvr_dev->kccb.slot_count - 1;
  169. }
  170. /**
  171. * pvr_kccb_used_slot_count_locked() - Get the number of used slots
  172. * @pvr_dev: Device pointer.
  173. *
  174. * KCCB lock must be held.
  175. *
  176. * Return:
  177. * * The number of slots currently used.
  178. */
  179. static u32
  180. pvr_kccb_used_slot_count_locked(struct pvr_device *pvr_dev)
  181. {
  182. struct pvr_ccb *pvr_ccb = &pvr_dev->kccb.ccb;
  183. struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;
  184. u32 wr_offset = READ_ONCE(ctrl->write_offset);
  185. u32 rd_offset = READ_ONCE(ctrl->read_offset);
  186. u32 used_count;
  187. lockdep_assert_held(&pvr_ccb->lock);
  188. if (wr_offset >= rd_offset)
  189. used_count = wr_offset - rd_offset;
  190. else
  191. used_count = wr_offset + pvr_dev->kccb.slot_count - rd_offset;
  192. return used_count;
  193. }
  194. /**
  195. * pvr_kccb_send_cmd_reserved_powered() - Send command to the KCCB, with the PM ref
  196. * held and a slot pre-reserved
  197. * @pvr_dev: Device pointer.
  198. * @cmd: Command to sent.
  199. * @kccb_slot: Address to store the KCCB slot for this command. May be %NULL.
  200. */
  201. void
  202. pvr_kccb_send_cmd_reserved_powered(struct pvr_device *pvr_dev,
  203. struct rogue_fwif_kccb_cmd *cmd,
  204. u32 *kccb_slot)
  205. {
  206. struct pvr_ccb *pvr_ccb = &pvr_dev->kccb.ccb;
  207. struct rogue_fwif_kccb_cmd *kccb = pvr_ccb->ccb;
  208. struct rogue_fwif_ccb_ctl *ctrl = pvr_ccb->ctrl;
  209. u32 old_write_offset;
  210. u32 new_write_offset;
  211. WARN_ON(pvr_dev->lost);
  212. mutex_lock(&pvr_ccb->lock);
  213. if (WARN_ON(!pvr_dev->kccb.reserved_count))
  214. goto out_unlock;
  215. old_write_offset = READ_ONCE(ctrl->write_offset);
  216. /* We reserved the slot, we should have one available. */
  217. if (WARN_ON(!pvr_ccb_slot_available_locked(pvr_ccb, &new_write_offset)))
  218. goto out_unlock;
  219. memcpy(&kccb[old_write_offset], cmd,
  220. sizeof(struct rogue_fwif_kccb_cmd));
  221. if (kccb_slot) {
  222. *kccb_slot = old_write_offset;
  223. /* Clear return status for this slot. */
  224. WRITE_ONCE(pvr_dev->kccb.rtn[old_write_offset],
  225. ROGUE_FWIF_KCCB_RTN_SLOT_NO_RESPONSE);
  226. }
  227. mb(); /* memory barrier */
  228. WRITE_ONCE(ctrl->write_offset, new_write_offset);
  229. pvr_dev->kccb.reserved_count--;
  230. /* Kick MTS */
  231. pvr_fw_mts_schedule(pvr_dev,
  232. PVR_FWIF_DM_GP & ~ROGUE_CR_MTS_SCHEDULE_DM_CLRMSK);
  233. out_unlock:
  234. mutex_unlock(&pvr_ccb->lock);
  235. }
  236. /**
  237. * pvr_kccb_try_reserve_slot() - Try to reserve a KCCB slot
  238. * @pvr_dev: Device pointer.
  239. *
  240. * Return:
  241. * * true if a KCCB slot was reserved, or
  242. * * false otherwise.
  243. */
  244. static bool pvr_kccb_try_reserve_slot(struct pvr_device *pvr_dev)
  245. {
  246. bool reserved = false;
  247. u32 used_count;
  248. mutex_lock(&pvr_dev->kccb.ccb.lock);
  249. used_count = pvr_kccb_used_slot_count_locked(pvr_dev);
  250. if (pvr_dev->kccb.reserved_count < pvr_kccb_capacity(pvr_dev) - used_count) {
  251. pvr_dev->kccb.reserved_count++;
  252. reserved = true;
  253. }
  254. mutex_unlock(&pvr_dev->kccb.ccb.lock);
  255. return reserved;
  256. }
  257. /**
  258. * pvr_kccb_reserve_slot_sync() - Try to reserve a slot synchronously
  259. * @pvr_dev: Device pointer.
  260. *
  261. * Return:
  262. * * 0 on success, or
  263. * * -EBUSY if no slots were reserved after %RESERVE_SLOT_TIMEOUT, with a minimum of
  264. * %RESERVE_SLOT_MIN_RETRIES retries.
  265. */
  266. static int pvr_kccb_reserve_slot_sync(struct pvr_device *pvr_dev)
  267. {
  268. unsigned long start_timestamp = jiffies;
  269. bool reserved = false;
  270. u32 retries = 0;
  271. while (time_before(jiffies, start_timestamp + RESERVE_SLOT_TIMEOUT) ||
  272. retries < RESERVE_SLOT_MIN_RETRIES) {
  273. reserved = pvr_kccb_try_reserve_slot(pvr_dev);
  274. if (reserved)
  275. break;
  276. usleep_range(1, 50);
  277. if (retries < U32_MAX)
  278. retries++;
  279. }
  280. return reserved ? 0 : -EBUSY;
  281. }
  282. /**
  283. * pvr_kccb_send_cmd_powered() - Send command to the KCCB, with a PM ref held
  284. * @pvr_dev: Device pointer.
  285. * @cmd: Command to sent.
  286. * @kccb_slot: Address to store the KCCB slot for this command. May be %NULL.
  287. *
  288. * Returns:
  289. * * Zero on success, or
  290. * * -EBUSY if timeout while waiting for a free KCCB slot.
  291. */
  292. int
  293. pvr_kccb_send_cmd_powered(struct pvr_device *pvr_dev, struct rogue_fwif_kccb_cmd *cmd,
  294. u32 *kccb_slot)
  295. {
  296. int err;
  297. err = pvr_kccb_reserve_slot_sync(pvr_dev);
  298. if (err)
  299. return err;
  300. pvr_kccb_send_cmd_reserved_powered(pvr_dev, cmd, kccb_slot);
  301. return 0;
  302. }
  303. /**
  304. * pvr_kccb_send_cmd() - Send command to the KCCB
  305. * @pvr_dev: Device pointer.
  306. * @cmd: Command to sent.
  307. * @kccb_slot: Address to store the KCCB slot for this command. May be %NULL.
  308. *
  309. * Returns:
  310. * * Zero on success, or
  311. * * -EBUSY if timeout while waiting for a free KCCB slot.
  312. */
  313. int
  314. pvr_kccb_send_cmd(struct pvr_device *pvr_dev, struct rogue_fwif_kccb_cmd *cmd,
  315. u32 *kccb_slot)
  316. {
  317. int err;
  318. err = pvr_power_get(pvr_dev);
  319. if (err)
  320. return err;
  321. err = pvr_kccb_send_cmd_powered(pvr_dev, cmd, kccb_slot);
  322. pvr_power_put(pvr_dev);
  323. return err;
  324. }
  325. /**
  326. * pvr_kccb_wait_for_completion() - Wait for a KCCB command to complete
  327. * @pvr_dev: Device pointer.
  328. * @slot_nr: KCCB slot to wait on.
  329. * @timeout: Timeout length (in jiffies).
  330. * @rtn_out: Location to store KCCB command result. May be %NULL.
  331. *
  332. * Returns:
  333. * * Zero on success, or
  334. * * -ETIMEDOUT on timeout.
  335. */
  336. int
  337. pvr_kccb_wait_for_completion(struct pvr_device *pvr_dev, u32 slot_nr,
  338. u32 timeout, u32 *rtn_out)
  339. {
  340. int ret = wait_event_timeout(pvr_dev->kccb.rtn_q, READ_ONCE(pvr_dev->kccb.rtn[slot_nr]) &
  341. ROGUE_FWIF_KCCB_RTN_SLOT_CMD_EXECUTED, timeout);
  342. if (ret && rtn_out)
  343. *rtn_out = READ_ONCE(pvr_dev->kccb.rtn[slot_nr]);
  344. return ret ? 0 : -ETIMEDOUT;
  345. }
  346. /**
  347. * pvr_kccb_is_idle() - Returns whether the device's KCCB is idle
  348. * @pvr_dev: Device pointer
  349. *
  350. * Returns:
  351. * * %true if the KCCB is idle (contains no commands), or
  352. * * %false if the KCCB contains pending commands.
  353. */
  354. bool
  355. pvr_kccb_is_idle(struct pvr_device *pvr_dev)
  356. {
  357. struct rogue_fwif_ccb_ctl *ctrl = pvr_dev->kccb.ccb.ctrl;
  358. bool idle;
  359. mutex_lock(&pvr_dev->kccb.ccb.lock);
  360. idle = (READ_ONCE(ctrl->write_offset) == READ_ONCE(ctrl->read_offset));
  361. mutex_unlock(&pvr_dev->kccb.ccb.lock);
  362. return idle;
  363. }
  364. static const char *
  365. pvr_kccb_fence_get_driver_name(struct dma_fence *f)
  366. {
  367. return PVR_DRIVER_NAME;
  368. }
  369. static const char *
  370. pvr_kccb_fence_get_timeline_name(struct dma_fence *f)
  371. {
  372. return "kccb";
  373. }
  374. static const struct dma_fence_ops pvr_kccb_fence_ops = {
  375. .get_driver_name = pvr_kccb_fence_get_driver_name,
  376. .get_timeline_name = pvr_kccb_fence_get_timeline_name,
  377. };
  378. /**
  379. * struct pvr_kccb_fence - Fence object used to wait for a KCCB slot
  380. */
  381. struct pvr_kccb_fence {
  382. /** @base: Base dma_fence object. */
  383. struct dma_fence base;
  384. /** @node: Node used to insert the fence in the pvr_device::kccb::waiters list. */
  385. struct list_head node;
  386. };
  387. /**
  388. * pvr_kccb_wake_up_waiters() - Check the KCCB waiters
  389. * @pvr_dev: Target PowerVR device
  390. *
  391. * Signal as many KCCB fences as we have slots available.
  392. */
  393. void pvr_kccb_wake_up_waiters(struct pvr_device *pvr_dev)
  394. {
  395. struct pvr_kccb_fence *fence, *tmp_fence;
  396. u32 used_count, available_count;
  397. /* Wake up those waiting for KCCB slot execution. */
  398. wake_up_all(&pvr_dev->kccb.rtn_q);
  399. /* Then iterate over all KCCB fences and signal as many as we can. */
  400. mutex_lock(&pvr_dev->kccb.ccb.lock);
  401. used_count = pvr_kccb_used_slot_count_locked(pvr_dev);
  402. if (WARN_ON(used_count + pvr_dev->kccb.reserved_count > pvr_kccb_capacity(pvr_dev)))
  403. goto out_unlock;
  404. available_count = pvr_kccb_capacity(pvr_dev) - used_count - pvr_dev->kccb.reserved_count;
  405. list_for_each_entry_safe(fence, tmp_fence, &pvr_dev->kccb.waiters, node) {
  406. if (!available_count)
  407. break;
  408. list_del(&fence->node);
  409. pvr_dev->kccb.reserved_count++;
  410. available_count--;
  411. dma_fence_signal(&fence->base);
  412. dma_fence_put(&fence->base);
  413. }
  414. out_unlock:
  415. mutex_unlock(&pvr_dev->kccb.ccb.lock);
  416. }
  417. /**
  418. * pvr_kccb_fini() - Cleanup device KCCB
  419. * @pvr_dev: Target PowerVR device
  420. */
  421. void pvr_kccb_fini(struct pvr_device *pvr_dev)
  422. {
  423. pvr_ccb_fini(&pvr_dev->kccb.ccb);
  424. WARN_ON(!list_empty(&pvr_dev->kccb.waiters));
  425. WARN_ON(pvr_dev->kccb.reserved_count);
  426. }
  427. /**
  428. * pvr_kccb_init() - Initialise device KCCB
  429. * @pvr_dev: Target PowerVR device
  430. *
  431. * Returns:
  432. * * 0 on success, or
  433. * * Any error returned by pvr_ccb_init().
  434. */
  435. int
  436. pvr_kccb_init(struct pvr_device *pvr_dev)
  437. {
  438. pvr_dev->kccb.slot_count = 1 << ROGUE_FWIF_KCCB_NUMCMDS_LOG2_DEFAULT;
  439. INIT_LIST_HEAD(&pvr_dev->kccb.waiters);
  440. pvr_dev->kccb.fence_ctx.id = dma_fence_context_alloc(1);
  441. spin_lock_init(&pvr_dev->kccb.fence_ctx.lock);
  442. return pvr_ccb_init(pvr_dev, &pvr_dev->kccb.ccb,
  443. ROGUE_FWIF_KCCB_NUMCMDS_LOG2_DEFAULT,
  444. sizeof(struct rogue_fwif_kccb_cmd));
  445. }
  446. /**
  447. * pvr_kccb_fence_alloc() - Allocate a pvr_kccb_fence object
  448. *
  449. * Return:
  450. * * NULL if the allocation fails, or
  451. * * A valid dma_fence pointer otherwise.
  452. */
  453. struct dma_fence *pvr_kccb_fence_alloc(void)
  454. {
  455. struct pvr_kccb_fence *kccb_fence;
  456. kccb_fence = kzalloc(sizeof(*kccb_fence), GFP_KERNEL);
  457. if (!kccb_fence)
  458. return NULL;
  459. return &kccb_fence->base;
  460. }
  461. /**
  462. * pvr_kccb_fence_put() - Drop a KCCB fence reference
  463. * @fence: The fence to drop the reference on.
  464. *
  465. * If the fence hasn't been initialized yet, dma_fence_free() is called. This
  466. * way we have a single function taking care of both cases.
  467. */
  468. void pvr_kccb_fence_put(struct dma_fence *fence)
  469. {
  470. if (!fence)
  471. return;
  472. if (!fence->ops) {
  473. dma_fence_free(fence);
  474. } else {
  475. WARN_ON(fence->ops != &pvr_kccb_fence_ops);
  476. dma_fence_put(fence);
  477. }
  478. }
  479. /**
  480. * pvr_kccb_reserve_slot() - Reserve a KCCB slot for later use
  481. * @pvr_dev: Target PowerVR device
  482. * @f: KCCB fence object previously allocated with pvr_kccb_fence_alloc()
  483. *
  484. * Try to reserve a KCCB slot, and if there's no slot available,
  485. * initializes the fence object and queue it to the waiters list.
  486. *
  487. * If NULL is returned, that means the slot is reserved. In that case,
  488. * the @f is freed and shouldn't be accessed after that point.
  489. *
  490. * Return:
  491. * * NULL if a slot was available directly, or
  492. * * A valid dma_fence object to wait on if no slot was available.
  493. */
  494. struct dma_fence *
  495. pvr_kccb_reserve_slot(struct pvr_device *pvr_dev, struct dma_fence *f)
  496. {
  497. struct pvr_kccb_fence *fence = container_of(f, struct pvr_kccb_fence, base);
  498. struct dma_fence *out_fence = NULL;
  499. u32 used_count;
  500. mutex_lock(&pvr_dev->kccb.ccb.lock);
  501. used_count = pvr_kccb_used_slot_count_locked(pvr_dev);
  502. if (pvr_dev->kccb.reserved_count >= pvr_kccb_capacity(pvr_dev) - used_count) {
  503. dma_fence_init(&fence->base, &pvr_kccb_fence_ops,
  504. &pvr_dev->kccb.fence_ctx.lock,
  505. pvr_dev->kccb.fence_ctx.id,
  506. atomic_inc_return(&pvr_dev->kccb.fence_ctx.seqno));
  507. out_fence = dma_fence_get(&fence->base);
  508. list_add_tail(&fence->node, &pvr_dev->kccb.waiters);
  509. } else {
  510. pvr_kccb_fence_put(f);
  511. pvr_dev->kccb.reserved_count++;
  512. }
  513. mutex_unlock(&pvr_dev->kccb.ccb.lock);
  514. return out_fence;
  515. }
  516. /**
  517. * pvr_kccb_release_slot() - Release a KCCB slot reserved with
  518. * pvr_kccb_reserve_slot()
  519. * @pvr_dev: Target PowerVR device
  520. *
  521. * Should only be called if something failed after the
  522. * pvr_kccb_reserve_slot() call and you know you won't call
  523. * pvr_kccb_send_cmd_reserved().
  524. */
  525. void pvr_kccb_release_slot(struct pvr_device *pvr_dev)
  526. {
  527. mutex_lock(&pvr_dev->kccb.ccb.lock);
  528. if (!WARN_ON(!pvr_dev->kccb.reserved_count))
  529. pvr_dev->kccb.reserved_count--;
  530. mutex_unlock(&pvr_dev->kccb.ccb.lock);
  531. }
  532. /**
  533. * pvr_fwccb_init() - Initialise device FWCCB
  534. * @pvr_dev: Target PowerVR device
  535. *
  536. * Returns:
  537. * * 0 on success, or
  538. * * Any error returned by pvr_ccb_init().
  539. */
  540. int
  541. pvr_fwccb_init(struct pvr_device *pvr_dev)
  542. {
  543. return pvr_ccb_init(pvr_dev, &pvr_dev->fwccb,
  544. ROGUE_FWIF_FWCCB_NUMCMDS_LOG2,
  545. sizeof(struct rogue_fwif_fwccb_cmd));
  546. }