pvr_device.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only OR MIT
  2. /* Copyright (c) 2023 Imagination Technologies Ltd. */
  3. #include "pvr_device.h"
  4. #include "pvr_device_info.h"
  5. #include "pvr_fw.h"
  6. #include "pvr_params.h"
  7. #include "pvr_power.h"
  8. #include "pvr_queue.h"
  9. #include "pvr_rogue_cr_defs.h"
  10. #include "pvr_stream.h"
  11. #include "pvr_vm.h"
  12. #include <drm/drm_print.h>
  13. #include <linux/bitfield.h>
  14. #include <linux/clk.h>
  15. #include <linux/compiler_attributes.h>
  16. #include <linux/compiler_types.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/err.h>
  19. #include <linux/firmware.h>
  20. #include <linux/gfp.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/stddef.h>
  26. #include <linux/types.h>
  27. #include <linux/workqueue.h>
  28. /* Major number for the supported version of the firmware. */
  29. #define PVR_FW_VERSION_MAJOR 1
  30. /**
  31. * pvr_device_reg_init() - Initialize kernel access to a PowerVR device's
  32. * control registers.
  33. * @pvr_dev: Target PowerVR device.
  34. *
  35. * Sets struct pvr_device->regs.
  36. *
  37. * This method of mapping the device control registers into memory ensures that
  38. * they are unmapped when the driver is detached (i.e. no explicit cleanup is
  39. * required).
  40. *
  41. * Return:
  42. * * 0 on success, or
  43. * * Any error returned by devm_platform_ioremap_resource().
  44. */
  45. static int
  46. pvr_device_reg_init(struct pvr_device *pvr_dev)
  47. {
  48. struct drm_device *drm_dev = from_pvr_device(pvr_dev);
  49. struct platform_device *plat_dev = to_platform_device(drm_dev->dev);
  50. struct resource *regs_resource;
  51. void __iomem *regs;
  52. pvr_dev->regs_resource = NULL;
  53. pvr_dev->regs = NULL;
  54. regs = devm_platform_get_and_ioremap_resource(plat_dev, 0, &regs_resource);
  55. if (IS_ERR(regs))
  56. return dev_err_probe(drm_dev->dev, PTR_ERR(regs),
  57. "failed to ioremap gpu registers\n");
  58. pvr_dev->regs = regs;
  59. pvr_dev->regs_resource = regs_resource;
  60. return 0;
  61. }
  62. /**
  63. * pvr_device_clk_init() - Initialize clocks required by a PowerVR device
  64. * @pvr_dev: Target PowerVR device.
  65. *
  66. * Sets struct pvr_device->core_clk, struct pvr_device->sys_clk and
  67. * struct pvr_device->mem_clk.
  68. *
  69. * Three clocks are required by the PowerVR device: core, sys and mem. On
  70. * return, this function guarantees that the clocks are in one of the following
  71. * states:
  72. *
  73. * * All successfully initialized,
  74. * * Core errored, sys and mem uninitialized,
  75. * * Core deinitialized, sys errored, mem uninitialized, or
  76. * * Core and sys deinitialized, mem errored.
  77. *
  78. * Return:
  79. * * 0 on success,
  80. * * Any error returned by devm_clk_get(), or
  81. * * Any error returned by devm_clk_get_optional().
  82. */
  83. static int pvr_device_clk_init(struct pvr_device *pvr_dev)
  84. {
  85. struct drm_device *drm_dev = from_pvr_device(pvr_dev);
  86. struct clk *core_clk;
  87. struct clk *sys_clk;
  88. struct clk *mem_clk;
  89. core_clk = devm_clk_get(drm_dev->dev, "core");
  90. if (IS_ERR(core_clk))
  91. return dev_err_probe(drm_dev->dev, PTR_ERR(core_clk),
  92. "failed to get core clock\n");
  93. sys_clk = devm_clk_get_optional(drm_dev->dev, "sys");
  94. if (IS_ERR(sys_clk))
  95. return dev_err_probe(drm_dev->dev, PTR_ERR(sys_clk),
  96. "failed to get sys clock\n");
  97. mem_clk = devm_clk_get_optional(drm_dev->dev, "mem");
  98. if (IS_ERR(mem_clk))
  99. return dev_err_probe(drm_dev->dev, PTR_ERR(mem_clk),
  100. "failed to get mem clock\n");
  101. pvr_dev->core_clk = core_clk;
  102. pvr_dev->sys_clk = sys_clk;
  103. pvr_dev->mem_clk = mem_clk;
  104. return 0;
  105. }
  106. /**
  107. * pvr_device_process_active_queues() - Process all queue related events.
  108. * @pvr_dev: PowerVR device to check
  109. *
  110. * This is called any time we receive a FW event. It iterates over all
  111. * active queues and calls pvr_queue_process() on them.
  112. */
  113. static void pvr_device_process_active_queues(struct pvr_device *pvr_dev)
  114. {
  115. struct pvr_queue *queue, *tmp_queue;
  116. LIST_HEAD(active_queues);
  117. mutex_lock(&pvr_dev->queues.lock);
  118. /* Move all active queues to a temporary list. Queues that remain
  119. * active after we're done processing them are re-inserted to
  120. * the queues.active list by pvr_queue_process().
  121. */
  122. list_splice_init(&pvr_dev->queues.active, &active_queues);
  123. list_for_each_entry_safe(queue, tmp_queue, &active_queues, node)
  124. pvr_queue_process(queue);
  125. mutex_unlock(&pvr_dev->queues.lock);
  126. }
  127. static irqreturn_t pvr_device_irq_thread_handler(int irq, void *data)
  128. {
  129. struct pvr_device *pvr_dev = data;
  130. irqreturn_t ret = IRQ_NONE;
  131. /* We are in the threaded handler, we can keep dequeuing events until we
  132. * don't see any. This should allow us to reduce the number of interrupts
  133. * when the GPU is receiving a massive amount of short jobs.
  134. */
  135. while (pvr_fw_irq_pending(pvr_dev)) {
  136. pvr_fw_irq_clear(pvr_dev);
  137. if (pvr_dev->fw_dev.booted) {
  138. pvr_fwccb_process(pvr_dev);
  139. pvr_kccb_wake_up_waiters(pvr_dev);
  140. pvr_device_process_active_queues(pvr_dev);
  141. }
  142. pm_runtime_mark_last_busy(from_pvr_device(pvr_dev)->dev);
  143. ret = IRQ_HANDLED;
  144. }
  145. /* Unmask FW irqs before returning, so new interrupts can be received. */
  146. pvr_fw_irq_enable(pvr_dev);
  147. return ret;
  148. }
  149. static irqreturn_t pvr_device_irq_handler(int irq, void *data)
  150. {
  151. struct pvr_device *pvr_dev = data;
  152. if (!pvr_fw_irq_pending(pvr_dev))
  153. return IRQ_NONE; /* Spurious IRQ - ignore. */
  154. /* Mask the FW interrupts before waking up the thread. Will be unmasked
  155. * when the thread handler is done processing events.
  156. */
  157. pvr_fw_irq_disable(pvr_dev);
  158. return IRQ_WAKE_THREAD;
  159. }
  160. /**
  161. * pvr_device_irq_init() - Initialise IRQ required by a PowerVR device
  162. * @pvr_dev: Target PowerVR device.
  163. *
  164. * Returns:
  165. * * 0 on success,
  166. * * Any error returned by platform_get_irq_byname(), or
  167. * * Any error returned by request_irq().
  168. */
  169. static int
  170. pvr_device_irq_init(struct pvr_device *pvr_dev)
  171. {
  172. struct drm_device *drm_dev = from_pvr_device(pvr_dev);
  173. struct platform_device *plat_dev = to_platform_device(drm_dev->dev);
  174. init_waitqueue_head(&pvr_dev->kccb.rtn_q);
  175. pvr_dev->irq = platform_get_irq(plat_dev, 0);
  176. if (pvr_dev->irq < 0)
  177. return pvr_dev->irq;
  178. /* Clear any pending events before requesting the IRQ line. */
  179. pvr_fw_irq_clear(pvr_dev);
  180. pvr_fw_irq_enable(pvr_dev);
  181. return request_threaded_irq(pvr_dev->irq, pvr_device_irq_handler,
  182. pvr_device_irq_thread_handler,
  183. IRQF_SHARED, "gpu", pvr_dev);
  184. }
  185. /**
  186. * pvr_device_irq_fini() - Deinitialise IRQ required by a PowerVR device
  187. * @pvr_dev: Target PowerVR device.
  188. */
  189. static void
  190. pvr_device_irq_fini(struct pvr_device *pvr_dev)
  191. {
  192. free_irq(pvr_dev->irq, pvr_dev);
  193. }
  194. /**
  195. * pvr_build_firmware_filename() - Construct a PowerVR firmware filename
  196. * @pvr_dev: Target PowerVR device.
  197. * @base: First part of the filename.
  198. * @major: Major version number.
  199. *
  200. * A PowerVR firmware filename consists of three parts separated by underscores
  201. * (``'_'``) along with a '.fw' file suffix. The first part is the exact value
  202. * of @base, the second part is the hardware version string derived from @pvr_fw
  203. * and the final part is the firmware version number constructed from @major with
  204. * a 'v' prefix, e.g. powervr/rogue_4.40.2.51_v1.fw.
  205. *
  206. * The returned string will have been slab allocated and must be freed with
  207. * kfree().
  208. *
  209. * Return:
  210. * * The constructed filename on success, or
  211. * * Any error returned by kasprintf().
  212. */
  213. static char *
  214. pvr_build_firmware_filename(struct pvr_device *pvr_dev, const char *base,
  215. u8 major)
  216. {
  217. struct pvr_gpu_id *gpu_id = &pvr_dev->gpu_id;
  218. return kasprintf(GFP_KERNEL, "%s_%d.%d.%d.%d_v%d.fw", base, gpu_id->b,
  219. gpu_id->v, gpu_id->n, gpu_id->c, major);
  220. }
  221. static void
  222. pvr_release_firmware(void *data)
  223. {
  224. struct pvr_device *pvr_dev = data;
  225. release_firmware(pvr_dev->fw_dev.firmware);
  226. }
  227. /**
  228. * pvr_request_firmware() - Load firmware for a PowerVR device
  229. * @pvr_dev: Target PowerVR device.
  230. *
  231. * See pvr_build_firmware_filename() for details on firmware file naming.
  232. *
  233. * Return:
  234. * * 0 on success,
  235. * * Any error returned by pvr_build_firmware_filename(), or
  236. * * Any error returned by request_firmware().
  237. */
  238. static int
  239. pvr_request_firmware(struct pvr_device *pvr_dev)
  240. {
  241. struct drm_device *drm_dev = &pvr_dev->base;
  242. char *filename;
  243. const struct firmware *fw;
  244. int err;
  245. filename = pvr_build_firmware_filename(pvr_dev, "powervr/rogue",
  246. PVR_FW_VERSION_MAJOR);
  247. if (!filename)
  248. return -ENOMEM;
  249. /*
  250. * This function takes a copy of &filename, meaning we can free our
  251. * instance before returning.
  252. */
  253. err = request_firmware(&fw, filename, pvr_dev->base.dev);
  254. if (err) {
  255. drm_err(drm_dev, "failed to load firmware %s (err=%d)\n",
  256. filename, err);
  257. goto err_free_filename;
  258. }
  259. drm_info(drm_dev, "loaded firmware %s\n", filename);
  260. kfree(filename);
  261. pvr_dev->fw_dev.firmware = fw;
  262. return devm_add_action_or_reset(drm_dev->dev, pvr_release_firmware, pvr_dev);
  263. err_free_filename:
  264. kfree(filename);
  265. return err;
  266. }
  267. /**
  268. * pvr_load_gpu_id() - Load a PowerVR device's GPU ID (BVNC) from control registers.
  269. *
  270. * Sets struct pvr_dev.gpu_id.
  271. *
  272. * @pvr_dev: Target PowerVR device.
  273. */
  274. static void
  275. pvr_load_gpu_id(struct pvr_device *pvr_dev)
  276. {
  277. struct pvr_gpu_id *gpu_id = &pvr_dev->gpu_id;
  278. u64 bvnc;
  279. /*
  280. * Try reading the BVNC using the newer (cleaner) method first. If the
  281. * B value is zero, fall back to the older method.
  282. */
  283. bvnc = pvr_cr_read64(pvr_dev, ROGUE_CR_CORE_ID__PBVNC);
  284. gpu_id->b = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__BRANCH_ID);
  285. if (gpu_id->b != 0) {
  286. gpu_id->v = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__VERSION_ID);
  287. gpu_id->n = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__NUMBER_OF_SCALABLE_UNITS);
  288. gpu_id->c = PVR_CR_FIELD_GET(bvnc, CORE_ID__PBVNC__CONFIG_ID);
  289. } else {
  290. u32 core_rev = pvr_cr_read32(pvr_dev, ROGUE_CR_CORE_REVISION);
  291. u32 core_id = pvr_cr_read32(pvr_dev, ROGUE_CR_CORE_ID);
  292. u16 core_id_config = PVR_CR_FIELD_GET(core_id, CORE_ID_CONFIG);
  293. gpu_id->b = PVR_CR_FIELD_GET(core_rev, CORE_REVISION_MAJOR);
  294. gpu_id->v = PVR_CR_FIELD_GET(core_rev, CORE_REVISION_MINOR);
  295. gpu_id->n = FIELD_GET(0xFF00, core_id_config);
  296. gpu_id->c = FIELD_GET(0x00FF, core_id_config);
  297. }
  298. }
  299. /**
  300. * pvr_set_dma_info() - Set PowerVR device DMA information
  301. * @pvr_dev: Target PowerVR device.
  302. *
  303. * Sets the DMA mask and max segment size for the PowerVR device.
  304. *
  305. * Return:
  306. * * 0 on success,
  307. * * Any error returned by PVR_FEATURE_VALUE(), or
  308. * * Any error returned by dma_set_mask().
  309. */
  310. static int
  311. pvr_set_dma_info(struct pvr_device *pvr_dev)
  312. {
  313. struct drm_device *drm_dev = from_pvr_device(pvr_dev);
  314. u16 phys_bus_width;
  315. int err;
  316. err = PVR_FEATURE_VALUE(pvr_dev, phys_bus_width, &phys_bus_width);
  317. if (err) {
  318. drm_err(drm_dev, "Failed to get device physical bus width\n");
  319. return err;
  320. }
  321. err = dma_set_mask(drm_dev->dev, DMA_BIT_MASK(phys_bus_width));
  322. if (err) {
  323. drm_err(drm_dev, "Failed to set DMA mask (err=%d)\n", err);
  324. return err;
  325. }
  326. dma_set_max_seg_size(drm_dev->dev, UINT_MAX);
  327. return 0;
  328. }
  329. /**
  330. * pvr_device_gpu_init() - GPU-specific initialization for a PowerVR device
  331. * @pvr_dev: Target PowerVR device.
  332. *
  333. * The following steps are taken to ensure the device is ready:
  334. *
  335. * 1. Read the hardware version information from control registers,
  336. * 2. Initialise the hardware feature information,
  337. * 3. Setup the device DMA information,
  338. * 4. Setup the device-scoped memory context, and
  339. * 5. Load firmware into the device.
  340. *
  341. * Return:
  342. * * 0 on success,
  343. * * -%ENODEV if the GPU is not supported,
  344. * * Any error returned by pvr_set_dma_info(),
  345. * * Any error returned by pvr_memory_context_init(), or
  346. * * Any error returned by pvr_request_firmware().
  347. */
  348. static int
  349. pvr_device_gpu_init(struct pvr_device *pvr_dev)
  350. {
  351. int err;
  352. pvr_load_gpu_id(pvr_dev);
  353. err = pvr_request_firmware(pvr_dev);
  354. if (err)
  355. return err;
  356. err = pvr_fw_validate_init_device_info(pvr_dev);
  357. if (err)
  358. return err;
  359. if (PVR_HAS_FEATURE(pvr_dev, meta))
  360. pvr_dev->fw_dev.processor_type = PVR_FW_PROCESSOR_TYPE_META;
  361. else if (PVR_HAS_FEATURE(pvr_dev, mips))
  362. pvr_dev->fw_dev.processor_type = PVR_FW_PROCESSOR_TYPE_MIPS;
  363. else if (PVR_HAS_FEATURE(pvr_dev, riscv_fw_processor))
  364. pvr_dev->fw_dev.processor_type = PVR_FW_PROCESSOR_TYPE_RISCV;
  365. else
  366. return -EINVAL;
  367. pvr_stream_create_musthave_masks(pvr_dev);
  368. err = pvr_set_dma_info(pvr_dev);
  369. if (err)
  370. return err;
  371. if (pvr_dev->fw_dev.processor_type != PVR_FW_PROCESSOR_TYPE_MIPS) {
  372. pvr_dev->kernel_vm_ctx = pvr_vm_create_context(pvr_dev, false);
  373. if (IS_ERR(pvr_dev->kernel_vm_ctx))
  374. return PTR_ERR(pvr_dev->kernel_vm_ctx);
  375. }
  376. err = pvr_fw_init(pvr_dev);
  377. if (err)
  378. goto err_vm_ctx_put;
  379. return 0;
  380. err_vm_ctx_put:
  381. if (pvr_dev->fw_dev.processor_type != PVR_FW_PROCESSOR_TYPE_MIPS) {
  382. pvr_vm_context_put(pvr_dev->kernel_vm_ctx);
  383. pvr_dev->kernel_vm_ctx = NULL;
  384. }
  385. return err;
  386. }
  387. /**
  388. * pvr_device_gpu_fini() - GPU-specific deinitialization for a PowerVR device
  389. * @pvr_dev: Target PowerVR device.
  390. */
  391. static void
  392. pvr_device_gpu_fini(struct pvr_device *pvr_dev)
  393. {
  394. pvr_fw_fini(pvr_dev);
  395. if (pvr_dev->fw_dev.processor_type != PVR_FW_PROCESSOR_TYPE_MIPS) {
  396. WARN_ON(!pvr_vm_context_put(pvr_dev->kernel_vm_ctx));
  397. pvr_dev->kernel_vm_ctx = NULL;
  398. }
  399. }
  400. /**
  401. * pvr_device_init() - Initialize a PowerVR device
  402. * @pvr_dev: Target PowerVR device.
  403. *
  404. * If this function returns successfully, the device will have been fully
  405. * initialized. Otherwise, any parts of the device initialized before an error
  406. * occurs will be de-initialized before returning.
  407. *
  408. * NOTE: The initialization steps currently taken are the bare minimum required
  409. * to read from the control registers. The device is unlikely to function
  410. * until further initialization steps are added. [This note should be
  411. * removed when that happens.]
  412. *
  413. * Return:
  414. * * 0 on success,
  415. * * Any error returned by pvr_device_reg_init(),
  416. * * Any error returned by pvr_device_clk_init(), or
  417. * * Any error returned by pvr_device_gpu_init().
  418. */
  419. int
  420. pvr_device_init(struct pvr_device *pvr_dev)
  421. {
  422. struct drm_device *drm_dev = from_pvr_device(pvr_dev);
  423. struct device *dev = drm_dev->dev;
  424. int err;
  425. /*
  426. * Setup device parameters. We do this first in case other steps
  427. * depend on them.
  428. */
  429. err = pvr_device_params_init(&pvr_dev->params);
  430. if (err)
  431. return err;
  432. /* Enable and initialize clocks required for the device to operate. */
  433. err = pvr_device_clk_init(pvr_dev);
  434. if (err)
  435. return err;
  436. /* Explicitly power the GPU so we can access control registers before the FW is booted. */
  437. err = pm_runtime_resume_and_get(dev);
  438. if (err)
  439. return err;
  440. /* Map the control registers into memory. */
  441. err = pvr_device_reg_init(pvr_dev);
  442. if (err)
  443. goto err_pm_runtime_put;
  444. /* Perform GPU-specific initialization steps. */
  445. err = pvr_device_gpu_init(pvr_dev);
  446. if (err)
  447. goto err_pm_runtime_put;
  448. err = pvr_device_irq_init(pvr_dev);
  449. if (err)
  450. goto err_device_gpu_fini;
  451. pm_runtime_put(dev);
  452. return 0;
  453. err_device_gpu_fini:
  454. pvr_device_gpu_fini(pvr_dev);
  455. err_pm_runtime_put:
  456. pm_runtime_put_sync_suspend(dev);
  457. return err;
  458. }
  459. /**
  460. * pvr_device_fini() - Deinitialize a PowerVR device
  461. * @pvr_dev: Target PowerVR device.
  462. */
  463. void
  464. pvr_device_fini(struct pvr_device *pvr_dev)
  465. {
  466. /*
  467. * Deinitialization stages are performed in reverse order compared to
  468. * the initialization stages in pvr_device_init().
  469. */
  470. pvr_device_irq_fini(pvr_dev);
  471. pvr_device_gpu_fini(pvr_dev);
  472. }
  473. bool
  474. pvr_device_has_uapi_quirk(struct pvr_device *pvr_dev, u32 quirk)
  475. {
  476. switch (quirk) {
  477. case 47217:
  478. return PVR_HAS_QUIRK(pvr_dev, 47217);
  479. case 48545:
  480. return PVR_HAS_QUIRK(pvr_dev, 48545);
  481. case 49927:
  482. return PVR_HAS_QUIRK(pvr_dev, 49927);
  483. case 51764:
  484. return PVR_HAS_QUIRK(pvr_dev, 51764);
  485. case 62269:
  486. return PVR_HAS_QUIRK(pvr_dev, 62269);
  487. default:
  488. return false;
  489. };
  490. }
  491. bool
  492. pvr_device_has_uapi_enhancement(struct pvr_device *pvr_dev, u32 enhancement)
  493. {
  494. switch (enhancement) {
  495. case 35421:
  496. return PVR_HAS_ENHANCEMENT(pvr_dev, 35421);
  497. case 42064:
  498. return PVR_HAS_ENHANCEMENT(pvr_dev, 42064);
  499. default:
  500. return false;
  501. };
  502. }
  503. /**
  504. * pvr_device_has_feature() - Look up device feature based on feature definition
  505. * @pvr_dev: Device pointer.
  506. * @feature: Feature to look up. Should be one of %PVR_FEATURE_*.
  507. *
  508. * Returns:
  509. * * %true if feature is present on device, or
  510. * * %false if feature is not present on device.
  511. */
  512. bool
  513. pvr_device_has_feature(struct pvr_device *pvr_dev, u32 feature)
  514. {
  515. switch (feature) {
  516. case PVR_FEATURE_CLUSTER_GROUPING:
  517. return PVR_HAS_FEATURE(pvr_dev, cluster_grouping);
  518. case PVR_FEATURE_COMPUTE_MORTON_CAPABLE:
  519. return PVR_HAS_FEATURE(pvr_dev, compute_morton_capable);
  520. case PVR_FEATURE_FB_CDC_V4:
  521. return PVR_HAS_FEATURE(pvr_dev, fb_cdc_v4);
  522. case PVR_FEATURE_GPU_MULTICORE_SUPPORT:
  523. return PVR_HAS_FEATURE(pvr_dev, gpu_multicore_support);
  524. case PVR_FEATURE_ISP_ZLS_D24_S8_PACKING_OGL_MODE:
  525. return PVR_HAS_FEATURE(pvr_dev, isp_zls_d24_s8_packing_ogl_mode);
  526. case PVR_FEATURE_S7_TOP_INFRASTRUCTURE:
  527. return PVR_HAS_FEATURE(pvr_dev, s7_top_infrastructure);
  528. case PVR_FEATURE_TESSELLATION:
  529. return PVR_HAS_FEATURE(pvr_dev, tessellation);
  530. case PVR_FEATURE_TPU_DM_GLOBAL_REGISTERS:
  531. return PVR_HAS_FEATURE(pvr_dev, tpu_dm_global_registers);
  532. case PVR_FEATURE_VDM_DRAWINDIRECT:
  533. return PVR_HAS_FEATURE(pvr_dev, vdm_drawindirect);
  534. case PVR_FEATURE_VDM_OBJECT_LEVEL_LLS:
  535. return PVR_HAS_FEATURE(pvr_dev, vdm_object_level_lls);
  536. case PVR_FEATURE_ZLS_SUBTILE:
  537. return PVR_HAS_FEATURE(pvr_dev, zls_subtile);
  538. /* Derived features. */
  539. case PVR_FEATURE_CDM_USER_MODE_QUEUE: {
  540. u8 cdm_control_stream_format = 0;
  541. PVR_FEATURE_VALUE(pvr_dev, cdm_control_stream_format, &cdm_control_stream_format);
  542. return (cdm_control_stream_format >= 2 && cdm_control_stream_format <= 4);
  543. }
  544. case PVR_FEATURE_REQUIRES_FB_CDC_ZLS_SETUP:
  545. if (PVR_HAS_FEATURE(pvr_dev, fbcdc_algorithm)) {
  546. u8 fbcdc_algorithm = 0;
  547. PVR_FEATURE_VALUE(pvr_dev, fbcdc_algorithm, &fbcdc_algorithm);
  548. return (fbcdc_algorithm < 3 || PVR_HAS_FEATURE(pvr_dev, fb_cdc_v4));
  549. }
  550. return false;
  551. default:
  552. WARN(true, "Looking up undefined feature %u\n", feature);
  553. return false;
  554. }
  555. }