pvr_fw_mips.h 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
  2. /* Copyright (c) 2023 Imagination Technologies Ltd. */
  3. #ifndef PVR_FW_MIPS_H
  4. #define PVR_FW_MIPS_H
  5. #include "pvr_rogue_mips.h"
  6. #include <asm/page.h>
  7. #include <linux/math.h>
  8. #include <linux/types.h>
  9. /* Forward declaration from pvr_gem.h. */
  10. struct pvr_gem_object;
  11. #define PVR_MIPS_PT_PAGE_COUNT DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)
  12. /**
  13. * struct pvr_fw_mips_data - MIPS-specific data
  14. */
  15. struct pvr_fw_mips_data {
  16. /**
  17. * @pt_pages: Pages containing MIPS pagetable.
  18. */
  19. struct page *pt_pages[PVR_MIPS_PT_PAGE_COUNT];
  20. /** @pt: Pointer to CPU mapping of MIPS pagetable. */
  21. u32 *pt;
  22. /** @pt_dma_addr: DMA mappings of MIPS pagetable. */
  23. dma_addr_t pt_dma_addr[PVR_MIPS_PT_PAGE_COUNT];
  24. /** @boot_code_dma_addr: DMA address of MIPS boot code. */
  25. dma_addr_t boot_code_dma_addr;
  26. /** @boot_data_dma_addr: DMA address of MIPS boot data. */
  27. dma_addr_t boot_data_dma_addr;
  28. /** @exception_code_dma_addr: DMA address of MIPS exception code. */
  29. dma_addr_t exception_code_dma_addr;
  30. /** @cache_policy: Cache policy for this processor. */
  31. u32 cache_policy;
  32. /** @pfn_mask: PFN mask for MIPS pagetable. */
  33. u32 pfn_mask;
  34. };
  35. #endif /* PVR_FW_MIPS_H */