lsdc_drv.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2023 Loongson Technology Corporation Limited
  4. */
  5. #include <linux/pci.h>
  6. #include <linux/vgaarb.h>
  7. #include <drm/drm_aperture.h>
  8. #include <drm/drm_atomic.h>
  9. #include <drm/drm_atomic_helper.h>
  10. #include <drm/drm_drv.h>
  11. #include <drm/drm_fbdev_ttm.h>
  12. #include <drm/drm_gem_framebuffer_helper.h>
  13. #include <drm/drm_ioctl.h>
  14. #include <drm/drm_modeset_helper.h>
  15. #include <drm/drm_probe_helper.h>
  16. #include <drm/drm_vblank.h>
  17. #include "loongson_module.h"
  18. #include "lsdc_drv.h"
  19. #include "lsdc_gem.h"
  20. #include "lsdc_ttm.h"
  21. #define DRIVER_AUTHOR "Sui Jingfeng <suijingfeng@loongson.cn>"
  22. #define DRIVER_NAME "loongson"
  23. #define DRIVER_DESC "drm driver for loongson graphics"
  24. #define DRIVER_DATE "20220701"
  25. #define DRIVER_MAJOR 1
  26. #define DRIVER_MINOR 0
  27. #define DRIVER_PATCHLEVEL 0
  28. DEFINE_DRM_GEM_FOPS(lsdc_gem_fops);
  29. static const struct drm_driver lsdc_drm_driver = {
  30. .driver_features = DRIVER_MODESET | DRIVER_RENDER | DRIVER_GEM | DRIVER_ATOMIC,
  31. .fops = &lsdc_gem_fops,
  32. .name = DRIVER_NAME,
  33. .desc = DRIVER_DESC,
  34. .date = DRIVER_DATE,
  35. .major = DRIVER_MAJOR,
  36. .minor = DRIVER_MINOR,
  37. .patchlevel = DRIVER_PATCHLEVEL,
  38. .debugfs_init = lsdc_debugfs_init,
  39. .dumb_create = lsdc_dumb_create,
  40. .dumb_map_offset = lsdc_dumb_map_offset,
  41. .gem_prime_import_sg_table = lsdc_prime_import_sg_table,
  42. };
  43. static const struct drm_mode_config_funcs lsdc_mode_config_funcs = {
  44. .fb_create = drm_gem_fb_create,
  45. .atomic_check = drm_atomic_helper_check,
  46. .atomic_commit = drm_atomic_helper_commit,
  47. };
  48. /* Display related */
  49. static int lsdc_modeset_init(struct lsdc_device *ldev,
  50. unsigned int num_crtc,
  51. const struct lsdc_kms_funcs *funcs,
  52. bool has_vblank)
  53. {
  54. struct drm_device *ddev = &ldev->base;
  55. struct lsdc_display_pipe *dispipe;
  56. unsigned int i;
  57. int ret;
  58. for (i = 0; i < num_crtc; i++) {
  59. dispipe = &ldev->dispipe[i];
  60. /* We need an index before crtc is initialized */
  61. dispipe->index = i;
  62. ret = funcs->create_i2c(ddev, dispipe, i);
  63. if (ret)
  64. return ret;
  65. }
  66. for (i = 0; i < num_crtc; i++) {
  67. struct i2c_adapter *ddc = NULL;
  68. dispipe = &ldev->dispipe[i];
  69. if (dispipe->li2c)
  70. ddc = &dispipe->li2c->adapter;
  71. ret = funcs->output_init(ddev, dispipe, ddc, i);
  72. if (ret)
  73. return ret;
  74. ldev->num_output++;
  75. }
  76. for (i = 0; i < num_crtc; i++) {
  77. dispipe = &ldev->dispipe[i];
  78. ret = funcs->primary_plane_init(ddev, &dispipe->primary.base, i);
  79. if (ret)
  80. return ret;
  81. ret = funcs->cursor_plane_init(ddev, &dispipe->cursor.base, i);
  82. if (ret)
  83. return ret;
  84. ret = funcs->crtc_init(ddev, &dispipe->crtc.base,
  85. &dispipe->primary.base,
  86. &dispipe->cursor.base,
  87. i, has_vblank);
  88. if (ret)
  89. return ret;
  90. }
  91. drm_info(ddev, "Total %u outputs\n", ldev->num_output);
  92. return 0;
  93. }
  94. static const struct drm_mode_config_helper_funcs lsdc_mode_config_helper_funcs = {
  95. .atomic_commit_tail = drm_atomic_helper_commit_tail,
  96. };
  97. static int lsdc_mode_config_init(struct drm_device *ddev,
  98. const struct lsdc_desc *descp)
  99. {
  100. int ret;
  101. ret = drmm_mode_config_init(ddev);
  102. if (ret)
  103. return ret;
  104. ddev->mode_config.funcs = &lsdc_mode_config_funcs;
  105. ddev->mode_config.min_width = 1;
  106. ddev->mode_config.min_height = 1;
  107. ddev->mode_config.max_width = descp->max_width * LSDC_NUM_CRTC;
  108. ddev->mode_config.max_height = descp->max_height * LSDC_NUM_CRTC;
  109. ddev->mode_config.preferred_depth = 24;
  110. ddev->mode_config.prefer_shadow = 1;
  111. ddev->mode_config.cursor_width = descp->hw_cursor_h;
  112. ddev->mode_config.cursor_height = descp->hw_cursor_h;
  113. ddev->mode_config.helper_private = &lsdc_mode_config_helper_funcs;
  114. if (descp->has_vblank_counter)
  115. ddev->max_vblank_count = 0xffffffff;
  116. return ret;
  117. }
  118. /*
  119. * The GPU and display controller in the LS7A1000/LS7A2000/LS2K2000 are
  120. * separated PCIE devices. They are two devices, not one. Bar 2 of the GPU
  121. * device contains the base address and size of the VRAM, both the GPU and
  122. * the DC could access the on-board VRAM.
  123. */
  124. static int lsdc_get_dedicated_vram(struct lsdc_device *ldev,
  125. struct pci_dev *pdev_dc,
  126. const struct lsdc_desc *descp)
  127. {
  128. struct drm_device *ddev = &ldev->base;
  129. struct pci_dev *pdev_gpu;
  130. resource_size_t base, size;
  131. /*
  132. * The GPU has 00:06.0 as its BDF, while the DC has 00:06.1
  133. * This is true for the LS7A1000, LS7A2000 and LS2K2000.
  134. */
  135. pdev_gpu = pci_get_domain_bus_and_slot(pci_domain_nr(pdev_dc->bus),
  136. pdev_dc->bus->number,
  137. PCI_DEVFN(6, 0));
  138. if (!pdev_gpu) {
  139. drm_err(ddev, "No GPU device, then no VRAM\n");
  140. return -ENODEV;
  141. }
  142. base = pci_resource_start(pdev_gpu, 2);
  143. size = pci_resource_len(pdev_gpu, 2);
  144. ldev->vram_base = base;
  145. ldev->vram_size = size;
  146. ldev->gpu = pdev_gpu;
  147. drm_info(ddev, "Dedicated vram start: 0x%llx, size: %uMiB\n",
  148. (u64)base, (u32)(size >> 20));
  149. return (size > SZ_1M) ? 0 : -ENODEV;
  150. }
  151. static struct lsdc_device *
  152. lsdc_create_device(struct pci_dev *pdev,
  153. const struct lsdc_desc *descp,
  154. const struct drm_driver *driver)
  155. {
  156. struct lsdc_device *ldev;
  157. struct drm_device *ddev;
  158. int ret;
  159. ldev = devm_drm_dev_alloc(&pdev->dev, driver, struct lsdc_device, base);
  160. if (IS_ERR(ldev))
  161. return ldev;
  162. ldev->dc = pdev;
  163. ldev->descp = descp;
  164. ddev = &ldev->base;
  165. loongson_gfxpll_create(ddev, &ldev->gfxpll);
  166. ret = lsdc_get_dedicated_vram(ldev, pdev, descp);
  167. if (ret) {
  168. drm_err(ddev, "Init VRAM failed: %d\n", ret);
  169. return ERR_PTR(ret);
  170. }
  171. ret = drm_aperture_remove_conflicting_framebuffers(ldev->vram_base,
  172. ldev->vram_size,
  173. driver);
  174. if (ret) {
  175. drm_err(ddev, "Remove firmware framebuffers failed: %d\n", ret);
  176. return ERR_PTR(ret);
  177. }
  178. ret = lsdc_ttm_init(ldev);
  179. if (ret) {
  180. drm_err(ddev, "Memory manager init failed: %d\n", ret);
  181. return ERR_PTR(ret);
  182. }
  183. lsdc_gem_init(ddev);
  184. /* Bar 0 of the DC device contains the MMIO register's base address */
  185. ldev->reg_base = pcim_iomap(pdev, 0, 0);
  186. if (!ldev->reg_base)
  187. return ERR_PTR(-ENODEV);
  188. spin_lock_init(&ldev->reglock);
  189. ret = lsdc_mode_config_init(ddev, descp);
  190. if (ret)
  191. return ERR_PTR(ret);
  192. ret = lsdc_modeset_init(ldev, descp->num_of_crtc, descp->funcs,
  193. loongson_vblank);
  194. if (ret)
  195. return ERR_PTR(ret);
  196. drm_mode_config_reset(ddev);
  197. return ldev;
  198. }
  199. /* For multiple GPU driver instance co-exixt in the system */
  200. static unsigned int lsdc_vga_set_decode(struct pci_dev *pdev, bool state)
  201. {
  202. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  203. }
  204. static int lsdc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  205. {
  206. const struct lsdc_desc *descp;
  207. struct drm_device *ddev;
  208. struct lsdc_device *ldev;
  209. int ret;
  210. descp = lsdc_device_probe(pdev, ent->driver_data);
  211. if (IS_ERR_OR_NULL(descp))
  212. return -ENODEV;
  213. pci_set_master(pdev);
  214. ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
  215. if (ret)
  216. return ret;
  217. ret = pcim_enable_device(pdev);
  218. if (ret)
  219. return ret;
  220. dev_info(&pdev->dev, "Found %s, revision: %u",
  221. to_loongson_gfx(descp)->model, pdev->revision);
  222. ldev = lsdc_create_device(pdev, descp, &lsdc_drm_driver);
  223. if (IS_ERR(ldev))
  224. return PTR_ERR(ldev);
  225. ddev = &ldev->base;
  226. pci_set_drvdata(pdev, ddev);
  227. vga_client_register(pdev, lsdc_vga_set_decode);
  228. drm_kms_helper_poll_init(ddev);
  229. if (loongson_vblank) {
  230. ret = drm_vblank_init(ddev, descp->num_of_crtc);
  231. if (ret)
  232. return ret;
  233. ret = devm_request_irq(&pdev->dev, pdev->irq,
  234. descp->funcs->irq_handler,
  235. IRQF_SHARED,
  236. dev_name(&pdev->dev), ddev);
  237. if (ret) {
  238. drm_err(ddev, "Failed to register interrupt: %d\n", ret);
  239. return ret;
  240. }
  241. drm_info(ddev, "registered irq: %u\n", pdev->irq);
  242. }
  243. ret = drm_dev_register(ddev, 0);
  244. if (ret)
  245. return ret;
  246. drm_fbdev_ttm_setup(ddev, 32);
  247. return 0;
  248. }
  249. static void lsdc_pci_remove(struct pci_dev *pdev)
  250. {
  251. struct drm_device *ddev = pci_get_drvdata(pdev);
  252. drm_dev_unregister(ddev);
  253. drm_atomic_helper_shutdown(ddev);
  254. }
  255. static void lsdc_pci_shutdown(struct pci_dev *pdev)
  256. {
  257. drm_atomic_helper_shutdown(pci_get_drvdata(pdev));
  258. }
  259. static int lsdc_drm_freeze(struct drm_device *ddev)
  260. {
  261. struct lsdc_device *ldev = to_lsdc(ddev);
  262. struct lsdc_bo *lbo;
  263. int ret;
  264. /* unpin all of buffers in the VRAM */
  265. mutex_lock(&ldev->gem.mutex);
  266. list_for_each_entry(lbo, &ldev->gem.objects, list) {
  267. struct ttm_buffer_object *tbo = &lbo->tbo;
  268. struct ttm_resource *resource = tbo->resource;
  269. unsigned int pin_count = tbo->pin_count;
  270. drm_dbg(ddev, "bo[%p], size: %zuKiB, type: %s, pin count: %u\n",
  271. lbo, lsdc_bo_size(lbo) >> 10,
  272. lsdc_mem_type_to_str(resource->mem_type), pin_count);
  273. if (!pin_count)
  274. continue;
  275. if (resource->mem_type == TTM_PL_VRAM) {
  276. ret = lsdc_bo_reserve(lbo);
  277. if (unlikely(ret)) {
  278. drm_err(ddev, "bo reserve failed: %d\n", ret);
  279. continue;
  280. }
  281. do {
  282. lsdc_bo_unpin(lbo);
  283. --pin_count;
  284. } while (pin_count);
  285. lsdc_bo_unreserve(lbo);
  286. }
  287. }
  288. mutex_unlock(&ldev->gem.mutex);
  289. lsdc_bo_evict_vram(ddev);
  290. ret = drm_mode_config_helper_suspend(ddev);
  291. if (unlikely(ret)) {
  292. drm_err(ddev, "Freeze error: %d", ret);
  293. return ret;
  294. }
  295. return 0;
  296. }
  297. static int lsdc_drm_resume(struct device *dev)
  298. {
  299. struct pci_dev *pdev = to_pci_dev(dev);
  300. struct drm_device *ddev = pci_get_drvdata(pdev);
  301. return drm_mode_config_helper_resume(ddev);
  302. }
  303. static int lsdc_pm_freeze(struct device *dev)
  304. {
  305. struct pci_dev *pdev = to_pci_dev(dev);
  306. struct drm_device *ddev = pci_get_drvdata(pdev);
  307. return lsdc_drm_freeze(ddev);
  308. }
  309. static int lsdc_pm_thaw(struct device *dev)
  310. {
  311. return lsdc_drm_resume(dev);
  312. }
  313. static int lsdc_pm_suspend(struct device *dev)
  314. {
  315. struct pci_dev *pdev = to_pci_dev(dev);
  316. int error;
  317. error = lsdc_pm_freeze(dev);
  318. if (error)
  319. return error;
  320. pci_save_state(pdev);
  321. /* Shut down the device */
  322. pci_disable_device(pdev);
  323. pci_set_power_state(pdev, PCI_D3hot);
  324. return 0;
  325. }
  326. static int lsdc_pm_resume(struct device *dev)
  327. {
  328. struct pci_dev *pdev = to_pci_dev(dev);
  329. pci_set_power_state(pdev, PCI_D0);
  330. pci_restore_state(pdev);
  331. if (pcim_enable_device(pdev))
  332. return -EIO;
  333. return lsdc_pm_thaw(dev);
  334. }
  335. static const struct dev_pm_ops lsdc_pm_ops = {
  336. .suspend = lsdc_pm_suspend,
  337. .resume = lsdc_pm_resume,
  338. .freeze = lsdc_pm_freeze,
  339. .thaw = lsdc_pm_thaw,
  340. .poweroff = lsdc_pm_freeze,
  341. .restore = lsdc_pm_resume,
  342. };
  343. static const struct pci_device_id lsdc_pciid_list[] = {
  344. {PCI_VDEVICE(LOONGSON, 0x7a06), CHIP_LS7A1000},
  345. {PCI_VDEVICE(LOONGSON, 0x7a36), CHIP_LS7A2000},
  346. { }
  347. };
  348. struct pci_driver lsdc_pci_driver = {
  349. .name = DRIVER_NAME,
  350. .id_table = lsdc_pciid_list,
  351. .probe = lsdc_pci_probe,
  352. .remove = lsdc_pci_remove,
  353. .shutdown = lsdc_pci_shutdown,
  354. .driver.pm = &lsdc_pm_ops,
  355. };
  356. MODULE_DEVICE_TABLE(pci, lsdc_pciid_list);
  357. MODULE_AUTHOR(DRIVER_AUTHOR);
  358. MODULE_DESCRIPTION(DRIVER_DESC);
  359. MODULE_LICENSE("GPL");