Makefile 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218
  1. # SPDX-License-Identifier: GPL-2.0
  2. ccflags-y := -I $(src)
  3. ccflags-y += -I $(obj)/generated
  4. ccflags-y += -I $(src)/disp/dpu1
  5. ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(src)/dsi
  6. ccflags-$(CONFIG_DRM_MSM_DP) += -I $(src)/dp
  7. adreno-y := \
  8. adreno/adreno_device.o \
  9. adreno/adreno_gpu.o \
  10. adreno/a2xx_catalog.o \
  11. adreno/a2xx_gpu.o \
  12. adreno/a2xx_gpummu.o \
  13. adreno/a3xx_catalog.o \
  14. adreno/a3xx_gpu.o \
  15. adreno/a4xx_catalog.o \
  16. adreno/a4xx_gpu.o \
  17. adreno/a5xx_catalog.o \
  18. adreno/a5xx_gpu.o \
  19. adreno/a5xx_power.o \
  20. adreno/a5xx_preempt.o \
  21. adreno/a6xx_catalog.o \
  22. adreno/a6xx_gpu.o \
  23. adreno/a6xx_gmu.o \
  24. adreno/a6xx_hfi.o \
  25. adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
  26. adreno-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o
  27. msm-display-$(CONFIG_DRM_MSM_HDMI) += \
  28. hdmi/hdmi.o \
  29. hdmi/hdmi_audio.o \
  30. hdmi/hdmi_bridge.o \
  31. hdmi/hdmi_hpd.o \
  32. hdmi/hdmi_i2c.o \
  33. hdmi/hdmi_phy.o \
  34. hdmi/hdmi_phy_8960.o \
  35. hdmi/hdmi_phy_8996.o \
  36. hdmi/hdmi_phy_8998.o \
  37. hdmi/hdmi_phy_8x60.o \
  38. hdmi/hdmi_phy_8x74.o \
  39. hdmi/hdmi_pll_8960.o \
  40. msm-display-$(CONFIG_DRM_MSM_MDP4) += \
  41. disp/mdp4/mdp4_crtc.o \
  42. disp/mdp4/mdp4_dsi_encoder.o \
  43. disp/mdp4/mdp4_dtv_encoder.o \
  44. disp/mdp4/mdp4_lcdc_encoder.o \
  45. disp/mdp4/mdp4_lvds_connector.o \
  46. disp/mdp4/mdp4_lvds_pll.o \
  47. disp/mdp4/mdp4_irq.o \
  48. disp/mdp4/mdp4_kms.o \
  49. disp/mdp4/mdp4_plane.o \
  50. msm-display-$(CONFIG_DRM_MSM_MDP5) += \
  51. disp/mdp5/mdp5_cfg.o \
  52. disp/mdp5/mdp5_cmd_encoder.o \
  53. disp/mdp5/mdp5_ctl.o \
  54. disp/mdp5/mdp5_crtc.o \
  55. disp/mdp5/mdp5_encoder.o \
  56. disp/mdp5/mdp5_irq.o \
  57. disp/mdp5/mdp5_kms.o \
  58. disp/mdp5/mdp5_pipe.o \
  59. disp/mdp5/mdp5_mixer.o \
  60. disp/mdp5/mdp5_plane.o \
  61. disp/mdp5/mdp5_smp.o \
  62. msm-display-$(CONFIG_DRM_MSM_DPU) += \
  63. disp/dpu1/dpu_core_perf.o \
  64. disp/dpu1/dpu_crtc.o \
  65. disp/dpu1/dpu_encoder.o \
  66. disp/dpu1/dpu_encoder_phys_cmd.o \
  67. disp/dpu1/dpu_encoder_phys_vid.o \
  68. disp/dpu1/dpu_encoder_phys_wb.o \
  69. disp/dpu1/dpu_formats.o \
  70. disp/dpu1/dpu_hw_catalog.o \
  71. disp/dpu1/dpu_hw_cdm.o \
  72. disp/dpu1/dpu_hw_ctl.o \
  73. disp/dpu1/dpu_hw_dsc.o \
  74. disp/dpu1/dpu_hw_dsc_1_2.o \
  75. disp/dpu1/dpu_hw_interrupts.o \
  76. disp/dpu1/dpu_hw_intf.o \
  77. disp/dpu1/dpu_hw_lm.o \
  78. disp/dpu1/dpu_hw_pingpong.o \
  79. disp/dpu1/dpu_hw_sspp.o \
  80. disp/dpu1/dpu_hw_dspp.o \
  81. disp/dpu1/dpu_hw_merge3d.o \
  82. disp/dpu1/dpu_hw_top.o \
  83. disp/dpu1/dpu_hw_util.o \
  84. disp/dpu1/dpu_hw_vbif.o \
  85. disp/dpu1/dpu_hw_wb.o \
  86. disp/dpu1/dpu_kms.o \
  87. disp/dpu1/dpu_plane.o \
  88. disp/dpu1/dpu_rm.o \
  89. disp/dpu1/dpu_vbif.o \
  90. disp/dpu1/dpu_writeback.o
  91. msm-display-$(CONFIG_DRM_MSM_MDSS) += \
  92. msm_mdss.o \
  93. msm-display-y += \
  94. disp/mdp_format.o \
  95. disp/mdp_kms.o \
  96. disp/msm_disp_snapshot.o \
  97. disp/msm_disp_snapshot_util.o \
  98. msm-y += \
  99. msm_atomic.o \
  100. msm_atomic_tracepoints.o \
  101. msm_debugfs.o \
  102. msm_drv.o \
  103. msm_fb.o \
  104. msm_fence.o \
  105. msm_gem.o \
  106. msm_gem_prime.o \
  107. msm_gem_shrinker.o \
  108. msm_gem_submit.o \
  109. msm_gem_vma.o \
  110. msm_gpu.o \
  111. msm_gpu_devfreq.o \
  112. msm_io_utils.o \
  113. msm_iommu.o \
  114. msm_kms.o \
  115. msm_perf.o \
  116. msm_rd.o \
  117. msm_ringbuffer.o \
  118. msm_submitqueue.o \
  119. msm_gpu_tracepoints.o \
  120. msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
  121. msm-display-$(CONFIG_DEBUG_FS) += \
  122. dp/dp_debug.o
  123. msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
  124. dp/dp_catalog.o \
  125. dp/dp_ctrl.o \
  126. dp/dp_display.o \
  127. dp/dp_drm.o \
  128. dp/dp_link.o \
  129. dp/dp_panel.o \
  130. dp/dp_audio.o \
  131. dp/dp_utils.o
  132. msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
  133. msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
  134. dsi/dsi_cfg.o \
  135. dsi/dsi_host.o \
  136. dsi/dsi_manager.o \
  137. dsi/phy/dsi_phy.o
  138. msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
  139. msm-display-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
  140. msm-display-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
  141. msm-display-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
  142. msm-display-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
  143. msm-display-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o
  144. msm-y += $(adreno-y) $(msm-display-y)
  145. obj-$(CONFIG_DRM_MSM) += msm.o
  146. ifeq (y,$(CONFIG_DRM_MSM_VALIDATE_XML))
  147. headergen-opts += --validate
  148. else
  149. headergen-opts += --no-validate
  150. endif
  151. quiet_cmd_headergen = GENHDR $@
  152. cmd_headergen = mkdir -p $(obj)/generated && $(PYTHON3) $(src)/registers/gen_header.py \
  153. $(headergen-opts) --rnn $(src)/registers --xml $< c-defines > $@
  154. $(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \
  155. $(src)/registers/adreno/adreno_common.xml \
  156. $(src)/registers/adreno/adreno_pm4.xml \
  157. $(src)/registers/freedreno_copyright.xml \
  158. $(src)/registers/gen_header.py \
  159. $(src)/registers/rules-fd.xsd \
  160. FORCE
  161. $(call if_changed,headergen)
  162. $(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \
  163. $(src)/registers/freedreno_copyright.xml \
  164. $(src)/registers/gen_header.py \
  165. $(src)/registers/rules-fd.xsd \
  166. FORCE
  167. $(call if_changed,headergen)
  168. ADRENO_HEADERS = \
  169. generated/a2xx.xml.h \
  170. generated/a3xx.xml.h \
  171. generated/a4xx.xml.h \
  172. generated/a5xx.xml.h \
  173. generated/a6xx.xml.h \
  174. generated/a6xx_gmu.xml.h \
  175. generated/adreno_common.xml.h \
  176. generated/adreno_pm4.xml.h \
  177. DISPLAY_HEADERS = \
  178. generated/dsi_phy_7nm.xml.h \
  179. generated/dsi_phy_10nm.xml.h \
  180. generated/dsi_phy_14nm.xml.h \
  181. generated/dsi_phy_20nm.xml.h \
  182. generated/dsi_phy_28nm_8960.xml.h \
  183. generated/dsi_phy_28nm.xml.h \
  184. generated/dsi.xml.h \
  185. generated/hdmi.xml.h \
  186. generated/mdp4.xml.h \
  187. generated/mdp5.xml.h \
  188. generated/mdp_common.xml.h \
  189. generated/sfpb.xml.h
  190. $(addprefix $(obj)/,$(adreno-y)): $(addprefix $(obj)/,$(ADRENO_HEADERS))
  191. $(addprefix $(obj)/,$(msm-display-y)): $(addprefix $(obj)/,$(DISPLAY_HEADERS))
  192. targets += $(ADRENO_HEADERS) $(DISPLAY_HEADERS)