msm_fence.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2013-2016 Red Hat
  4. * Author: Rob Clark <robdclark@gmail.com>
  5. */
  6. #ifndef __MSM_FENCE_H__
  7. #define __MSM_FENCE_H__
  8. #include "msm_drv.h"
  9. /**
  10. * struct msm_fence_context - fence context for gpu
  11. *
  12. * Each ringbuffer has a single fence context, with the GPU writing an
  13. * incrementing fence seqno at the end of each submit
  14. */
  15. struct msm_fence_context {
  16. struct drm_device *dev;
  17. /** name: human readable name for fence timeline */
  18. char name[32];
  19. /** context: see dma_fence_context_alloc() */
  20. unsigned context;
  21. /** index: similar to context, but local to msm_fence_context's */
  22. unsigned index;
  23. /**
  24. * last_fence:
  25. *
  26. * Last assigned fence, incremented each time a fence is created
  27. * on this fence context. If last_fence == completed_fence,
  28. * there is no remaining pending work
  29. */
  30. uint32_t last_fence;
  31. /**
  32. * completed_fence:
  33. *
  34. * The last completed fence, updated from the CPU after interrupt
  35. * from GPU
  36. */
  37. uint32_t completed_fence;
  38. /**
  39. * fenceptr:
  40. *
  41. * The address that the GPU directly writes with completed fence
  42. * seqno. This can be ahead of completed_fence. We can peek at
  43. * this to see if a fence has already signaled but the CPU hasn't
  44. * gotten around to handling the irq and updating completed_fence
  45. */
  46. volatile uint32_t *fenceptr;
  47. spinlock_t spinlock;
  48. /*
  49. * TODO this doesn't really deal with multiple deadlines, like
  50. * if userspace got multiple frames ahead.. OTOH atomic updates
  51. * don't queue, so maybe that is ok
  52. */
  53. /** next_deadline: Time of next deadline */
  54. ktime_t next_deadline;
  55. /**
  56. * next_deadline_fence:
  57. *
  58. * Fence value for next pending deadline. The deadline timer is
  59. * canceled when this fence is signaled.
  60. */
  61. uint32_t next_deadline_fence;
  62. struct hrtimer deadline_timer;
  63. struct kthread_work deadline_work;
  64. };
  65. struct msm_fence_context * msm_fence_context_alloc(struct drm_device *dev,
  66. volatile uint32_t *fenceptr, const char *name);
  67. void msm_fence_context_free(struct msm_fence_context *fctx);
  68. bool msm_fence_completed(struct msm_fence_context *fctx, uint32_t fence);
  69. void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence);
  70. struct dma_fence * msm_fence_alloc(void);
  71. void msm_fence_init(struct dma_fence *fence, struct msm_fence_context *fctx);
  72. static inline bool
  73. fence_before(uint32_t a, uint32_t b)
  74. {
  75. return (int32_t)(a - b) < 0;
  76. }
  77. static inline bool
  78. fence_after(uint32_t a, uint32_t b)
  79. {
  80. return (int32_t)(a - b) > 0;
  81. }
  82. #endif