panel-auo-a030jtn01.c 7.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * AU Optronics A030JTN01.0 TFT LCD panel driver
  4. *
  5. * Copyright (C) 2023, Paul Cercueil <paul@crapouillou.net>
  6. * Copyright (C) 2023, Christophe Branchereau <cbranchereau@gmail.com>
  7. */
  8. #include <linux/bitfield.h>
  9. #include <linux/delay.h>
  10. #include <linux/device.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/media-bus-format.h>
  13. #include <linux/mod_devicetable.h>
  14. #include <linux/module.h>
  15. #include <linux/regmap.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/spi/spi.h>
  18. #include <drm/drm_modes.h>
  19. #include <drm/drm_panel.h>
  20. #define REG05 0x05
  21. #define REG06 0x06
  22. #define REG07 0x07
  23. #define REG05_STDBY BIT(0)
  24. #define REG06_VBLK GENMASK(4, 0)
  25. #define REG07_HBLK GENMASK(7, 0)
  26. struct a030jtn01_info {
  27. const struct drm_display_mode *display_modes;
  28. unsigned int num_modes;
  29. u16 width_mm, height_mm;
  30. u32 bus_format, bus_flags;
  31. };
  32. struct a030jtn01 {
  33. struct drm_panel panel;
  34. struct spi_device *spi;
  35. struct regmap *map;
  36. const struct a030jtn01_info *panel_info;
  37. struct regulator *supply;
  38. struct gpio_desc *reset_gpio;
  39. };
  40. static inline struct a030jtn01 *to_a030jtn01(struct drm_panel *panel)
  41. {
  42. return container_of(panel, struct a030jtn01, panel);
  43. }
  44. static int a030jtn01_prepare(struct drm_panel *panel)
  45. {
  46. struct a030jtn01 *priv = to_a030jtn01(panel);
  47. struct device *dev = &priv->spi->dev;
  48. unsigned int dummy;
  49. int err;
  50. err = regulator_enable(priv->supply);
  51. if (err) {
  52. dev_err(dev, "Failed to enable power supply: %d\n", err);
  53. return err;
  54. }
  55. usleep_range(1000, 8000);
  56. /* Reset the chip */
  57. gpiod_set_value_cansleep(priv->reset_gpio, 1);
  58. usleep_range(100, 8000);
  59. gpiod_set_value_cansleep(priv->reset_gpio, 0);
  60. usleep_range(2000, 8000);
  61. /*
  62. * No idea why, but a register read (doesn't matter which) is needed to
  63. * properly initialize the chip after a reset; otherwise, the colors
  64. * will be wrong. It doesn't seem to be timing-related as a msleep(200)
  65. * doesn't fix it.
  66. */
  67. err = regmap_read(priv->map, REG05, &dummy);
  68. if (err)
  69. goto err_disable_regulator;
  70. /* Use (24 + 6) == 0x1e as the vertical back porch */
  71. err = regmap_write(priv->map, REG06, FIELD_PREP(REG06_VBLK, 0x1e));
  72. if (err)
  73. goto err_disable_regulator;
  74. /* Use (42 + 30) * 3 == 0xd8 as the horizontal back porch */
  75. err = regmap_write(priv->map, REG07, FIELD_PREP(REG07_HBLK, 0xd8));
  76. if (err)
  77. goto err_disable_regulator;
  78. return 0;
  79. err_disable_regulator:
  80. gpiod_set_value_cansleep(priv->reset_gpio, 1);
  81. regulator_disable(priv->supply);
  82. return err;
  83. }
  84. static int a030jtn01_unprepare(struct drm_panel *panel)
  85. {
  86. struct a030jtn01 *priv = to_a030jtn01(panel);
  87. gpiod_set_value_cansleep(priv->reset_gpio, 1);
  88. regulator_disable(priv->supply);
  89. return 0;
  90. }
  91. static int a030jtn01_enable(struct drm_panel *panel)
  92. {
  93. struct a030jtn01 *priv = to_a030jtn01(panel);
  94. int ret;
  95. ret = regmap_set_bits(priv->map, REG05, REG05_STDBY);
  96. if (ret)
  97. return ret;
  98. /* Wait for the picture to be stable */
  99. if (panel->backlight)
  100. msleep(100);
  101. return 0;
  102. }
  103. static int a030jtn01_disable(struct drm_panel *panel)
  104. {
  105. struct a030jtn01 *priv = to_a030jtn01(panel);
  106. return regmap_clear_bits(priv->map, REG05, REG05_STDBY);
  107. }
  108. static int a030jtn01_get_modes(struct drm_panel *panel,
  109. struct drm_connector *connector)
  110. {
  111. struct a030jtn01 *priv = to_a030jtn01(panel);
  112. const struct a030jtn01_info *panel_info = priv->panel_info;
  113. struct drm_display_mode *mode;
  114. unsigned int i;
  115. for (i = 0; i < panel_info->num_modes; i++) {
  116. mode = drm_mode_duplicate(connector->dev,
  117. &panel_info->display_modes[i]);
  118. if (!mode)
  119. return -ENOMEM;
  120. drm_mode_set_name(mode);
  121. mode->type = DRM_MODE_TYPE_DRIVER;
  122. if (panel_info->num_modes == 1)
  123. mode->type |= DRM_MODE_TYPE_PREFERRED;
  124. drm_mode_probed_add(connector, mode);
  125. }
  126. connector->display_info.bpc = 8;
  127. connector->display_info.width_mm = panel_info->width_mm;
  128. connector->display_info.height_mm = panel_info->height_mm;
  129. drm_display_info_set_bus_formats(&connector->display_info,
  130. &panel_info->bus_format, 1);
  131. connector->display_info.bus_flags = panel_info->bus_flags;
  132. return panel_info->num_modes;
  133. }
  134. static const struct drm_panel_funcs a030jtn01_funcs = {
  135. .prepare = a030jtn01_prepare,
  136. .unprepare = a030jtn01_unprepare,
  137. .enable = a030jtn01_enable,
  138. .disable = a030jtn01_disable,
  139. .get_modes = a030jtn01_get_modes,
  140. };
  141. static bool a030jtn01_has_reg(struct device *dev, unsigned int reg)
  142. {
  143. static const u32 a030jtn01_regs_mask = 0x001823f1fb;
  144. return a030jtn01_regs_mask & BIT(reg);
  145. };
  146. static const struct regmap_config a030jtn01_regmap_config = {
  147. .reg_bits = 8,
  148. .val_bits = 8,
  149. .read_flag_mask = 0x40,
  150. .max_register = 0x1c,
  151. .readable_reg = a030jtn01_has_reg,
  152. .writeable_reg = a030jtn01_has_reg,
  153. };
  154. static int a030jtn01_probe(struct spi_device *spi)
  155. {
  156. struct device *dev = &spi->dev;
  157. struct a030jtn01 *priv;
  158. int err;
  159. spi->mode |= SPI_MODE_3 | SPI_3WIRE;
  160. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  161. if (!priv)
  162. return -ENOMEM;
  163. priv->spi = spi;
  164. spi_set_drvdata(spi, priv);
  165. priv->map = devm_regmap_init_spi(spi, &a030jtn01_regmap_config);
  166. if (IS_ERR(priv->map))
  167. return dev_err_probe(dev, PTR_ERR(priv->map), "Unable to init regmap");
  168. priv->panel_info = spi_get_device_match_data(spi);
  169. if (!priv->panel_info)
  170. return -EINVAL;
  171. priv->supply = devm_regulator_get(dev, "power");
  172. if (IS_ERR(priv->supply))
  173. return dev_err_probe(dev, PTR_ERR(priv->supply), "Failed to get power supply");
  174. priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  175. if (IS_ERR(priv->reset_gpio))
  176. return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to get reset GPIO");
  177. drm_panel_init(&priv->panel, dev, &a030jtn01_funcs,
  178. DRM_MODE_CONNECTOR_DPI);
  179. err = drm_panel_of_backlight(&priv->panel);
  180. if (err)
  181. return err;
  182. drm_panel_add(&priv->panel);
  183. return 0;
  184. }
  185. static void a030jtn01_remove(struct spi_device *spi)
  186. {
  187. struct a030jtn01 *priv = spi_get_drvdata(spi);
  188. drm_panel_remove(&priv->panel);
  189. drm_panel_disable(&priv->panel);
  190. drm_panel_unprepare(&priv->panel);
  191. }
  192. static const struct drm_display_mode a030jtn01_modes[] = {
  193. { /* 60 Hz */
  194. .clock = 14400,
  195. .hdisplay = 320,
  196. .hsync_start = 320 + 8,
  197. .hsync_end = 320 + 8 + 42,
  198. .htotal = 320 + 8 + 42 + 30,
  199. .vdisplay = 480,
  200. .vsync_start = 480 + 90,
  201. .vsync_end = 480 + 90 + 24,
  202. .vtotal = 480 + 90 + 24 + 6,
  203. .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
  204. },
  205. { /* 50 Hz */
  206. .clock = 12000,
  207. .hdisplay = 320,
  208. .hsync_start = 320 + 8,
  209. .hsync_end = 320 + 8 + 42,
  210. .htotal = 320 + 8 + 42 + 30,
  211. .vdisplay = 480,
  212. .vsync_start = 480 + 90,
  213. .vsync_end = 480 + 90 + 24,
  214. .vtotal = 480 + 90 + 24 + 6,
  215. .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
  216. },
  217. };
  218. static const struct a030jtn01_info a030jtn01_info = {
  219. .display_modes = a030jtn01_modes,
  220. .num_modes = ARRAY_SIZE(a030jtn01_modes),
  221. .width_mm = 70,
  222. .height_mm = 51,
  223. .bus_format = MEDIA_BUS_FMT_RGB888_3X8_DELTA,
  224. .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
  225. };
  226. static const struct spi_device_id a030jtn01_id[] = {
  227. { "a030jtn01", (kernel_ulong_t) &a030jtn01_info },
  228. { /* sentinel */ }
  229. };
  230. MODULE_DEVICE_TABLE(spi, a030jtn01_id);
  231. static const struct of_device_id a030jtn01_of_match[] = {
  232. { .compatible = "auo,a030jtn01" },
  233. { /* sentinel */ }
  234. };
  235. MODULE_DEVICE_TABLE(of, a030jtn01_of_match);
  236. static struct spi_driver a030jtn01_driver = {
  237. .driver = {
  238. .name = "auo-a030jtn01",
  239. .of_match_table = a030jtn01_of_match,
  240. },
  241. .id_table = a030jtn01_id,
  242. .probe = a030jtn01_probe,
  243. .remove = a030jtn01_remove,
  244. };
  245. module_spi_driver(a030jtn01_driver);
  246. MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
  247. MODULE_AUTHOR("Christophe Branchereau <cbranchereau@gmail.com>");
  248. MODULE_DESCRIPTION("AU Optronics A030JTN01.0 TFT LCD panel driver");
  249. MODULE_LICENSE("GPL");