panel-ilitek-ili9882t.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Panels based on the Ilitek ILI9882T display controller.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/gpio/consumer.h>
  7. #include <linux/module.h>
  8. #include <linux/of.h>
  9. #include <linux/regulator/consumer.h>
  10. #include <drm/drm_connector.h>
  11. #include <drm/drm_crtc.h>
  12. #include <drm/drm_mipi_dsi.h>
  13. #include <drm/drm_panel.h>
  14. #include <video/mipi_display.h>
  15. struct ili9882t;
  16. /*
  17. * Use this descriptor struct to describe different panels using the
  18. * Ilitek ILI9882T display controller.
  19. */
  20. struct panel_desc {
  21. const struct drm_display_mode *modes;
  22. unsigned int bpc;
  23. /**
  24. * @width_mm: width of the panel's active display area
  25. * @height_mm: height of the panel's active display area
  26. */
  27. struct {
  28. unsigned int width_mm;
  29. unsigned int height_mm;
  30. } size;
  31. unsigned long mode_flags;
  32. enum mipi_dsi_pixel_format format;
  33. int (*init)(struct ili9882t *boe);
  34. unsigned int lanes;
  35. };
  36. struct ili9882t {
  37. struct drm_panel base;
  38. struct mipi_dsi_device *dsi;
  39. const struct panel_desc *desc;
  40. enum drm_panel_orientation orientation;
  41. struct regulator *pp3300;
  42. struct regulator *pp1800;
  43. struct regulator *avee;
  44. struct regulator *avdd;
  45. struct gpio_desc *enable_gpio;
  46. };
  47. /* ILI9882-specific commands, add new commands as you decode them */
  48. #define ILI9882T_DCS_SWITCH_PAGE 0xFF
  49. #define ili9882t_switch_page(ctx, page) \
  50. mipi_dsi_dcs_write_seq_multi(ctx, ILI9882T_DCS_SWITCH_PAGE, \
  51. 0x98, 0x82, (page))
  52. static int starry_ili9882t_init(struct ili9882t *ili)
  53. {
  54. struct mipi_dsi_multi_context ctx = { .dsi = ili->dsi };
  55. usleep_range(5000, 5100);
  56. ili9882t_switch_page(&ctx, 0x01);
  57. mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x42);
  58. mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x11);
  59. mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x00);
  60. mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x00);
  61. mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x01);
  62. mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x11);
  63. mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x00);
  64. mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x00);
  65. mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x80);
  66. mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x81);
  67. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x71);
  68. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x00);
  69. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x00);
  70. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x1a);
  71. mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x00);
  72. mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x00);
  73. mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x00);
  74. mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x00);
  75. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2c, 0xd4);
  76. mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x40);
  77. mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x11);
  78. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x32);
  79. mipi_dsi_dcs_write_seq_multi(&ctx, 0xd1, 0x30);
  80. mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x55);
  81. mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x01);
  82. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe3, 0x93);
  83. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0x00);
  84. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x80);
  85. mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x07);
  86. mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x07);
  87. mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x07);
  88. mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x07);
  89. mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x07);
  90. mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0x01);
  91. mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0x00);
  92. mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x28);
  93. mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x29);
  94. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x11);
  95. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x13);
  96. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3c, 0x15);
  97. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x17);
  98. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3e, 0x09);
  99. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x0d);
  100. mipi_dsi_dcs_write_seq_multi(&ctx, 0x40, 0x02);
  101. mipi_dsi_dcs_write_seq_multi(&ctx, 0x41, 0x02);
  102. mipi_dsi_dcs_write_seq_multi(&ctx, 0x42, 0x02);
  103. mipi_dsi_dcs_write_seq_multi(&ctx, 0x43, 0x02);
  104. mipi_dsi_dcs_write_seq_multi(&ctx, 0x44, 0x02);
  105. mipi_dsi_dcs_write_seq_multi(&ctx, 0x45, 0x02);
  106. mipi_dsi_dcs_write_seq_multi(&ctx, 0x46, 0x02);
  107. mipi_dsi_dcs_write_seq_multi(&ctx, 0x47, 0x07);
  108. mipi_dsi_dcs_write_seq_multi(&ctx, 0x48, 0x07);
  109. mipi_dsi_dcs_write_seq_multi(&ctx, 0x49, 0x07);
  110. mipi_dsi_dcs_write_seq_multi(&ctx, 0x4a, 0x07);
  111. mipi_dsi_dcs_write_seq_multi(&ctx, 0x4b, 0x07);
  112. mipi_dsi_dcs_write_seq_multi(&ctx, 0x4c, 0x01);
  113. mipi_dsi_dcs_write_seq_multi(&ctx, 0x4d, 0x00);
  114. mipi_dsi_dcs_write_seq_multi(&ctx, 0x4e, 0x28);
  115. mipi_dsi_dcs_write_seq_multi(&ctx, 0x4f, 0x29);
  116. mipi_dsi_dcs_write_seq_multi(&ctx, 0x50, 0x10);
  117. mipi_dsi_dcs_write_seq_multi(&ctx, 0x51, 0x12);
  118. mipi_dsi_dcs_write_seq_multi(&ctx, 0x52, 0x14);
  119. mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x16);
  120. mipi_dsi_dcs_write_seq_multi(&ctx, 0x54, 0x08);
  121. mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x0c);
  122. mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x02);
  123. mipi_dsi_dcs_write_seq_multi(&ctx, 0x57, 0x02);
  124. mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x02);
  125. mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x02);
  126. mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x02);
  127. mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x02);
  128. mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x02);
  129. mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x07);
  130. mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x07);
  131. mipi_dsi_dcs_write_seq_multi(&ctx, 0x63, 0x07);
  132. mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x07);
  133. mipi_dsi_dcs_write_seq_multi(&ctx, 0x65, 0x07);
  134. mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0x01);
  135. mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x00);
  136. mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x28);
  137. mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x29);
  138. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x16);
  139. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x14);
  140. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6c, 0x12);
  141. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x10);
  142. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x0c);
  143. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6f, 0x08);
  144. mipi_dsi_dcs_write_seq_multi(&ctx, 0x70, 0x02);
  145. mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x02);
  146. mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x02);
  147. mipi_dsi_dcs_write_seq_multi(&ctx, 0x73, 0x02);
  148. mipi_dsi_dcs_write_seq_multi(&ctx, 0x74, 0x02);
  149. mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0x02);
  150. mipi_dsi_dcs_write_seq_multi(&ctx, 0x76, 0x02);
  151. mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x07);
  152. mipi_dsi_dcs_write_seq_multi(&ctx, 0x78, 0x07);
  153. mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x07);
  154. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x07);
  155. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0x07);
  156. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7c, 0x01);
  157. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x00);
  158. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x28);
  159. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x29);
  160. mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x17);
  161. mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x15);
  162. mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x13);
  163. mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x11);
  164. mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x0d);
  165. mipi_dsi_dcs_write_seq_multi(&ctx, 0x85, 0x09);
  166. mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x02);
  167. mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x07);
  168. mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x07);
  169. mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x07);
  170. mipi_dsi_dcs_write_seq_multi(&ctx, 0x8a, 0x07);
  171. mipi_dsi_dcs_write_seq_multi(&ctx, 0x8b, 0x07);
  172. mipi_dsi_dcs_write_seq_multi(&ctx, 0x8c, 0x07);
  173. ili9882t_switch_page(&ctx, 0x02);
  174. mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x3a);
  175. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x3b);
  176. mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x01);
  177. mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x01);
  178. mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x0c);
  179. mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x44);
  180. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3c, 0x0a);
  181. mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x11);
  182. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x00);
  183. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x0c);
  184. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x44);
  185. mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x1f);
  186. mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x40);
  187. mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x00);
  188. ili9882t_switch_page(&ctx, 0x03);
  189. mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x01);
  190. mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x3c);
  191. mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0xfa);
  192. ili9882t_switch_page(&ctx, 0x0a);
  193. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x01);
  194. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x01);
  195. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x91);
  196. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x3c);
  197. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x00);
  198. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe8, 0xfa);
  199. ili9882t_switch_page(&ctx, 0x12);
  200. mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x2c);
  201. ili9882t_switch_page(&ctx, 0x05);
  202. mipi_dsi_dcs_write_seq_multi(&ctx, 0x73, 0xe5);
  203. mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x6b);
  204. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0xa4);
  205. mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x54);
  206. mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x97);
  207. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x97);
  208. mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x3f);
  209. mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0xda);
  210. mipi_dsi_dcs_write_seq_multi(&ctx, 0xa7, 0xf1);
  211. mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x01);
  212. mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x3f);
  213. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x90);
  214. mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x87);
  215. ili9882t_switch_page(&ctx, 0x06);
  216. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x80);
  217. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x07);
  218. mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x58);
  219. mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x02);
  220. mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0x58);
  221. mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x02);
  222. mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x60);
  223. mipi_dsi_dcs_write_seq_multi(&ctx, 0x10, 0x00);
  224. mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22);
  225. mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x08);
  226. mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x55);
  227. mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x38);
  228. ili9882t_switch_page(&ctx, 0x08);
  229. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x00, 0x10, 0x2a, 0x4d, 0x61, 0x56, 0x6a, 0x6e,
  230. 0x79, 0x76, 0x8f, 0x95, 0x98, 0xae, 0xaa, 0xb2, 0xbb, 0xce,
  231. 0xc6, 0xbd, 0xd5, 0xe2, 0xe8);
  232. mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x00, 0x10, 0x2a, 0x4d, 0x61, 0x56, 0x6a, 0x6e,
  233. 0x79, 0x76, 0x8f, 0x95, 0x98, 0xae, 0xaa, 0xb2, 0xbb, 0xce,
  234. 0xc6, 0xbd, 0xd5, 0xe2, 0xe8);
  235. ili9882t_switch_page(&ctx, 0x04);
  236. mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x81);
  237. ili9882t_switch_page(&ctx, 0x0c);
  238. mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x02);
  239. mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x00);
  240. mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x03);
  241. mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x01);
  242. mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x03);
  243. mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x02);
  244. mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x04);
  245. mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x03);
  246. mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x03);
  247. mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x04);
  248. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x04);
  249. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x05);
  250. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x04);
  251. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x06);
  252. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x05);
  253. mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x07);
  254. mipi_dsi_dcs_write_seq_multi(&ctx, 0x10, 0x04);
  255. mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x08);
  256. mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x05);
  257. mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x09);
  258. mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x05);
  259. mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x0a);
  260. mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x06);
  261. mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0x0b);
  262. mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x05);
  263. mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0c);
  264. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x06);
  265. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x0d);
  266. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1c, 0x06);
  267. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x0e);
  268. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x07);
  269. mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x0f);
  270. mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x06);
  271. mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x10);
  272. mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x07);
  273. mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x11);
  274. mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x07);
  275. mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x12);
  276. mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x08);
  277. mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x13);
  278. mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0x07);
  279. mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x14);
  280. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x08);
  281. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x15);
  282. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2c, 0x08);
  283. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x16);
  284. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2e, 0x09);
  285. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x17);
  286. mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x08);
  287. mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x18);
  288. mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x09);
  289. mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x19);
  290. mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x09);
  291. mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x1a);
  292. mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0x0a);
  293. mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0x1b);
  294. mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x0a);
  295. mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x1c);
  296. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x0a);
  297. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x1d);
  298. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3c, 0x0a);
  299. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x1e);
  300. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3e, 0x0a);
  301. mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x1f);
  302. ili9882t_switch_page(&ctx, 0x04);
  303. mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x01);
  304. ili9882t_switch_page(&ctx, 0x0e);
  305. mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x0c);
  306. mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x10);
  307. mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x16);
  308. mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0xe0);
  309. mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x00);
  310. mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x71);
  311. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x46);
  312. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x1f);
  313. mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0xc7);
  314. mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x02);
  315. mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0xdf);
  316. mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x5a);
  317. mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0xc0);
  318. mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x5a);
  319. mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0xc0);
  320. mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x65);
  321. mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x3e);
  322. mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0xa0);
  323. mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01);
  324. mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0xcc);
  325. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x12);
  326. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xcc);
  327. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xcc);
  328. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xcc);
  329. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xcc);
  330. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xcc);
  331. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xcc);
  332. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xcc);
  333. mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0xcc);
  334. mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x00);
  335. mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x81);
  336. mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x02);
  337. mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x00);
  338. mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x21);
  339. mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x10);
  340. ili9882t_switch_page(&ctx, 0x1e);
  341. mipi_dsi_dcs_write_seq_multi(&ctx, 0x60, 0x00);
  342. mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x00);
  343. mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x00);
  344. ili9882t_switch_page(&ctx, 0x0b);
  345. mipi_dsi_dcs_write_seq_multi(&ctx, 0xa6, 0x44);
  346. mipi_dsi_dcs_write_seq_multi(&ctx, 0xa7, 0xb6);
  347. mipi_dsi_dcs_write_seq_multi(&ctx, 0xa8, 0x03);
  348. mipi_dsi_dcs_write_seq_multi(&ctx, 0xa9, 0x03);
  349. mipi_dsi_dcs_write_seq_multi(&ctx, 0xaa, 0x51);
  350. mipi_dsi_dcs_write_seq_multi(&ctx, 0xab, 0x51);
  351. mipi_dsi_dcs_write_seq_multi(&ctx, 0xac, 0x04);
  352. mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x92);
  353. mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xa1);
  354. ili9882t_switch_page(&ctx, 0x05);
  355. mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x87);
  356. ili9882t_switch_page(&ctx, 0x06);
  357. mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22);
  358. ili9882t_switch_page(&ctx, 0x00);
  359. mipi_dsi_dcs_exit_sleep_mode_multi(&ctx);
  360. mipi_dsi_msleep(&ctx, 120);
  361. mipi_dsi_dcs_set_display_on_multi(&ctx);
  362. mipi_dsi_msleep(&ctx, 20);
  363. return ctx.accum_err;
  364. };
  365. static inline struct ili9882t *to_ili9882t(struct drm_panel *panel)
  366. {
  367. return container_of(panel, struct ili9882t, base);
  368. }
  369. static int ili9882t_disable(struct drm_panel *panel)
  370. {
  371. struct ili9882t *ili = to_ili9882t(panel);
  372. struct mipi_dsi_multi_context ctx = { .dsi = ili->dsi };
  373. ili9882t_switch_page(&ctx, 0x00);
  374. ili->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
  375. mipi_dsi_dcs_set_display_off_multi(&ctx);
  376. mipi_dsi_dcs_enter_sleep_mode_multi(&ctx);
  377. mipi_dsi_msleep(&ctx, 150);
  378. return ctx.accum_err;
  379. }
  380. static int ili9882t_unprepare(struct drm_panel *panel)
  381. {
  382. struct ili9882t *ili = to_ili9882t(panel);
  383. gpiod_set_value(ili->enable_gpio, 0);
  384. usleep_range(1000, 2000);
  385. regulator_disable(ili->avee);
  386. regulator_disable(ili->avdd);
  387. usleep_range(5000, 7000);
  388. regulator_disable(ili->pp1800);
  389. regulator_disable(ili->pp3300);
  390. return 0;
  391. }
  392. static int ili9882t_prepare(struct drm_panel *panel)
  393. {
  394. struct ili9882t *ili = to_ili9882t(panel);
  395. int ret;
  396. gpiod_set_value(ili->enable_gpio, 0);
  397. usleep_range(1000, 1500);
  398. ret = regulator_enable(ili->pp3300);
  399. if (ret < 0)
  400. return ret;
  401. ret = regulator_enable(ili->pp1800);
  402. if (ret < 0)
  403. return ret;
  404. usleep_range(3000, 5000);
  405. ret = regulator_enable(ili->avdd);
  406. if (ret < 0)
  407. goto poweroff1v8;
  408. ret = regulator_enable(ili->avee);
  409. if (ret < 0)
  410. goto poweroffavdd;
  411. usleep_range(10000, 11000);
  412. // MIPI needs to keep the LP11 state before the lcm_reset pin is pulled high
  413. ret = mipi_dsi_dcs_nop(ili->dsi);
  414. if (ret < 0) {
  415. dev_err(&ili->dsi->dev, "Failed to send NOP: %d\n", ret);
  416. goto poweroff;
  417. }
  418. usleep_range(1000, 2000);
  419. gpiod_set_value(ili->enable_gpio, 1);
  420. usleep_range(1000, 2000);
  421. gpiod_set_value(ili->enable_gpio, 0);
  422. msleep(50);
  423. gpiod_set_value(ili->enable_gpio, 1);
  424. usleep_range(6000, 10000);
  425. ret = ili->desc->init(ili);
  426. if (ret < 0)
  427. goto poweroff;
  428. return 0;
  429. poweroff:
  430. gpiod_set_value(ili->enable_gpio, 0);
  431. regulator_disable(ili->avee);
  432. poweroffavdd:
  433. regulator_disable(ili->avdd);
  434. poweroff1v8:
  435. usleep_range(5000, 7000);
  436. regulator_disable(ili->pp1800);
  437. return ret;
  438. }
  439. static int ili9882t_enable(struct drm_panel *panel)
  440. {
  441. msleep(130);
  442. return 0;
  443. }
  444. static const struct drm_display_mode starry_ili9882t_default_mode = {
  445. .clock = 165280,
  446. .hdisplay = 1200,
  447. .hsync_start = 1200 + 72,
  448. .hsync_end = 1200 + 72 + 30,
  449. .htotal = 1200 + 72 + 30 + 72,
  450. .vdisplay = 1920,
  451. .vsync_start = 1920 + 68,
  452. .vsync_end = 1920 + 68 + 2,
  453. .vtotal = 1920 + 68 + 2 + 10,
  454. .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  455. };
  456. static const struct panel_desc starry_ili9882t_desc = {
  457. .modes = &starry_ili9882t_default_mode,
  458. .bpc = 8,
  459. .size = {
  460. .width_mm = 141,
  461. .height_mm = 226,
  462. },
  463. .lanes = 4,
  464. .format = MIPI_DSI_FMT_RGB888,
  465. .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
  466. MIPI_DSI_MODE_LPM,
  467. .init = starry_ili9882t_init,
  468. };
  469. static int ili9882t_get_modes(struct drm_panel *panel,
  470. struct drm_connector *connector)
  471. {
  472. struct ili9882t *ili = to_ili9882t(panel);
  473. const struct drm_display_mode *m = ili->desc->modes;
  474. struct drm_display_mode *mode;
  475. mode = drm_mode_duplicate(connector->dev, m);
  476. if (!mode) {
  477. dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
  478. m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
  479. return -ENOMEM;
  480. }
  481. mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
  482. drm_mode_set_name(mode);
  483. drm_mode_probed_add(connector, mode);
  484. connector->display_info.width_mm = ili->desc->size.width_mm;
  485. connector->display_info.height_mm = ili->desc->size.height_mm;
  486. connector->display_info.bpc = ili->desc->bpc;
  487. return 1;
  488. }
  489. static enum drm_panel_orientation ili9882t_get_orientation(struct drm_panel *panel)
  490. {
  491. struct ili9882t *ili = to_ili9882t(panel);
  492. return ili->orientation;
  493. }
  494. static const struct drm_panel_funcs ili9882t_funcs = {
  495. .disable = ili9882t_disable,
  496. .unprepare = ili9882t_unprepare,
  497. .prepare = ili9882t_prepare,
  498. .enable = ili9882t_enable,
  499. .get_modes = ili9882t_get_modes,
  500. .get_orientation = ili9882t_get_orientation,
  501. };
  502. static int ili9882t_add(struct ili9882t *ili)
  503. {
  504. struct device *dev = &ili->dsi->dev;
  505. int err;
  506. ili->avdd = devm_regulator_get(dev, "avdd");
  507. if (IS_ERR(ili->avdd))
  508. return PTR_ERR(ili->avdd);
  509. ili->avee = devm_regulator_get(dev, "avee");
  510. if (IS_ERR(ili->avee))
  511. return PTR_ERR(ili->avee);
  512. ili->pp3300 = devm_regulator_get(dev, "pp3300");
  513. if (IS_ERR(ili->pp3300))
  514. return PTR_ERR(ili->pp3300);
  515. ili->pp1800 = devm_regulator_get(dev, "pp1800");
  516. if (IS_ERR(ili->pp1800))
  517. return PTR_ERR(ili->pp1800);
  518. ili->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
  519. if (IS_ERR(ili->enable_gpio)) {
  520. dev_err(dev, "cannot get enable-gpios %ld\n",
  521. PTR_ERR(ili->enable_gpio));
  522. return PTR_ERR(ili->enable_gpio);
  523. }
  524. gpiod_set_value(ili->enable_gpio, 0);
  525. drm_panel_init(&ili->base, dev, &ili9882t_funcs,
  526. DRM_MODE_CONNECTOR_DSI);
  527. err = of_drm_get_panel_orientation(dev->of_node, &ili->orientation);
  528. if (err < 0) {
  529. dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
  530. return err;
  531. }
  532. err = drm_panel_of_backlight(&ili->base);
  533. if (err)
  534. return err;
  535. ili->base.funcs = &ili9882t_funcs;
  536. ili->base.dev = &ili->dsi->dev;
  537. drm_panel_add(&ili->base);
  538. return 0;
  539. }
  540. static int ili9882t_probe(struct mipi_dsi_device *dsi)
  541. {
  542. struct ili9882t *ili;
  543. int ret;
  544. const struct panel_desc *desc;
  545. ili = devm_kzalloc(&dsi->dev, sizeof(*ili), GFP_KERNEL);
  546. if (!ili)
  547. return -ENOMEM;
  548. desc = of_device_get_match_data(&dsi->dev);
  549. dsi->lanes = desc->lanes;
  550. dsi->format = desc->format;
  551. dsi->mode_flags = desc->mode_flags;
  552. ili->desc = desc;
  553. ili->dsi = dsi;
  554. ret = ili9882t_add(ili);
  555. if (ret < 0)
  556. return ret;
  557. mipi_dsi_set_drvdata(dsi, ili);
  558. ret = mipi_dsi_attach(dsi);
  559. if (ret)
  560. drm_panel_remove(&ili->base);
  561. return ret;
  562. }
  563. static void ili9882t_remove(struct mipi_dsi_device *dsi)
  564. {
  565. struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
  566. int ret;
  567. ret = mipi_dsi_detach(dsi);
  568. if (ret < 0)
  569. dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
  570. if (ili->base.dev)
  571. drm_panel_remove(&ili->base);
  572. }
  573. static const struct of_device_id ili9882t_of_match[] = {
  574. { .compatible = "starry,ili9882t",
  575. .data = &starry_ili9882t_desc
  576. },
  577. { /* sentinel */ }
  578. };
  579. MODULE_DEVICE_TABLE(of, ili9882t_of_match);
  580. static struct mipi_dsi_driver ili9882t_driver = {
  581. .driver = {
  582. .name = "panel-ili9882t",
  583. .of_match_table = ili9882t_of_match,
  584. },
  585. .probe = ili9882t_probe,
  586. .remove = ili9882t_remove,
  587. };
  588. module_mipi_dsi_driver(ili9882t_driver);
  589. MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
  590. MODULE_DESCRIPTION("Ilitek ILI9882T-based panels driver");
  591. MODULE_LICENSE("GPL");