panthor_device.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0 or MIT
  2. /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
  3. /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
  4. /* Copyright 2023 Collabora ltd. */
  5. #include <linux/clk.h>
  6. #include <linux/mm.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/pm_domain.h>
  9. #include <linux/pm_runtime.h>
  10. #include <linux/regulator/consumer.h>
  11. #include <linux/reset.h>
  12. #include <drm/drm_drv.h>
  13. #include <drm/drm_managed.h>
  14. #include "panthor_devfreq.h"
  15. #include "panthor_device.h"
  16. #include "panthor_fw.h"
  17. #include "panthor_gpu.h"
  18. #include "panthor_mmu.h"
  19. #include "panthor_regs.h"
  20. #include "panthor_sched.h"
  21. static int panthor_clk_init(struct panthor_device *ptdev)
  22. {
  23. ptdev->clks.core = devm_clk_get(ptdev->base.dev, NULL);
  24. if (IS_ERR(ptdev->clks.core))
  25. return dev_err_probe(ptdev->base.dev,
  26. PTR_ERR(ptdev->clks.core),
  27. "get 'core' clock failed");
  28. ptdev->clks.stacks = devm_clk_get_optional(ptdev->base.dev, "stacks");
  29. if (IS_ERR(ptdev->clks.stacks))
  30. return dev_err_probe(ptdev->base.dev,
  31. PTR_ERR(ptdev->clks.stacks),
  32. "get 'stacks' clock failed");
  33. ptdev->clks.coregroup = devm_clk_get_optional(ptdev->base.dev, "coregroup");
  34. if (IS_ERR(ptdev->clks.coregroup))
  35. return dev_err_probe(ptdev->base.dev,
  36. PTR_ERR(ptdev->clks.coregroup),
  37. "get 'coregroup' clock failed");
  38. drm_info(&ptdev->base, "clock rate = %lu\n", clk_get_rate(ptdev->clks.core));
  39. return 0;
  40. }
  41. void panthor_device_unplug(struct panthor_device *ptdev)
  42. {
  43. /* This function can be called from two different path: the reset work
  44. * and the platform device remove callback. drm_dev_unplug() doesn't
  45. * deal with concurrent callers, so we have to protect drm_dev_unplug()
  46. * calls with our own lock, and bail out if the device is already
  47. * unplugged.
  48. */
  49. mutex_lock(&ptdev->unplug.lock);
  50. if (drm_dev_is_unplugged(&ptdev->base)) {
  51. /* Someone beat us, release the lock and wait for the unplug
  52. * operation to be reported as done.
  53. **/
  54. mutex_unlock(&ptdev->unplug.lock);
  55. wait_for_completion(&ptdev->unplug.done);
  56. return;
  57. }
  58. /* Call drm_dev_unplug() so any access to HW blocks happening after
  59. * that point get rejected.
  60. */
  61. drm_dev_unplug(&ptdev->base);
  62. /* We do the rest of the unplug with the unplug lock released,
  63. * future callers will wait on ptdev->unplug.done anyway.
  64. */
  65. mutex_unlock(&ptdev->unplug.lock);
  66. drm_WARN_ON(&ptdev->base, pm_runtime_get_sync(ptdev->base.dev) < 0);
  67. /* Now, try to cleanly shutdown the GPU before the device resources
  68. * get reclaimed.
  69. */
  70. panthor_sched_unplug(ptdev);
  71. panthor_fw_unplug(ptdev);
  72. panthor_mmu_unplug(ptdev);
  73. panthor_gpu_unplug(ptdev);
  74. pm_runtime_dont_use_autosuspend(ptdev->base.dev);
  75. pm_runtime_put_sync_suspend(ptdev->base.dev);
  76. /* If PM is disabled, we need to call the suspend handler manually. */
  77. if (!IS_ENABLED(CONFIG_PM))
  78. panthor_device_suspend(ptdev->base.dev);
  79. /* Report the unplug operation as done to unblock concurrent
  80. * panthor_device_unplug() callers.
  81. */
  82. complete_all(&ptdev->unplug.done);
  83. }
  84. static void panthor_device_reset_cleanup(struct drm_device *ddev, void *data)
  85. {
  86. struct panthor_device *ptdev = container_of(ddev, struct panthor_device, base);
  87. cancel_work_sync(&ptdev->reset.work);
  88. destroy_workqueue(ptdev->reset.wq);
  89. }
  90. static void panthor_device_reset_work(struct work_struct *work)
  91. {
  92. struct panthor_device *ptdev = container_of(work, struct panthor_device, reset.work);
  93. int ret = 0, cookie;
  94. if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE) {
  95. /*
  96. * No need for a reset as the device has been (or will be)
  97. * powered down
  98. */
  99. atomic_set(&ptdev->reset.pending, 0);
  100. return;
  101. }
  102. if (!drm_dev_enter(&ptdev->base, &cookie))
  103. return;
  104. panthor_sched_pre_reset(ptdev);
  105. panthor_fw_pre_reset(ptdev, true);
  106. panthor_mmu_pre_reset(ptdev);
  107. panthor_gpu_soft_reset(ptdev);
  108. panthor_gpu_l2_power_on(ptdev);
  109. panthor_mmu_post_reset(ptdev);
  110. ret = panthor_fw_post_reset(ptdev);
  111. atomic_set(&ptdev->reset.pending, 0);
  112. panthor_sched_post_reset(ptdev, ret != 0);
  113. drm_dev_exit(cookie);
  114. if (ret) {
  115. panthor_device_unplug(ptdev);
  116. drm_err(&ptdev->base, "Failed to boot MCU after reset, making device unusable.");
  117. }
  118. }
  119. static bool panthor_device_is_initialized(struct panthor_device *ptdev)
  120. {
  121. return !!ptdev->scheduler;
  122. }
  123. static void panthor_device_free_page(struct drm_device *ddev, void *data)
  124. {
  125. __free_page(data);
  126. }
  127. int panthor_device_init(struct panthor_device *ptdev)
  128. {
  129. u32 *dummy_page_virt;
  130. struct resource *res;
  131. struct page *p;
  132. int ret;
  133. ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;
  134. init_completion(&ptdev->unplug.done);
  135. ret = drmm_mutex_init(&ptdev->base, &ptdev->unplug.lock);
  136. if (ret)
  137. return ret;
  138. ret = drmm_mutex_init(&ptdev->base, &ptdev->pm.mmio_lock);
  139. if (ret)
  140. return ret;
  141. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
  142. p = alloc_page(GFP_KERNEL | __GFP_ZERO);
  143. if (!p)
  144. return -ENOMEM;
  145. ptdev->pm.dummy_latest_flush = p;
  146. dummy_page_virt = page_address(p);
  147. ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_free_page,
  148. ptdev->pm.dummy_latest_flush);
  149. if (ret)
  150. return ret;
  151. /*
  152. * Set the dummy page holding the latest flush to 1. This will cause the
  153. * flush to avoided as we know it isn't necessary if the submission
  154. * happens while the dummy page is mapped. Zero cannot be used because
  155. * that means 'always flush'.
  156. */
  157. *dummy_page_virt = 1;
  158. INIT_WORK(&ptdev->reset.work, panthor_device_reset_work);
  159. ptdev->reset.wq = alloc_ordered_workqueue("panthor-reset-wq", 0);
  160. if (!ptdev->reset.wq)
  161. return -ENOMEM;
  162. ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_reset_cleanup, NULL);
  163. if (ret)
  164. return ret;
  165. ret = panthor_clk_init(ptdev);
  166. if (ret)
  167. return ret;
  168. ret = panthor_devfreq_init(ptdev);
  169. if (ret)
  170. return ret;
  171. ptdev->iomem = devm_platform_get_and_ioremap_resource(to_platform_device(ptdev->base.dev),
  172. 0, &res);
  173. if (IS_ERR(ptdev->iomem))
  174. return PTR_ERR(ptdev->iomem);
  175. ptdev->phys_addr = res->start;
  176. ret = devm_pm_runtime_enable(ptdev->base.dev);
  177. if (ret)
  178. return ret;
  179. ret = pm_runtime_resume_and_get(ptdev->base.dev);
  180. if (ret)
  181. return ret;
  182. /* If PM is disabled, we need to call panthor_device_resume() manually. */
  183. if (!IS_ENABLED(CONFIG_PM)) {
  184. ret = panthor_device_resume(ptdev->base.dev);
  185. if (ret)
  186. return ret;
  187. }
  188. ret = panthor_gpu_init(ptdev);
  189. if (ret)
  190. goto err_rpm_put;
  191. ret = panthor_mmu_init(ptdev);
  192. if (ret)
  193. goto err_unplug_gpu;
  194. ret = panthor_fw_init(ptdev);
  195. if (ret)
  196. goto err_unplug_mmu;
  197. ret = panthor_sched_init(ptdev);
  198. if (ret)
  199. goto err_unplug_fw;
  200. /* ~3 frames */
  201. pm_runtime_set_autosuspend_delay(ptdev->base.dev, 50);
  202. pm_runtime_use_autosuspend(ptdev->base.dev);
  203. ret = drm_dev_register(&ptdev->base, 0);
  204. if (ret)
  205. goto err_disable_autosuspend;
  206. pm_runtime_put_autosuspend(ptdev->base.dev);
  207. return 0;
  208. err_disable_autosuspend:
  209. pm_runtime_dont_use_autosuspend(ptdev->base.dev);
  210. panthor_sched_unplug(ptdev);
  211. err_unplug_fw:
  212. panthor_fw_unplug(ptdev);
  213. err_unplug_mmu:
  214. panthor_mmu_unplug(ptdev);
  215. err_unplug_gpu:
  216. panthor_gpu_unplug(ptdev);
  217. err_rpm_put:
  218. pm_runtime_put_sync_suspend(ptdev->base.dev);
  219. return ret;
  220. }
  221. #define PANTHOR_EXCEPTION(id) \
  222. [DRM_PANTHOR_EXCEPTION_ ## id] = { \
  223. .name = #id, \
  224. }
  225. struct panthor_exception_info {
  226. const char *name;
  227. };
  228. static const struct panthor_exception_info panthor_exception_infos[] = {
  229. PANTHOR_EXCEPTION(OK),
  230. PANTHOR_EXCEPTION(TERMINATED),
  231. PANTHOR_EXCEPTION(KABOOM),
  232. PANTHOR_EXCEPTION(EUREKA),
  233. PANTHOR_EXCEPTION(ACTIVE),
  234. PANTHOR_EXCEPTION(CS_RES_TERM),
  235. PANTHOR_EXCEPTION(CS_CONFIG_FAULT),
  236. PANTHOR_EXCEPTION(CS_UNRECOVERABLE),
  237. PANTHOR_EXCEPTION(CS_ENDPOINT_FAULT),
  238. PANTHOR_EXCEPTION(CS_BUS_FAULT),
  239. PANTHOR_EXCEPTION(CS_INSTR_INVALID),
  240. PANTHOR_EXCEPTION(CS_CALL_STACK_OVERFLOW),
  241. PANTHOR_EXCEPTION(CS_INHERIT_FAULT),
  242. PANTHOR_EXCEPTION(INSTR_INVALID_PC),
  243. PANTHOR_EXCEPTION(INSTR_INVALID_ENC),
  244. PANTHOR_EXCEPTION(INSTR_BARRIER_FAULT),
  245. PANTHOR_EXCEPTION(DATA_INVALID_FAULT),
  246. PANTHOR_EXCEPTION(TILE_RANGE_FAULT),
  247. PANTHOR_EXCEPTION(ADDR_RANGE_FAULT),
  248. PANTHOR_EXCEPTION(IMPRECISE_FAULT),
  249. PANTHOR_EXCEPTION(OOM),
  250. PANTHOR_EXCEPTION(CSF_FW_INTERNAL_ERROR),
  251. PANTHOR_EXCEPTION(CSF_RES_EVICTION_TIMEOUT),
  252. PANTHOR_EXCEPTION(GPU_BUS_FAULT),
  253. PANTHOR_EXCEPTION(GPU_SHAREABILITY_FAULT),
  254. PANTHOR_EXCEPTION(SYS_SHAREABILITY_FAULT),
  255. PANTHOR_EXCEPTION(GPU_CACHEABILITY_FAULT),
  256. PANTHOR_EXCEPTION(TRANSLATION_FAULT_0),
  257. PANTHOR_EXCEPTION(TRANSLATION_FAULT_1),
  258. PANTHOR_EXCEPTION(TRANSLATION_FAULT_2),
  259. PANTHOR_EXCEPTION(TRANSLATION_FAULT_3),
  260. PANTHOR_EXCEPTION(TRANSLATION_FAULT_4),
  261. PANTHOR_EXCEPTION(PERM_FAULT_0),
  262. PANTHOR_EXCEPTION(PERM_FAULT_1),
  263. PANTHOR_EXCEPTION(PERM_FAULT_2),
  264. PANTHOR_EXCEPTION(PERM_FAULT_3),
  265. PANTHOR_EXCEPTION(ACCESS_FLAG_1),
  266. PANTHOR_EXCEPTION(ACCESS_FLAG_2),
  267. PANTHOR_EXCEPTION(ACCESS_FLAG_3),
  268. PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_IN),
  269. PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT0),
  270. PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT1),
  271. PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT2),
  272. PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT3),
  273. PANTHOR_EXCEPTION(MEM_ATTR_FAULT_0),
  274. PANTHOR_EXCEPTION(MEM_ATTR_FAULT_1),
  275. PANTHOR_EXCEPTION(MEM_ATTR_FAULT_2),
  276. PANTHOR_EXCEPTION(MEM_ATTR_FAULT_3),
  277. };
  278. const char *panthor_exception_name(struct panthor_device *ptdev, u32 exception_code)
  279. {
  280. if (exception_code >= ARRAY_SIZE(panthor_exception_infos) ||
  281. !panthor_exception_infos[exception_code].name)
  282. return "Unknown exception type";
  283. return panthor_exception_infos[exception_code].name;
  284. }
  285. static vm_fault_t panthor_mmio_vm_fault(struct vm_fault *vmf)
  286. {
  287. struct vm_area_struct *vma = vmf->vma;
  288. struct panthor_device *ptdev = vma->vm_private_data;
  289. u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
  290. unsigned long pfn;
  291. pgprot_t pgprot;
  292. vm_fault_t ret;
  293. bool active;
  294. int cookie;
  295. if (!drm_dev_enter(&ptdev->base, &cookie))
  296. return VM_FAULT_SIGBUS;
  297. mutex_lock(&ptdev->pm.mmio_lock);
  298. active = atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE;
  299. switch (offset) {
  300. case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
  301. if (active)
  302. pfn = __phys_to_pfn(ptdev->phys_addr + CSF_GPU_LATEST_FLUSH_ID);
  303. else
  304. pfn = page_to_pfn(ptdev->pm.dummy_latest_flush);
  305. break;
  306. default:
  307. ret = VM_FAULT_SIGBUS;
  308. goto out_unlock;
  309. }
  310. pgprot = vma->vm_page_prot;
  311. if (active)
  312. pgprot = pgprot_noncached(pgprot);
  313. ret = vmf_insert_pfn_prot(vma, vmf->address, pfn, pgprot);
  314. out_unlock:
  315. mutex_unlock(&ptdev->pm.mmio_lock);
  316. drm_dev_exit(cookie);
  317. return ret;
  318. }
  319. static const struct vm_operations_struct panthor_mmio_vm_ops = {
  320. .fault = panthor_mmio_vm_fault,
  321. };
  322. int panthor_device_mmap_io(struct panthor_device *ptdev, struct vm_area_struct *vma)
  323. {
  324. u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
  325. if ((vma->vm_flags & VM_SHARED) == 0)
  326. return -EINVAL;
  327. switch (offset) {
  328. case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
  329. if (vma->vm_end - vma->vm_start != PAGE_SIZE ||
  330. (vma->vm_flags & (VM_WRITE | VM_EXEC)))
  331. return -EINVAL;
  332. vm_flags_clear(vma, VM_MAYWRITE);
  333. break;
  334. default:
  335. return -EINVAL;
  336. }
  337. /* Defer actual mapping to the fault handler. */
  338. vma->vm_private_data = ptdev;
  339. vma->vm_ops = &panthor_mmio_vm_ops;
  340. vm_flags_set(vma,
  341. VM_IO | VM_DONTCOPY | VM_DONTEXPAND |
  342. VM_NORESERVE | VM_DONTDUMP | VM_PFNMAP);
  343. return 0;
  344. }
  345. int panthor_device_resume(struct device *dev)
  346. {
  347. struct panthor_device *ptdev = dev_get_drvdata(dev);
  348. int ret, cookie;
  349. if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_SUSPENDED)
  350. return -EINVAL;
  351. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_RESUMING);
  352. ret = clk_prepare_enable(ptdev->clks.core);
  353. if (ret)
  354. goto err_set_suspended;
  355. ret = clk_prepare_enable(ptdev->clks.stacks);
  356. if (ret)
  357. goto err_disable_core_clk;
  358. ret = clk_prepare_enable(ptdev->clks.coregroup);
  359. if (ret)
  360. goto err_disable_stacks_clk;
  361. ret = panthor_devfreq_resume(ptdev);
  362. if (ret)
  363. goto err_disable_coregroup_clk;
  364. if (panthor_device_is_initialized(ptdev) &&
  365. drm_dev_enter(&ptdev->base, &cookie)) {
  366. panthor_gpu_resume(ptdev);
  367. panthor_mmu_resume(ptdev);
  368. ret = panthor_fw_resume(ptdev);
  369. if (!drm_WARN_ON(&ptdev->base, ret)) {
  370. panthor_sched_resume(ptdev);
  371. } else {
  372. panthor_mmu_suspend(ptdev);
  373. panthor_gpu_suspend(ptdev);
  374. }
  375. drm_dev_exit(cookie);
  376. if (ret)
  377. goto err_suspend_devfreq;
  378. }
  379. if (atomic_read(&ptdev->reset.pending))
  380. queue_work(ptdev->reset.wq, &ptdev->reset.work);
  381. /* Clear all IOMEM mappings pointing to this device after we've
  382. * resumed. This way the fake mappings pointing to the dummy pages
  383. * are removed and the real iomem mapping will be restored on next
  384. * access.
  385. */
  386. mutex_lock(&ptdev->pm.mmio_lock);
  387. unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
  388. DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
  389. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_ACTIVE);
  390. mutex_unlock(&ptdev->pm.mmio_lock);
  391. return 0;
  392. err_suspend_devfreq:
  393. panthor_devfreq_suspend(ptdev);
  394. err_disable_coregroup_clk:
  395. clk_disable_unprepare(ptdev->clks.coregroup);
  396. err_disable_stacks_clk:
  397. clk_disable_unprepare(ptdev->clks.stacks);
  398. err_disable_core_clk:
  399. clk_disable_unprepare(ptdev->clks.core);
  400. err_set_suspended:
  401. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
  402. return ret;
  403. }
  404. int panthor_device_suspend(struct device *dev)
  405. {
  406. struct panthor_device *ptdev = dev_get_drvdata(dev);
  407. int ret, cookie;
  408. if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE)
  409. return -EINVAL;
  410. /* Clear all IOMEM mappings pointing to this device before we
  411. * shutdown the power-domain and clocks. Failing to do that results
  412. * in external aborts when the process accesses the iomem region.
  413. * We change the state and call unmap_mapping_range() with the
  414. * mmio_lock held to make sure the vm_fault handler won't set up
  415. * invalid mappings.
  416. */
  417. mutex_lock(&ptdev->pm.mmio_lock);
  418. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDING);
  419. unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
  420. DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
  421. mutex_unlock(&ptdev->pm.mmio_lock);
  422. if (panthor_device_is_initialized(ptdev) &&
  423. drm_dev_enter(&ptdev->base, &cookie)) {
  424. cancel_work_sync(&ptdev->reset.work);
  425. /* We prepare everything as if we were resetting the GPU.
  426. * The end of the reset will happen in the resume path though.
  427. */
  428. panthor_sched_suspend(ptdev);
  429. panthor_fw_suspend(ptdev);
  430. panthor_mmu_suspend(ptdev);
  431. panthor_gpu_suspend(ptdev);
  432. drm_dev_exit(cookie);
  433. }
  434. ret = panthor_devfreq_suspend(ptdev);
  435. if (ret) {
  436. if (panthor_device_is_initialized(ptdev) &&
  437. drm_dev_enter(&ptdev->base, &cookie)) {
  438. panthor_gpu_resume(ptdev);
  439. panthor_mmu_resume(ptdev);
  440. drm_WARN_ON(&ptdev->base, panthor_fw_resume(ptdev));
  441. panthor_sched_resume(ptdev);
  442. drm_dev_exit(cookie);
  443. }
  444. goto err_set_active;
  445. }
  446. clk_disable_unprepare(ptdev->clks.coregroup);
  447. clk_disable_unprepare(ptdev->clks.stacks);
  448. clk_disable_unprepare(ptdev->clks.core);
  449. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
  450. return 0;
  451. err_set_active:
  452. /* If something failed and we have to revert back to an
  453. * active state, we also need to clear the MMIO userspace
  454. * mappings, so any dumb pages that were mapped while we
  455. * were trying to suspend gets invalidated.
  456. */
  457. mutex_lock(&ptdev->pm.mmio_lock);
  458. atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_ACTIVE);
  459. unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
  460. DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
  461. mutex_unlock(&ptdev->pm.mmio_lock);
  462. return ret;
  463. }