vc4_dpi.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2016 Broadcom Limited
  4. */
  5. /**
  6. * DOC: VC4 DPI module
  7. *
  8. * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
  9. * signals. On BCM2835, these can be routed out to GPIO0-27 with the
  10. * ALT2 function.
  11. */
  12. #include <drm/drm_atomic_helper.h>
  13. #include <drm/drm_bridge.h>
  14. #include <drm/drm_drv.h>
  15. #include <drm/drm_edid.h>
  16. #include <drm/drm_of.h>
  17. #include <drm/drm_panel.h>
  18. #include <drm/drm_probe_helper.h>
  19. #include <drm/drm_simple_kms_helper.h>
  20. #include <linux/clk.h>
  21. #include <linux/component.h>
  22. #include <linux/media-bus-format.h>
  23. #include <linux/mod_devicetable.h>
  24. #include <linux/platform_device.h>
  25. #include "vc4_drv.h"
  26. #include "vc4_regs.h"
  27. #define DPI_C 0x00
  28. # define DPI_OUTPUT_ENABLE_MODE BIT(16)
  29. /* The order field takes the incoming 24 bit RGB from the pixel valve
  30. * and shuffles the 3 channels.
  31. */
  32. # define DPI_ORDER_MASK VC4_MASK(15, 14)
  33. # define DPI_ORDER_SHIFT 14
  34. # define DPI_ORDER_RGB 0
  35. # define DPI_ORDER_BGR 1
  36. # define DPI_ORDER_GRB 2
  37. # define DPI_ORDER_BRG 3
  38. /* The format field takes the ORDER-shuffled pixel valve data and
  39. * formats it onto the output lines.
  40. */
  41. # define DPI_FORMAT_MASK VC4_MASK(13, 11)
  42. # define DPI_FORMAT_SHIFT 11
  43. /* This define is named in the hardware, but actually just outputs 0. */
  44. # define DPI_FORMAT_9BIT_666_RGB 0
  45. /* Outputs 00000000rrrrrggggggbbbbb */
  46. # define DPI_FORMAT_16BIT_565_RGB_1 1
  47. /* Outputs 000rrrrr00gggggg000bbbbb */
  48. # define DPI_FORMAT_16BIT_565_RGB_2 2
  49. /* Outputs 00rrrrr000gggggg00bbbbb0 */
  50. # define DPI_FORMAT_16BIT_565_RGB_3 3
  51. /* Outputs 000000rrrrrrggggggbbbbbb */
  52. # define DPI_FORMAT_18BIT_666_RGB_1 4
  53. /* Outputs 00rrrrrr00gggggg00bbbbbb */
  54. # define DPI_FORMAT_18BIT_666_RGB_2 5
  55. /* Outputs rrrrrrrrggggggggbbbbbbbb */
  56. # define DPI_FORMAT_24BIT_888_RGB 6
  57. /* Reverses the polarity of the corresponding signal */
  58. # define DPI_PIXEL_CLK_INVERT BIT(10)
  59. # define DPI_HSYNC_INVERT BIT(9)
  60. # define DPI_VSYNC_INVERT BIT(8)
  61. # define DPI_OUTPUT_ENABLE_INVERT BIT(7)
  62. /* Outputs the signal the falling clock edge instead of rising. */
  63. # define DPI_HSYNC_NEGATE BIT(6)
  64. # define DPI_VSYNC_NEGATE BIT(5)
  65. # define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
  66. /* Disables the signal */
  67. # define DPI_HSYNC_DISABLE BIT(3)
  68. # define DPI_VSYNC_DISABLE BIT(2)
  69. # define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
  70. /* Power gate to the device, full reset at 0 -> 1 transition */
  71. # define DPI_ENABLE BIT(0)
  72. /* All other registers besides DPI_C return the ID */
  73. #define DPI_ID 0x04
  74. # define DPI_ID_VALUE 0x00647069
  75. /* General DPI hardware state. */
  76. struct vc4_dpi {
  77. struct vc4_encoder encoder;
  78. struct platform_device *pdev;
  79. void __iomem *regs;
  80. struct clk *pixel_clock;
  81. struct clk *core_clock;
  82. struct debugfs_regset32 regset;
  83. };
  84. #define to_vc4_dpi(_encoder) \
  85. container_of_const(_encoder, struct vc4_dpi, encoder.base)
  86. #define DPI_READ(offset) \
  87. ({ \
  88. kunit_fail_current_test("Accessing a register in a unit test!\n"); \
  89. readl(dpi->regs + (offset)); \
  90. })
  91. #define DPI_WRITE(offset, val) \
  92. do { \
  93. kunit_fail_current_test("Accessing a register in a unit test!\n"); \
  94. writel(val, dpi->regs + (offset)); \
  95. } while (0)
  96. static const struct debugfs_reg32 dpi_regs[] = {
  97. VC4_REG32(DPI_C),
  98. VC4_REG32(DPI_ID),
  99. };
  100. static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
  101. {
  102. struct drm_device *dev = encoder->dev;
  103. struct vc4_dpi *dpi = to_vc4_dpi(encoder);
  104. int idx;
  105. if (!drm_dev_enter(dev, &idx))
  106. return;
  107. clk_disable_unprepare(dpi->pixel_clock);
  108. drm_dev_exit(idx);
  109. }
  110. static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
  111. {
  112. struct drm_device *dev = encoder->dev;
  113. struct drm_display_mode *mode = &encoder->crtc->mode;
  114. struct vc4_dpi *dpi = to_vc4_dpi(encoder);
  115. struct drm_connector_list_iter conn_iter;
  116. struct drm_connector *connector = NULL, *connector_scan;
  117. u32 dpi_c = DPI_ENABLE;
  118. int idx;
  119. int ret;
  120. /* Look up the connector attached to DPI so we can get the
  121. * bus_format. Ideally the bridge would tell us the
  122. * bus_format we want, but it doesn't yet, so assume that it's
  123. * uniform throughout the bridge chain.
  124. */
  125. drm_connector_list_iter_begin(dev, &conn_iter);
  126. drm_for_each_connector_iter(connector_scan, &conn_iter) {
  127. if (connector_scan->encoder == encoder) {
  128. connector = connector_scan;
  129. break;
  130. }
  131. }
  132. drm_connector_list_iter_end(&conn_iter);
  133. /* Default to 18bit if no connector or format found. */
  134. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
  135. if (connector) {
  136. if (connector->display_info.num_bus_formats) {
  137. u32 bus_format = connector->display_info.bus_formats[0];
  138. dpi_c &= ~DPI_FORMAT_MASK;
  139. switch (bus_format) {
  140. case MEDIA_BUS_FMT_RGB888_1X24:
  141. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
  142. DPI_FORMAT);
  143. break;
  144. case MEDIA_BUS_FMT_BGR888_1X24:
  145. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
  146. DPI_FORMAT);
  147. dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
  148. DPI_ORDER);
  149. break;
  150. case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
  151. dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
  152. fallthrough;
  153. case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
  154. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
  155. DPI_FORMAT);
  156. break;
  157. case MEDIA_BUS_FMT_BGR666_1X18:
  158. dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
  159. fallthrough;
  160. case MEDIA_BUS_FMT_RGB666_1X18:
  161. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
  162. DPI_FORMAT);
  163. break;
  164. case MEDIA_BUS_FMT_RGB565_1X16:
  165. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
  166. DPI_FORMAT);
  167. break;
  168. case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
  169. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
  170. DPI_FORMAT);
  171. break;
  172. default:
  173. drm_err(dev, "Unknown media bus format %d\n",
  174. bus_format);
  175. break;
  176. }
  177. }
  178. if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
  179. dpi_c |= DPI_PIXEL_CLK_INVERT;
  180. if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
  181. dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
  182. }
  183. if (mode->flags & DRM_MODE_FLAG_CSYNC) {
  184. if (mode->flags & DRM_MODE_FLAG_NCSYNC)
  185. dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
  186. } else {
  187. dpi_c |= DPI_OUTPUT_ENABLE_MODE;
  188. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  189. dpi_c |= DPI_HSYNC_INVERT;
  190. else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
  191. dpi_c |= DPI_HSYNC_DISABLE;
  192. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  193. dpi_c |= DPI_VSYNC_INVERT;
  194. else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
  195. dpi_c |= DPI_VSYNC_DISABLE;
  196. }
  197. if (!drm_dev_enter(dev, &idx))
  198. return;
  199. DPI_WRITE(DPI_C, dpi_c);
  200. ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
  201. if (ret)
  202. drm_err(dev, "Failed to set clock rate: %d\n", ret);
  203. ret = clk_prepare_enable(dpi->pixel_clock);
  204. if (ret)
  205. drm_err(dev, "Failed to set clock rate: %d\n", ret);
  206. drm_dev_exit(idx);
  207. }
  208. static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
  209. const struct drm_display_mode *mode)
  210. {
  211. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  212. return MODE_NO_INTERLACE;
  213. return MODE_OK;
  214. }
  215. static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
  216. .disable = vc4_dpi_encoder_disable,
  217. .enable = vc4_dpi_encoder_enable,
  218. .mode_valid = vc4_dpi_encoder_mode_valid,
  219. };
  220. static int vc4_dpi_late_register(struct drm_encoder *encoder)
  221. {
  222. struct drm_device *drm = encoder->dev;
  223. struct vc4_dpi *dpi = to_vc4_dpi(encoder);
  224. vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
  225. return 0;
  226. }
  227. static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
  228. .late_register = vc4_dpi_late_register,
  229. };
  230. static const struct of_device_id vc4_dpi_dt_match[] = {
  231. { .compatible = "brcm,bcm2835-dpi", .data = NULL },
  232. {}
  233. };
  234. /* Sets up the next link in the display chain, whether it's a panel or
  235. * a bridge.
  236. */
  237. static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
  238. {
  239. struct drm_device *drm = dpi->encoder.base.dev;
  240. struct device *dev = &dpi->pdev->dev;
  241. struct drm_bridge *bridge;
  242. bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
  243. if (IS_ERR(bridge)) {
  244. /* If nothing was connected in the DT, that's not an
  245. * error.
  246. */
  247. if (PTR_ERR(bridge) == -ENODEV)
  248. return 0;
  249. else
  250. return PTR_ERR(bridge);
  251. }
  252. return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
  253. }
  254. static void vc4_dpi_disable_clock(void *ptr)
  255. {
  256. struct vc4_dpi *dpi = ptr;
  257. clk_disable_unprepare(dpi->core_clock);
  258. }
  259. static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
  260. {
  261. struct platform_device *pdev = to_platform_device(dev);
  262. struct drm_device *drm = dev_get_drvdata(master);
  263. struct vc4_dpi *dpi;
  264. int ret;
  265. dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
  266. if (!dpi)
  267. return -ENOMEM;
  268. dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
  269. dpi->pdev = pdev;
  270. dpi->regs = vc4_ioremap_regs(pdev, 0);
  271. if (IS_ERR(dpi->regs))
  272. return PTR_ERR(dpi->regs);
  273. dpi->regset.base = dpi->regs;
  274. dpi->regset.regs = dpi_regs;
  275. dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
  276. if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
  277. dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
  278. DPI_READ(DPI_ID), DPI_ID_VALUE);
  279. return -ENODEV;
  280. }
  281. dpi->core_clock = devm_clk_get(dev, "core");
  282. if (IS_ERR(dpi->core_clock)) {
  283. ret = PTR_ERR(dpi->core_clock);
  284. if (ret != -EPROBE_DEFER)
  285. drm_err(drm, "Failed to get core clock: %d\n", ret);
  286. return ret;
  287. }
  288. dpi->pixel_clock = devm_clk_get(dev, "pixel");
  289. if (IS_ERR(dpi->pixel_clock)) {
  290. ret = PTR_ERR(dpi->pixel_clock);
  291. if (ret != -EPROBE_DEFER)
  292. drm_err(drm, "Failed to get pixel clock: %d\n", ret);
  293. return ret;
  294. }
  295. ret = clk_prepare_enable(dpi->core_clock);
  296. if (ret) {
  297. drm_err(drm, "Failed to turn on core clock: %d\n", ret);
  298. return ret;
  299. }
  300. ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
  301. if (ret)
  302. return ret;
  303. ret = drmm_encoder_init(drm, &dpi->encoder.base,
  304. &vc4_dpi_encoder_funcs,
  305. DRM_MODE_ENCODER_DPI,
  306. NULL);
  307. if (ret)
  308. return ret;
  309. drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
  310. ret = vc4_dpi_init_bridge(dpi);
  311. if (ret)
  312. return ret;
  313. dev_set_drvdata(dev, dpi);
  314. return 0;
  315. }
  316. static const struct component_ops vc4_dpi_ops = {
  317. .bind = vc4_dpi_bind,
  318. };
  319. static int vc4_dpi_dev_probe(struct platform_device *pdev)
  320. {
  321. return component_add(&pdev->dev, &vc4_dpi_ops);
  322. }
  323. static void vc4_dpi_dev_remove(struct platform_device *pdev)
  324. {
  325. component_del(&pdev->dev, &vc4_dpi_ops);
  326. }
  327. struct platform_driver vc4_dpi_driver = {
  328. .probe = vc4_dpi_dev_probe,
  329. .remove_new = vc4_dpi_dev_remove,
  330. .driver = {
  331. .name = "vc4_dpi",
  332. .of_match_table = vc4_dpi_dt_match,
  333. },
  334. };