vmwgfx_execbuf.c 137 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR MIT
  2. /**************************************************************************
  3. *
  4. * Copyright 2009 - 2023 VMware, Inc., Palo Alto, CA., USA
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_binding.h"
  28. #include "vmwgfx_bo.h"
  29. #include "vmwgfx_drv.h"
  30. #include "vmwgfx_mksstat.h"
  31. #include "vmwgfx_so.h"
  32. #include <drm/ttm/ttm_bo.h>
  33. #include <drm/ttm/ttm_placement.h>
  34. #include <linux/sync_file.h>
  35. #include <linux/hashtable.h>
  36. #include <linux/vmalloc.h>
  37. /*
  38. * Helper macro to get dx_ctx_node if available otherwise print an error
  39. * message. This is for use in command verifier function where if dx_ctx_node
  40. * is not set then command is invalid.
  41. */
  42. #define VMW_GET_CTX_NODE(__sw_context) \
  43. ({ \
  44. __sw_context->dx_ctx_node ? __sw_context->dx_ctx_node : ({ \
  45. VMW_DEBUG_USER("SM context is not set at %s\n", __func__); \
  46. __sw_context->dx_ctx_node; \
  47. }); \
  48. })
  49. #define VMW_DECLARE_CMD_VAR(__var, __type) \
  50. struct { \
  51. SVGA3dCmdHeader header; \
  52. __type body; \
  53. } __var
  54. /**
  55. * struct vmw_relocation - Buffer object relocation
  56. *
  57. * @head: List head for the command submission context's relocation list
  58. * @vbo: Non ref-counted pointer to buffer object
  59. * @mob_loc: Pointer to location for mob id to be modified
  60. * @location: Pointer to location for guest pointer to be modified
  61. */
  62. struct vmw_relocation {
  63. struct list_head head;
  64. struct vmw_bo *vbo;
  65. union {
  66. SVGAMobId *mob_loc;
  67. SVGAGuestPtr *location;
  68. };
  69. };
  70. /**
  71. * enum vmw_resource_relocation_type - Relocation type for resources
  72. *
  73. * @vmw_res_rel_normal: Traditional relocation. The resource id in the
  74. * command stream is replaced with the actual id after validation.
  75. * @vmw_res_rel_nop: NOP relocation. The command is unconditionally replaced
  76. * with a NOP.
  77. * @vmw_res_rel_cond_nop: Conditional NOP relocation. If the resource id after
  78. * validation is -1, the command is replaced with a NOP. Otherwise no action.
  79. * @vmw_res_rel_max: Last value in the enum - used for error checking
  80. */
  81. enum vmw_resource_relocation_type {
  82. vmw_res_rel_normal,
  83. vmw_res_rel_nop,
  84. vmw_res_rel_cond_nop,
  85. vmw_res_rel_max
  86. };
  87. /**
  88. * struct vmw_resource_relocation - Relocation info for resources
  89. *
  90. * @head: List head for the software context's relocation list.
  91. * @res: Non-ref-counted pointer to the resource.
  92. * @offset: Offset of single byte entries into the command buffer where the id
  93. * that needs fixup is located.
  94. * @rel_type: Type of relocation.
  95. */
  96. struct vmw_resource_relocation {
  97. struct list_head head;
  98. const struct vmw_resource *res;
  99. u32 offset:29;
  100. enum vmw_resource_relocation_type rel_type:3;
  101. };
  102. /**
  103. * struct vmw_ctx_validation_info - Extra validation metadata for contexts
  104. *
  105. * @head: List head of context list
  106. * @ctx: The context resource
  107. * @cur: The context's persistent binding state
  108. * @staged: The binding state changes of this command buffer
  109. */
  110. struct vmw_ctx_validation_info {
  111. struct list_head head;
  112. struct vmw_resource *ctx;
  113. struct vmw_ctx_binding_state *cur;
  114. struct vmw_ctx_binding_state *staged;
  115. };
  116. /**
  117. * struct vmw_cmd_entry - Describe a command for the verifier
  118. *
  119. * @func: Call-back to handle the command.
  120. * @user_allow: Whether allowed from the execbuf ioctl.
  121. * @gb_disable: Whether disabled if guest-backed objects are available.
  122. * @gb_enable: Whether enabled iff guest-backed objects are available.
  123. * @cmd_name: Name of the command.
  124. */
  125. struct vmw_cmd_entry {
  126. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  127. SVGA3dCmdHeader *);
  128. bool user_allow;
  129. bool gb_disable;
  130. bool gb_enable;
  131. const char *cmd_name;
  132. };
  133. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  134. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  135. (_gb_disable), (_gb_enable), #_cmd}
  136. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  137. struct vmw_sw_context *sw_context,
  138. struct vmw_resource *ctx);
  139. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  140. struct vmw_sw_context *sw_context,
  141. SVGAMobId *id,
  142. struct vmw_bo **vmw_bo_p);
  143. /**
  144. * vmw_ptr_diff - Compute the offset from a to b in bytes
  145. *
  146. * @a: A starting pointer.
  147. * @b: A pointer offset in the same address space.
  148. *
  149. * Returns: The offset in bytes between the two pointers.
  150. */
  151. static size_t vmw_ptr_diff(void *a, void *b)
  152. {
  153. return (unsigned long) b - (unsigned long) a;
  154. }
  155. /**
  156. * vmw_execbuf_bindings_commit - Commit modified binding state
  157. *
  158. * @sw_context: The command submission context
  159. * @backoff: Whether this is part of the error path and binding state changes
  160. * should be ignored
  161. */
  162. static void vmw_execbuf_bindings_commit(struct vmw_sw_context *sw_context,
  163. bool backoff)
  164. {
  165. struct vmw_ctx_validation_info *entry;
  166. list_for_each_entry(entry, &sw_context->ctx_list, head) {
  167. if (!backoff)
  168. vmw_binding_state_commit(entry->cur, entry->staged);
  169. if (entry->staged != sw_context->staged_bindings)
  170. vmw_binding_state_free(entry->staged);
  171. else
  172. sw_context->staged_bindings_inuse = false;
  173. }
  174. /* List entries are freed with the validation context */
  175. INIT_LIST_HEAD(&sw_context->ctx_list);
  176. }
  177. /**
  178. * vmw_bind_dx_query_mob - Bind the DX query MOB if referenced
  179. *
  180. * @sw_context: The command submission context
  181. */
  182. static void vmw_bind_dx_query_mob(struct vmw_sw_context *sw_context)
  183. {
  184. if (sw_context->dx_query_mob)
  185. vmw_context_bind_dx_query(sw_context->dx_query_ctx,
  186. sw_context->dx_query_mob);
  187. }
  188. /**
  189. * vmw_cmd_ctx_first_setup - Perform the setup needed when a context is added to
  190. * the validate list.
  191. *
  192. * @dev_priv: Pointer to the device private:
  193. * @sw_context: The command submission context
  194. * @res: Pointer to the resource
  195. * @node: The validation node holding the context resource metadata
  196. */
  197. static int vmw_cmd_ctx_first_setup(struct vmw_private *dev_priv,
  198. struct vmw_sw_context *sw_context,
  199. struct vmw_resource *res,
  200. struct vmw_ctx_validation_info *node)
  201. {
  202. int ret;
  203. ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
  204. if (unlikely(ret != 0))
  205. goto out_err;
  206. if (!sw_context->staged_bindings) {
  207. sw_context->staged_bindings = vmw_binding_state_alloc(dev_priv);
  208. if (IS_ERR(sw_context->staged_bindings)) {
  209. ret = PTR_ERR(sw_context->staged_bindings);
  210. sw_context->staged_bindings = NULL;
  211. goto out_err;
  212. }
  213. }
  214. if (sw_context->staged_bindings_inuse) {
  215. node->staged = vmw_binding_state_alloc(dev_priv);
  216. if (IS_ERR(node->staged)) {
  217. ret = PTR_ERR(node->staged);
  218. node->staged = NULL;
  219. goto out_err;
  220. }
  221. } else {
  222. node->staged = sw_context->staged_bindings;
  223. sw_context->staged_bindings_inuse = true;
  224. }
  225. node->ctx = res;
  226. node->cur = vmw_context_binding_state(res);
  227. list_add_tail(&node->head, &sw_context->ctx_list);
  228. return 0;
  229. out_err:
  230. return ret;
  231. }
  232. /**
  233. * vmw_execbuf_res_size - calculate extra size fore the resource validation node
  234. *
  235. * @dev_priv: Pointer to the device private struct.
  236. * @res_type: The resource type.
  237. *
  238. * Guest-backed contexts and DX contexts require extra size to store execbuf
  239. * private information in the validation node. Typically the binding manager
  240. * associated data structures.
  241. *
  242. * Returns: The extra size requirement based on resource type.
  243. */
  244. static unsigned int vmw_execbuf_res_size(struct vmw_private *dev_priv,
  245. enum vmw_res_type res_type)
  246. {
  247. return (res_type == vmw_res_dx_context ||
  248. (res_type == vmw_res_context && dev_priv->has_mob)) ?
  249. sizeof(struct vmw_ctx_validation_info) : 0;
  250. }
  251. /**
  252. * vmw_execbuf_rcache_update - Update a resource-node cache entry
  253. *
  254. * @rcache: Pointer to the entry to update.
  255. * @res: Pointer to the resource.
  256. * @private: Pointer to the execbuf-private space in the resource validation
  257. * node.
  258. */
  259. static void vmw_execbuf_rcache_update(struct vmw_res_cache_entry *rcache,
  260. struct vmw_resource *res,
  261. void *private)
  262. {
  263. rcache->res = res;
  264. rcache->private = private;
  265. rcache->valid = 1;
  266. rcache->valid_handle = 0;
  267. }
  268. enum vmw_val_add_flags {
  269. vmw_val_add_flag_none = 0,
  270. vmw_val_add_flag_noctx = 1 << 0,
  271. };
  272. /**
  273. * vmw_execbuf_res_val_add - Add a resource to the validation list.
  274. *
  275. * @sw_context: Pointer to the software context.
  276. * @res: Unreferenced rcu-protected pointer to the resource.
  277. * @dirty: Whether to change dirty status.
  278. * @flags: specifies whether to use the context or not
  279. *
  280. * Returns: 0 on success. Negative error code on failure. Typical error codes
  281. * are %-EINVAL on inconsistency and %-ESRCH if the resource was doomed.
  282. */
  283. static int vmw_execbuf_res_val_add(struct vmw_sw_context *sw_context,
  284. struct vmw_resource *res,
  285. u32 dirty,
  286. u32 flags)
  287. {
  288. struct vmw_private *dev_priv = res->dev_priv;
  289. int ret;
  290. enum vmw_res_type res_type = vmw_res_type(res);
  291. struct vmw_res_cache_entry *rcache;
  292. struct vmw_ctx_validation_info *ctx_info;
  293. bool first_usage;
  294. unsigned int priv_size;
  295. rcache = &sw_context->res_cache[res_type];
  296. if (likely(rcache->valid && rcache->res == res)) {
  297. if (dirty)
  298. vmw_validation_res_set_dirty(sw_context->ctx,
  299. rcache->private, dirty);
  300. return 0;
  301. }
  302. if ((flags & vmw_val_add_flag_noctx) != 0) {
  303. ret = vmw_validation_add_resource(sw_context->ctx, res, 0, dirty,
  304. (void **)&ctx_info, NULL);
  305. if (ret)
  306. return ret;
  307. } else {
  308. priv_size = vmw_execbuf_res_size(dev_priv, res_type);
  309. ret = vmw_validation_add_resource(sw_context->ctx, res, priv_size,
  310. dirty, (void **)&ctx_info,
  311. &first_usage);
  312. if (ret)
  313. return ret;
  314. if (priv_size && first_usage) {
  315. ret = vmw_cmd_ctx_first_setup(dev_priv, sw_context, res,
  316. ctx_info);
  317. if (ret) {
  318. VMW_DEBUG_USER("Failed first usage context setup.\n");
  319. return ret;
  320. }
  321. }
  322. }
  323. vmw_execbuf_rcache_update(rcache, res, ctx_info);
  324. return 0;
  325. }
  326. /**
  327. * vmw_view_res_val_add - Add a view and the surface it's pointing to to the
  328. * validation list
  329. *
  330. * @sw_context: The software context holding the validation list.
  331. * @view: Pointer to the view resource.
  332. *
  333. * Returns 0 if success, negative error code otherwise.
  334. */
  335. static int vmw_view_res_val_add(struct vmw_sw_context *sw_context,
  336. struct vmw_resource *view)
  337. {
  338. int ret;
  339. /*
  340. * First add the resource the view is pointing to, otherwise it may be
  341. * swapped out when the view is validated.
  342. */
  343. ret = vmw_execbuf_res_val_add(sw_context, vmw_view_srf(view),
  344. vmw_view_dirtying(view), vmw_val_add_flag_noctx);
  345. if (ret)
  346. return ret;
  347. return vmw_execbuf_res_val_add(sw_context, view, VMW_RES_DIRTY_NONE,
  348. vmw_val_add_flag_noctx);
  349. }
  350. /**
  351. * vmw_view_id_val_add - Look up a view and add it and the surface it's pointing
  352. * to to the validation list.
  353. *
  354. * @sw_context: The software context holding the validation list.
  355. * @view_type: The view type to look up.
  356. * @id: view id of the view.
  357. *
  358. * The view is represented by a view id and the DX context it's created on, or
  359. * scheduled for creation on. If there is no DX context set, the function will
  360. * return an -EINVAL error pointer.
  361. *
  362. * Returns: Unreferenced pointer to the resource on success, negative error
  363. * pointer on failure.
  364. */
  365. static struct vmw_resource *
  366. vmw_view_id_val_add(struct vmw_sw_context *sw_context,
  367. enum vmw_view_type view_type, u32 id)
  368. {
  369. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  370. struct vmw_resource *view;
  371. int ret;
  372. if (!ctx_node)
  373. return ERR_PTR(-EINVAL);
  374. view = vmw_view_lookup(sw_context->man, view_type, id);
  375. if (IS_ERR(view))
  376. return view;
  377. ret = vmw_view_res_val_add(sw_context, view);
  378. if (ret)
  379. return ERR_PTR(ret);
  380. return view;
  381. }
  382. /**
  383. * vmw_resource_context_res_add - Put resources previously bound to a context on
  384. * the validation list
  385. *
  386. * @dev_priv: Pointer to a device private structure
  387. * @sw_context: Pointer to a software context used for this command submission
  388. * @ctx: Pointer to the context resource
  389. *
  390. * This function puts all resources that were previously bound to @ctx on the
  391. * resource validation list. This is part of the context state reemission
  392. */
  393. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  394. struct vmw_sw_context *sw_context,
  395. struct vmw_resource *ctx)
  396. {
  397. struct list_head *binding_list;
  398. struct vmw_ctx_bindinfo *entry;
  399. int ret = 0;
  400. struct vmw_resource *res;
  401. u32 i;
  402. u32 cotable_max = has_sm5_context(ctx->dev_priv) ?
  403. SVGA_COTABLE_MAX : SVGA_COTABLE_DX10_MAX;
  404. /* Add all cotables to the validation list. */
  405. if (has_sm4_context(dev_priv) &&
  406. vmw_res_type(ctx) == vmw_res_dx_context) {
  407. for (i = 0; i < cotable_max; ++i) {
  408. res = vmw_context_cotable(ctx, i);
  409. if (IS_ERR_OR_NULL(res))
  410. continue;
  411. ret = vmw_execbuf_res_val_add(sw_context, res,
  412. VMW_RES_DIRTY_SET,
  413. vmw_val_add_flag_noctx);
  414. if (unlikely(ret != 0))
  415. return ret;
  416. }
  417. }
  418. /* Add all resources bound to the context to the validation list */
  419. mutex_lock(&dev_priv->binding_mutex);
  420. binding_list = vmw_context_binding_list(ctx);
  421. list_for_each_entry(entry, binding_list, ctx_list) {
  422. if (vmw_res_type(entry->res) == vmw_res_view)
  423. ret = vmw_view_res_val_add(sw_context, entry->res);
  424. else
  425. ret = vmw_execbuf_res_val_add(sw_context, entry->res,
  426. vmw_binding_dirtying(entry->bt),
  427. vmw_val_add_flag_noctx);
  428. if (unlikely(ret != 0))
  429. break;
  430. }
  431. if (has_sm4_context(dev_priv) &&
  432. vmw_res_type(ctx) == vmw_res_dx_context) {
  433. struct vmw_bo *dx_query_mob;
  434. dx_query_mob = vmw_context_get_dx_query_mob(ctx);
  435. if (dx_query_mob) {
  436. vmw_bo_placement_set(dx_query_mob,
  437. VMW_BO_DOMAIN_MOB,
  438. VMW_BO_DOMAIN_MOB);
  439. ret = vmw_validation_add_bo(sw_context->ctx,
  440. dx_query_mob);
  441. }
  442. }
  443. mutex_unlock(&dev_priv->binding_mutex);
  444. return ret;
  445. }
  446. /**
  447. * vmw_resource_relocation_add - Add a relocation to the relocation list
  448. *
  449. * @sw_context: Pointer to the software context.
  450. * @res: The resource.
  451. * @offset: Offset into the command buffer currently being parsed where the id
  452. * that needs fixup is located. Granularity is one byte.
  453. * @rel_type: Relocation type.
  454. */
  455. static int vmw_resource_relocation_add(struct vmw_sw_context *sw_context,
  456. const struct vmw_resource *res,
  457. unsigned long offset,
  458. enum vmw_resource_relocation_type
  459. rel_type)
  460. {
  461. struct vmw_resource_relocation *rel;
  462. rel = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*rel));
  463. if (unlikely(!rel)) {
  464. VMW_DEBUG_USER("Failed to allocate a resource relocation.\n");
  465. return -ENOMEM;
  466. }
  467. rel->res = res;
  468. rel->offset = offset;
  469. rel->rel_type = rel_type;
  470. list_add_tail(&rel->head, &sw_context->res_relocations);
  471. return 0;
  472. }
  473. /**
  474. * vmw_resource_relocations_free - Free all relocations on a list
  475. *
  476. * @list: Pointer to the head of the relocation list
  477. */
  478. static void vmw_resource_relocations_free(struct list_head *list)
  479. {
  480. /* Memory is validation context memory, so no need to free it */
  481. INIT_LIST_HEAD(list);
  482. }
  483. /**
  484. * vmw_resource_relocations_apply - Apply all relocations on a list
  485. *
  486. * @cb: Pointer to the start of the command buffer bein patch. This need not be
  487. * the same buffer as the one being parsed when the relocation list was built,
  488. * but the contents must be the same modulo the resource ids.
  489. * @list: Pointer to the head of the relocation list.
  490. */
  491. static void vmw_resource_relocations_apply(uint32_t *cb,
  492. struct list_head *list)
  493. {
  494. struct vmw_resource_relocation *rel;
  495. /* Validate the struct vmw_resource_relocation member size */
  496. BUILD_BUG_ON(SVGA_CB_MAX_SIZE >= (1 << 29));
  497. BUILD_BUG_ON(vmw_res_rel_max >= (1 << 3));
  498. list_for_each_entry(rel, list, head) {
  499. u32 *addr = (u32 *)((unsigned long) cb + rel->offset);
  500. switch (rel->rel_type) {
  501. case vmw_res_rel_normal:
  502. *addr = rel->res->id;
  503. break;
  504. case vmw_res_rel_nop:
  505. *addr = SVGA_3D_CMD_NOP;
  506. break;
  507. default:
  508. if (rel->res->id == -1)
  509. *addr = SVGA_3D_CMD_NOP;
  510. break;
  511. }
  512. }
  513. }
  514. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  515. struct vmw_sw_context *sw_context,
  516. SVGA3dCmdHeader *header)
  517. {
  518. return -EINVAL;
  519. }
  520. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  521. struct vmw_sw_context *sw_context,
  522. SVGA3dCmdHeader *header)
  523. {
  524. return 0;
  525. }
  526. /**
  527. * vmw_resources_reserve - Reserve all resources on the sw_context's resource
  528. * list.
  529. *
  530. * @sw_context: Pointer to the software context.
  531. *
  532. * Note that since vmware's command submission currently is protected by the
  533. * cmdbuf mutex, no fancy deadlock avoidance is required for resources, since
  534. * only a single thread at once will attempt this.
  535. */
  536. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  537. {
  538. int ret;
  539. ret = vmw_validation_res_reserve(sw_context->ctx, true);
  540. if (ret)
  541. return ret;
  542. if (sw_context->dx_query_mob) {
  543. struct vmw_bo *expected_dx_query_mob;
  544. expected_dx_query_mob =
  545. vmw_context_get_dx_query_mob(sw_context->dx_query_ctx);
  546. if (expected_dx_query_mob &&
  547. expected_dx_query_mob != sw_context->dx_query_mob) {
  548. ret = -EINVAL;
  549. }
  550. }
  551. return ret;
  552. }
  553. /**
  554. * vmw_cmd_res_check - Check that a resource is present and if so, put it on the
  555. * resource validate list unless it's already there.
  556. *
  557. * @dev_priv: Pointer to a device private structure.
  558. * @sw_context: Pointer to the software context.
  559. * @res_type: Resource type.
  560. * @dirty: Whether to change dirty status.
  561. * @converter: User-space visible type specific information.
  562. * @id_loc: Pointer to the location in the command buffer currently being parsed
  563. * from where the user-space resource id handle is located.
  564. * @p_res: Pointer to pointer to resource validation node. Populated on
  565. * exit.
  566. */
  567. static int
  568. vmw_cmd_res_check(struct vmw_private *dev_priv,
  569. struct vmw_sw_context *sw_context,
  570. enum vmw_res_type res_type,
  571. u32 dirty,
  572. const struct vmw_user_resource_conv *converter,
  573. uint32_t *id_loc,
  574. struct vmw_resource **p_res)
  575. {
  576. struct vmw_res_cache_entry *rcache = &sw_context->res_cache[res_type];
  577. struct vmw_resource *res;
  578. int ret = 0;
  579. bool needs_unref = false;
  580. if (p_res)
  581. *p_res = NULL;
  582. if (*id_loc == SVGA3D_INVALID_ID) {
  583. if (res_type == vmw_res_context) {
  584. VMW_DEBUG_USER("Illegal context invalid id.\n");
  585. return -EINVAL;
  586. }
  587. return 0;
  588. }
  589. if (likely(rcache->valid_handle && *id_loc == rcache->handle)) {
  590. res = rcache->res;
  591. if (dirty)
  592. vmw_validation_res_set_dirty(sw_context->ctx,
  593. rcache->private, dirty);
  594. } else {
  595. unsigned int size = vmw_execbuf_res_size(dev_priv, res_type);
  596. ret = vmw_validation_preload_res(sw_context->ctx, size);
  597. if (ret)
  598. return ret;
  599. ret = vmw_user_resource_lookup_handle
  600. (dev_priv, sw_context->fp->tfile, *id_loc, converter, &res);
  601. if (ret != 0) {
  602. VMW_DEBUG_USER("Could not find/use resource 0x%08x.\n",
  603. (unsigned int) *id_loc);
  604. return ret;
  605. }
  606. needs_unref = true;
  607. ret = vmw_execbuf_res_val_add(sw_context, res, dirty, vmw_val_add_flag_none);
  608. if (unlikely(ret != 0))
  609. goto res_check_done;
  610. if (rcache->valid && rcache->res == res) {
  611. rcache->valid_handle = true;
  612. rcache->handle = *id_loc;
  613. }
  614. }
  615. ret = vmw_resource_relocation_add(sw_context, res,
  616. vmw_ptr_diff(sw_context->buf_start,
  617. id_loc),
  618. vmw_res_rel_normal);
  619. if (p_res)
  620. *p_res = res;
  621. res_check_done:
  622. if (needs_unref)
  623. vmw_resource_unreference(&res);
  624. return ret;
  625. }
  626. /**
  627. * vmw_rebind_all_dx_query - Rebind DX query associated with the context
  628. *
  629. * @ctx_res: context the query belongs to
  630. *
  631. * This function assumes binding_mutex is held.
  632. */
  633. static int vmw_rebind_all_dx_query(struct vmw_resource *ctx_res)
  634. {
  635. struct vmw_private *dev_priv = ctx_res->dev_priv;
  636. struct vmw_bo *dx_query_mob;
  637. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindAllQuery);
  638. dx_query_mob = vmw_context_get_dx_query_mob(ctx_res);
  639. if (!dx_query_mob || dx_query_mob->dx_query_ctx)
  640. return 0;
  641. cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), ctx_res->id);
  642. if (cmd == NULL)
  643. return -ENOMEM;
  644. cmd->header.id = SVGA_3D_CMD_DX_BIND_ALL_QUERY;
  645. cmd->header.size = sizeof(cmd->body);
  646. cmd->body.cid = ctx_res->id;
  647. cmd->body.mobid = dx_query_mob->tbo.resource->start;
  648. vmw_cmd_commit(dev_priv, sizeof(*cmd));
  649. vmw_context_bind_dx_query(ctx_res, dx_query_mob);
  650. return 0;
  651. }
  652. /**
  653. * vmw_rebind_contexts - Rebind all resources previously bound to referenced
  654. * contexts.
  655. *
  656. * @sw_context: Pointer to the software context.
  657. *
  658. * Rebind context binding points that have been scrubbed because of eviction.
  659. */
  660. static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
  661. {
  662. struct vmw_ctx_validation_info *val;
  663. int ret;
  664. list_for_each_entry(val, &sw_context->ctx_list, head) {
  665. ret = vmw_binding_rebind_all(val->cur);
  666. if (unlikely(ret != 0)) {
  667. if (ret != -ERESTARTSYS)
  668. VMW_DEBUG_USER("Failed to rebind context.\n");
  669. return ret;
  670. }
  671. ret = vmw_rebind_all_dx_query(val->ctx);
  672. if (ret != 0) {
  673. VMW_DEBUG_USER("Failed to rebind queries.\n");
  674. return ret;
  675. }
  676. }
  677. return 0;
  678. }
  679. /**
  680. * vmw_view_bindings_add - Add an array of view bindings to a context binding
  681. * state tracker.
  682. *
  683. * @sw_context: The execbuf state used for this command.
  684. * @view_type: View type for the bindings.
  685. * @binding_type: Binding type for the bindings.
  686. * @shader_slot: The shader slot to user for the bindings.
  687. * @view_ids: Array of view ids to be bound.
  688. * @num_views: Number of view ids in @view_ids.
  689. * @first_slot: The binding slot to be used for the first view id in @view_ids.
  690. */
  691. static int vmw_view_bindings_add(struct vmw_sw_context *sw_context,
  692. enum vmw_view_type view_type,
  693. enum vmw_ctx_binding_type binding_type,
  694. uint32 shader_slot,
  695. uint32 view_ids[], u32 num_views,
  696. u32 first_slot)
  697. {
  698. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  699. u32 i;
  700. if (!ctx_node)
  701. return -EINVAL;
  702. for (i = 0; i < num_views; ++i) {
  703. struct vmw_ctx_bindinfo_view binding;
  704. struct vmw_resource *view = NULL;
  705. if (view_ids[i] != SVGA3D_INVALID_ID) {
  706. view = vmw_view_id_val_add(sw_context, view_type,
  707. view_ids[i]);
  708. if (IS_ERR(view)) {
  709. VMW_DEBUG_USER("View not found.\n");
  710. return PTR_ERR(view);
  711. }
  712. }
  713. binding.bi.ctx = ctx_node->ctx;
  714. binding.bi.res = view;
  715. binding.bi.bt = binding_type;
  716. binding.shader_slot = shader_slot;
  717. binding.slot = first_slot + i;
  718. vmw_binding_add(ctx_node->staged, &binding.bi,
  719. shader_slot, binding.slot);
  720. }
  721. return 0;
  722. }
  723. /**
  724. * vmw_cmd_cid_check - Check a command header for valid context information.
  725. *
  726. * @dev_priv: Pointer to a device private structure.
  727. * @sw_context: Pointer to the software context.
  728. * @header: A command header with an embedded user-space context handle.
  729. *
  730. * Convenience function: Call vmw_cmd_res_check with the user-space context
  731. * handle embedded in @header.
  732. */
  733. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  734. struct vmw_sw_context *sw_context,
  735. SVGA3dCmdHeader *header)
  736. {
  737. VMW_DECLARE_CMD_VAR(*cmd, uint32_t) =
  738. container_of(header, typeof(*cmd), header);
  739. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  740. VMW_RES_DIRTY_SET, user_context_converter,
  741. &cmd->body, NULL);
  742. }
  743. /**
  744. * vmw_execbuf_info_from_res - Get the private validation metadata for a
  745. * recently validated resource
  746. *
  747. * @sw_context: Pointer to the command submission context
  748. * @res: The resource
  749. *
  750. * The resource pointed to by @res needs to be present in the command submission
  751. * context's resource cache and hence the last resource of that type to be
  752. * processed by the validation code.
  753. *
  754. * Return: a pointer to the private metadata of the resource, or NULL if it
  755. * wasn't found
  756. */
  757. static struct vmw_ctx_validation_info *
  758. vmw_execbuf_info_from_res(struct vmw_sw_context *sw_context,
  759. struct vmw_resource *res)
  760. {
  761. struct vmw_res_cache_entry *rcache =
  762. &sw_context->res_cache[vmw_res_type(res)];
  763. if (rcache->valid && rcache->res == res)
  764. return rcache->private;
  765. WARN_ON_ONCE(true);
  766. return NULL;
  767. }
  768. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  769. struct vmw_sw_context *sw_context,
  770. SVGA3dCmdHeader *header)
  771. {
  772. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetRenderTarget);
  773. struct vmw_resource *ctx;
  774. struct vmw_resource *res;
  775. int ret;
  776. cmd = container_of(header, typeof(*cmd), header);
  777. if (cmd->body.type >= SVGA3D_RT_MAX) {
  778. VMW_DEBUG_USER("Illegal render target type %u.\n",
  779. (unsigned int) cmd->body.type);
  780. return -EINVAL;
  781. }
  782. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  783. VMW_RES_DIRTY_SET, user_context_converter,
  784. &cmd->body.cid, &ctx);
  785. if (unlikely(ret != 0))
  786. return ret;
  787. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  788. VMW_RES_DIRTY_SET, user_surface_converter,
  789. &cmd->body.target.sid, &res);
  790. if (unlikely(ret))
  791. return ret;
  792. if (dev_priv->has_mob) {
  793. struct vmw_ctx_bindinfo_view binding;
  794. struct vmw_ctx_validation_info *node;
  795. node = vmw_execbuf_info_from_res(sw_context, ctx);
  796. if (!node)
  797. return -EINVAL;
  798. binding.bi.ctx = ctx;
  799. binding.bi.res = res;
  800. binding.bi.bt = vmw_ctx_binding_rt;
  801. binding.slot = cmd->body.type;
  802. vmw_binding_add(node->staged, &binding.bi, 0, binding.slot);
  803. }
  804. return 0;
  805. }
  806. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  807. struct vmw_sw_context *sw_context,
  808. SVGA3dCmdHeader *header)
  809. {
  810. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceCopy);
  811. int ret;
  812. cmd = container_of(header, typeof(*cmd), header);
  813. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  814. VMW_RES_DIRTY_NONE, user_surface_converter,
  815. &cmd->body.src.sid, NULL);
  816. if (ret)
  817. return ret;
  818. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  819. VMW_RES_DIRTY_SET, user_surface_converter,
  820. &cmd->body.dest.sid, NULL);
  821. }
  822. static int vmw_cmd_buffer_copy_check(struct vmw_private *dev_priv,
  823. struct vmw_sw_context *sw_context,
  824. SVGA3dCmdHeader *header)
  825. {
  826. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBufferCopy);
  827. int ret;
  828. cmd = container_of(header, typeof(*cmd), header);
  829. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  830. VMW_RES_DIRTY_NONE, user_surface_converter,
  831. &cmd->body.src, NULL);
  832. if (ret != 0)
  833. return ret;
  834. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  835. VMW_RES_DIRTY_SET, user_surface_converter,
  836. &cmd->body.dest, NULL);
  837. }
  838. static int vmw_cmd_pred_copy_check(struct vmw_private *dev_priv,
  839. struct vmw_sw_context *sw_context,
  840. SVGA3dCmdHeader *header)
  841. {
  842. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXPredCopyRegion);
  843. int ret;
  844. cmd = container_of(header, typeof(*cmd), header);
  845. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  846. VMW_RES_DIRTY_NONE, user_surface_converter,
  847. &cmd->body.srcSid, NULL);
  848. if (ret != 0)
  849. return ret;
  850. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  851. VMW_RES_DIRTY_SET, user_surface_converter,
  852. &cmd->body.dstSid, NULL);
  853. }
  854. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  855. struct vmw_sw_context *sw_context,
  856. SVGA3dCmdHeader *header)
  857. {
  858. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceStretchBlt);
  859. int ret;
  860. cmd = container_of(header, typeof(*cmd), header);
  861. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  862. VMW_RES_DIRTY_NONE, user_surface_converter,
  863. &cmd->body.src.sid, NULL);
  864. if (unlikely(ret != 0))
  865. return ret;
  866. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  867. VMW_RES_DIRTY_SET, user_surface_converter,
  868. &cmd->body.dest.sid, NULL);
  869. }
  870. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  871. struct vmw_sw_context *sw_context,
  872. SVGA3dCmdHeader *header)
  873. {
  874. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBlitSurfaceToScreen) =
  875. container_of(header, typeof(*cmd), header);
  876. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  877. VMW_RES_DIRTY_NONE, user_surface_converter,
  878. &cmd->body.srcImage.sid, NULL);
  879. }
  880. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  881. struct vmw_sw_context *sw_context,
  882. SVGA3dCmdHeader *header)
  883. {
  884. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdPresent) =
  885. container_of(header, typeof(*cmd), header);
  886. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  887. VMW_RES_DIRTY_NONE, user_surface_converter,
  888. &cmd->body.sid, NULL);
  889. }
  890. /**
  891. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  892. *
  893. * @dev_priv: The device private structure.
  894. * @new_query_bo: The new buffer holding query results.
  895. * @sw_context: The software context used for this command submission.
  896. *
  897. * This function checks whether @new_query_bo is suitable for holding query
  898. * results, and if another buffer currently is pinned for query results. If so,
  899. * the function prepares the state of @sw_context for switching pinned buffers
  900. * after successful submission of the current command batch.
  901. */
  902. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  903. struct vmw_bo *new_query_bo,
  904. struct vmw_sw_context *sw_context)
  905. {
  906. struct vmw_res_cache_entry *ctx_entry =
  907. &sw_context->res_cache[vmw_res_context];
  908. int ret;
  909. BUG_ON(!ctx_entry->valid);
  910. sw_context->last_query_ctx = ctx_entry->res;
  911. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  912. if (unlikely(PFN_UP(new_query_bo->tbo.resource->size) > 4)) {
  913. VMW_DEBUG_USER("Query buffer too large.\n");
  914. return -EINVAL;
  915. }
  916. if (unlikely(sw_context->cur_query_bo != NULL)) {
  917. sw_context->needs_post_query_barrier = true;
  918. vmw_bo_placement_set_default_accelerated(sw_context->cur_query_bo);
  919. ret = vmw_validation_add_bo(sw_context->ctx,
  920. sw_context->cur_query_bo);
  921. if (unlikely(ret != 0))
  922. return ret;
  923. }
  924. sw_context->cur_query_bo = new_query_bo;
  925. vmw_bo_placement_set_default_accelerated(dev_priv->dummy_query_bo);
  926. ret = vmw_validation_add_bo(sw_context->ctx,
  927. dev_priv->dummy_query_bo);
  928. if (unlikely(ret != 0))
  929. return ret;
  930. }
  931. return 0;
  932. }
  933. /**
  934. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  935. *
  936. * @dev_priv: The device private structure.
  937. * @sw_context: The software context used for this command submission batch.
  938. *
  939. * This function will check if we're switching query buffers, and will then,
  940. * issue a dummy occlusion query wait used as a query barrier. When the fence
  941. * object following that query wait has signaled, we are sure that all preceding
  942. * queries have finished, and the old query buffer can be unpinned. However,
  943. * since both the new query buffer and the old one are fenced with that fence,
  944. * we can do an asynchronus unpin now, and be sure that the old query buffer
  945. * won't be moved until the fence has signaled.
  946. *
  947. * As mentioned above, both the new - and old query buffers need to be fenced
  948. * using a sequence emitted *after* calling this function.
  949. */
  950. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  951. struct vmw_sw_context *sw_context)
  952. {
  953. /*
  954. * The validate list should still hold references to all
  955. * contexts here.
  956. */
  957. if (sw_context->needs_post_query_barrier) {
  958. struct vmw_res_cache_entry *ctx_entry =
  959. &sw_context->res_cache[vmw_res_context];
  960. struct vmw_resource *ctx;
  961. int ret;
  962. BUG_ON(!ctx_entry->valid);
  963. ctx = ctx_entry->res;
  964. ret = vmw_cmd_emit_dummy_query(dev_priv, ctx->id);
  965. if (unlikely(ret != 0))
  966. VMW_DEBUG_USER("Out of fifo space for dummy query.\n");
  967. }
  968. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  969. if (dev_priv->pinned_bo) {
  970. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  971. vmw_bo_unreference(&dev_priv->pinned_bo);
  972. }
  973. if (!sw_context->needs_post_query_barrier) {
  974. vmw_bo_pin_reserved(sw_context->cur_query_bo, true);
  975. /*
  976. * We pin also the dummy_query_bo buffer so that we
  977. * don't need to validate it when emitting dummy queries
  978. * in context destroy paths.
  979. */
  980. if (!dev_priv->dummy_query_bo_pinned) {
  981. vmw_bo_pin_reserved(dev_priv->dummy_query_bo,
  982. true);
  983. dev_priv->dummy_query_bo_pinned = true;
  984. }
  985. BUG_ON(sw_context->last_query_ctx == NULL);
  986. dev_priv->query_cid = sw_context->last_query_ctx->id;
  987. dev_priv->query_cid_valid = true;
  988. dev_priv->pinned_bo =
  989. vmw_bo_reference(sw_context->cur_query_bo);
  990. }
  991. }
  992. }
  993. /**
  994. * vmw_translate_mob_ptr - Prepare to translate a user-space buffer handle
  995. * to a MOB id.
  996. *
  997. * @dev_priv: Pointer to a device private structure.
  998. * @sw_context: The software context used for this command batch validation.
  999. * @id: Pointer to the user-space handle to be translated.
  1000. * @vmw_bo_p: Points to a location that, on successful return will carry a
  1001. * non-reference-counted pointer to the buffer object identified by the
  1002. * user-space handle in @id.
  1003. *
  1004. * This function saves information needed to translate a user-space buffer
  1005. * handle to a MOB id. The translation does not take place immediately, but
  1006. * during a call to vmw_apply_relocations().
  1007. *
  1008. * This function builds a relocation list and a list of buffers to validate. The
  1009. * former needs to be freed using either vmw_apply_relocations() or
  1010. * vmw_free_relocations(). The latter needs to be freed using
  1011. * vmw_clear_validations.
  1012. */
  1013. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  1014. struct vmw_sw_context *sw_context,
  1015. SVGAMobId *id,
  1016. struct vmw_bo **vmw_bo_p)
  1017. {
  1018. struct vmw_bo *vmw_bo, *tmp_bo;
  1019. uint32_t handle = *id;
  1020. struct vmw_relocation *reloc;
  1021. int ret;
  1022. vmw_validation_preload_bo(sw_context->ctx);
  1023. ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
  1024. if (ret != 0) {
  1025. drm_dbg(&dev_priv->drm, "Could not find or use MOB buffer.\n");
  1026. return PTR_ERR(vmw_bo);
  1027. }
  1028. vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_MOB, VMW_BO_DOMAIN_MOB);
  1029. ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
  1030. tmp_bo = vmw_bo;
  1031. vmw_user_bo_unref(&tmp_bo);
  1032. if (unlikely(ret != 0))
  1033. return ret;
  1034. reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
  1035. if (!reloc)
  1036. return -ENOMEM;
  1037. reloc->mob_loc = id;
  1038. reloc->vbo = vmw_bo;
  1039. *vmw_bo_p = vmw_bo;
  1040. list_add_tail(&reloc->head, &sw_context->bo_relocations);
  1041. return 0;
  1042. }
  1043. /**
  1044. * vmw_translate_guest_ptr - Prepare to translate a user-space buffer handle
  1045. * to a valid SVGAGuestPtr
  1046. *
  1047. * @dev_priv: Pointer to a device private structure.
  1048. * @sw_context: The software context used for this command batch validation.
  1049. * @ptr: Pointer to the user-space handle to be translated.
  1050. * @vmw_bo_p: Points to a location that, on successful return will carry a
  1051. * non-reference-counted pointer to the DMA buffer identified by the user-space
  1052. * handle in @id.
  1053. *
  1054. * This function saves information needed to translate a user-space buffer
  1055. * handle to a valid SVGAGuestPtr. The translation does not take place
  1056. * immediately, but during a call to vmw_apply_relocations().
  1057. *
  1058. * This function builds a relocation list and a list of buffers to validate.
  1059. * The former needs to be freed using either vmw_apply_relocations() or
  1060. * vmw_free_relocations(). The latter needs to be freed using
  1061. * vmw_clear_validations.
  1062. */
  1063. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  1064. struct vmw_sw_context *sw_context,
  1065. SVGAGuestPtr *ptr,
  1066. struct vmw_bo **vmw_bo_p)
  1067. {
  1068. struct vmw_bo *vmw_bo, *tmp_bo;
  1069. uint32_t handle = ptr->gmrId;
  1070. struct vmw_relocation *reloc;
  1071. int ret;
  1072. vmw_validation_preload_bo(sw_context->ctx);
  1073. ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
  1074. if (ret != 0) {
  1075. drm_dbg(&dev_priv->drm, "Could not find or use GMR region.\n");
  1076. return PTR_ERR(vmw_bo);
  1077. }
  1078. vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
  1079. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
  1080. ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
  1081. tmp_bo = vmw_bo;
  1082. vmw_user_bo_unref(&tmp_bo);
  1083. if (unlikely(ret != 0))
  1084. return ret;
  1085. reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
  1086. if (!reloc)
  1087. return -ENOMEM;
  1088. reloc->location = ptr;
  1089. reloc->vbo = vmw_bo;
  1090. *vmw_bo_p = vmw_bo;
  1091. list_add_tail(&reloc->head, &sw_context->bo_relocations);
  1092. return 0;
  1093. }
  1094. /**
  1095. * vmw_cmd_dx_define_query - validate SVGA_3D_CMD_DX_DEFINE_QUERY command.
  1096. *
  1097. * @dev_priv: Pointer to a device private struct.
  1098. * @sw_context: The software context used for this command submission.
  1099. * @header: Pointer to the command header in the command stream.
  1100. *
  1101. * This function adds the new query into the query COTABLE
  1102. */
  1103. static int vmw_cmd_dx_define_query(struct vmw_private *dev_priv,
  1104. struct vmw_sw_context *sw_context,
  1105. SVGA3dCmdHeader *header)
  1106. {
  1107. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineQuery);
  1108. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1109. struct vmw_resource *cotable_res;
  1110. int ret;
  1111. if (!ctx_node)
  1112. return -EINVAL;
  1113. cmd = container_of(header, typeof(*cmd), header);
  1114. if (cmd->body.type < SVGA3D_QUERYTYPE_MIN ||
  1115. cmd->body.type >= SVGA3D_QUERYTYPE_MAX)
  1116. return -EINVAL;
  1117. cotable_res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXQUERY);
  1118. if (IS_ERR_OR_NULL(cotable_res))
  1119. return cotable_res ? PTR_ERR(cotable_res) : -EINVAL;
  1120. ret = vmw_cotable_notify(cotable_res, cmd->body.queryId);
  1121. return ret;
  1122. }
  1123. /**
  1124. * vmw_cmd_dx_bind_query - validate SVGA_3D_CMD_DX_BIND_QUERY command.
  1125. *
  1126. * @dev_priv: Pointer to a device private struct.
  1127. * @sw_context: The software context used for this command submission.
  1128. * @header: Pointer to the command header in the command stream.
  1129. *
  1130. * The query bind operation will eventually associate the query ID with its
  1131. * backing MOB. In this function, we take the user mode MOB ID and use
  1132. * vmw_translate_mob_ptr() to translate it to its kernel mode equivalent.
  1133. */
  1134. static int vmw_cmd_dx_bind_query(struct vmw_private *dev_priv,
  1135. struct vmw_sw_context *sw_context,
  1136. SVGA3dCmdHeader *header)
  1137. {
  1138. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindQuery);
  1139. struct vmw_bo *vmw_bo;
  1140. int ret;
  1141. cmd = container_of(header, typeof(*cmd), header);
  1142. /*
  1143. * Look up the buffer pointed to by q.mobid, put it on the relocation
  1144. * list so its kernel mode MOB ID can be filled in later
  1145. */
  1146. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
  1147. &vmw_bo);
  1148. if (ret != 0)
  1149. return ret;
  1150. sw_context->dx_query_mob = vmw_bo;
  1151. sw_context->dx_query_ctx = sw_context->dx_ctx_node->ctx;
  1152. return 0;
  1153. }
  1154. /**
  1155. * vmw_cmd_begin_gb_query - validate SVGA_3D_CMD_BEGIN_GB_QUERY command.
  1156. *
  1157. * @dev_priv: Pointer to a device private struct.
  1158. * @sw_context: The software context used for this command submission.
  1159. * @header: Pointer to the command header in the command stream.
  1160. */
  1161. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  1162. struct vmw_sw_context *sw_context,
  1163. SVGA3dCmdHeader *header)
  1164. {
  1165. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginGBQuery) =
  1166. container_of(header, typeof(*cmd), header);
  1167. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1168. VMW_RES_DIRTY_SET, user_context_converter,
  1169. &cmd->body.cid, NULL);
  1170. }
  1171. /**
  1172. * vmw_cmd_begin_query - validate SVGA_3D_CMD_BEGIN_QUERY command.
  1173. *
  1174. * @dev_priv: Pointer to a device private struct.
  1175. * @sw_context: The software context used for this command submission.
  1176. * @header: Pointer to the command header in the command stream.
  1177. */
  1178. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  1179. struct vmw_sw_context *sw_context,
  1180. SVGA3dCmdHeader *header)
  1181. {
  1182. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginQuery) =
  1183. container_of(header, typeof(*cmd), header);
  1184. if (unlikely(dev_priv->has_mob)) {
  1185. VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdBeginGBQuery);
  1186. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1187. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  1188. gb_cmd.header.size = cmd->header.size;
  1189. gb_cmd.body.cid = cmd->body.cid;
  1190. gb_cmd.body.type = cmd->body.type;
  1191. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1192. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  1193. }
  1194. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1195. VMW_RES_DIRTY_SET, user_context_converter,
  1196. &cmd->body.cid, NULL);
  1197. }
  1198. /**
  1199. * vmw_cmd_end_gb_query - validate SVGA_3D_CMD_END_GB_QUERY command.
  1200. *
  1201. * @dev_priv: Pointer to a device private struct.
  1202. * @sw_context: The software context used for this command submission.
  1203. * @header: Pointer to the command header in the command stream.
  1204. */
  1205. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  1206. struct vmw_sw_context *sw_context,
  1207. SVGA3dCmdHeader *header)
  1208. {
  1209. struct vmw_bo *vmw_bo;
  1210. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndGBQuery);
  1211. int ret;
  1212. cmd = container_of(header, typeof(*cmd), header);
  1213. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1214. if (unlikely(ret != 0))
  1215. return ret;
  1216. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
  1217. &vmw_bo);
  1218. if (unlikely(ret != 0))
  1219. return ret;
  1220. ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
  1221. return ret;
  1222. }
  1223. /**
  1224. * vmw_cmd_end_query - validate SVGA_3D_CMD_END_QUERY command.
  1225. *
  1226. * @dev_priv: Pointer to a device private struct.
  1227. * @sw_context: The software context used for this command submission.
  1228. * @header: Pointer to the command header in the command stream.
  1229. */
  1230. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  1231. struct vmw_sw_context *sw_context,
  1232. SVGA3dCmdHeader *header)
  1233. {
  1234. struct vmw_bo *vmw_bo;
  1235. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndQuery);
  1236. int ret;
  1237. cmd = container_of(header, typeof(*cmd), header);
  1238. if (dev_priv->has_mob) {
  1239. VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdEndGBQuery);
  1240. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1241. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  1242. gb_cmd.header.size = cmd->header.size;
  1243. gb_cmd.body.cid = cmd->body.cid;
  1244. gb_cmd.body.type = cmd->body.type;
  1245. gb_cmd.body.mobid = cmd->body.guestResult.gmrId;
  1246. gb_cmd.body.offset = cmd->body.guestResult.offset;
  1247. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1248. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  1249. }
  1250. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1251. if (unlikely(ret != 0))
  1252. return ret;
  1253. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1254. &cmd->body.guestResult, &vmw_bo);
  1255. if (unlikely(ret != 0))
  1256. return ret;
  1257. ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
  1258. return ret;
  1259. }
  1260. /**
  1261. * vmw_cmd_wait_gb_query - validate SVGA_3D_CMD_WAIT_GB_QUERY command.
  1262. *
  1263. * @dev_priv: Pointer to a device private struct.
  1264. * @sw_context: The software context used for this command submission.
  1265. * @header: Pointer to the command header in the command stream.
  1266. */
  1267. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  1268. struct vmw_sw_context *sw_context,
  1269. SVGA3dCmdHeader *header)
  1270. {
  1271. struct vmw_bo *vmw_bo;
  1272. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForGBQuery);
  1273. int ret;
  1274. cmd = container_of(header, typeof(*cmd), header);
  1275. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1276. if (unlikely(ret != 0))
  1277. return ret;
  1278. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
  1279. &vmw_bo);
  1280. if (unlikely(ret != 0))
  1281. return ret;
  1282. return 0;
  1283. }
  1284. /**
  1285. * vmw_cmd_wait_query - validate SVGA_3D_CMD_WAIT_QUERY command.
  1286. *
  1287. * @dev_priv: Pointer to a device private struct.
  1288. * @sw_context: The software context used for this command submission.
  1289. * @header: Pointer to the command header in the command stream.
  1290. */
  1291. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  1292. struct vmw_sw_context *sw_context,
  1293. SVGA3dCmdHeader *header)
  1294. {
  1295. struct vmw_bo *vmw_bo;
  1296. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForQuery);
  1297. int ret;
  1298. cmd = container_of(header, typeof(*cmd), header);
  1299. if (dev_priv->has_mob) {
  1300. VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdWaitForGBQuery);
  1301. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1302. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  1303. gb_cmd.header.size = cmd->header.size;
  1304. gb_cmd.body.cid = cmd->body.cid;
  1305. gb_cmd.body.type = cmd->body.type;
  1306. gb_cmd.body.mobid = cmd->body.guestResult.gmrId;
  1307. gb_cmd.body.offset = cmd->body.guestResult.offset;
  1308. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1309. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  1310. }
  1311. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1312. if (unlikely(ret != 0))
  1313. return ret;
  1314. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1315. &cmd->body.guestResult, &vmw_bo);
  1316. if (unlikely(ret != 0))
  1317. return ret;
  1318. return 0;
  1319. }
  1320. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  1321. struct vmw_sw_context *sw_context,
  1322. SVGA3dCmdHeader *header)
  1323. {
  1324. struct vmw_bo *vmw_bo = NULL;
  1325. struct vmw_resource *res;
  1326. struct vmw_surface *srf = NULL;
  1327. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceDMA);
  1328. int ret;
  1329. SVGA3dCmdSurfaceDMASuffix *suffix;
  1330. uint32_t bo_size;
  1331. bool dirty;
  1332. cmd = container_of(header, typeof(*cmd), header);
  1333. suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->body +
  1334. header->size - sizeof(*suffix));
  1335. /* Make sure device and verifier stays in sync. */
  1336. if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
  1337. VMW_DEBUG_USER("Invalid DMA suffix size.\n");
  1338. return -EINVAL;
  1339. }
  1340. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1341. &cmd->body.guest.ptr, &vmw_bo);
  1342. if (unlikely(ret != 0))
  1343. return ret;
  1344. /* Make sure DMA doesn't cross BO boundaries. */
  1345. bo_size = vmw_bo->tbo.base.size;
  1346. if (unlikely(cmd->body.guest.ptr.offset > bo_size)) {
  1347. VMW_DEBUG_USER("Invalid DMA offset.\n");
  1348. return -EINVAL;
  1349. }
  1350. bo_size -= cmd->body.guest.ptr.offset;
  1351. if (unlikely(suffix->maximumOffset > bo_size))
  1352. suffix->maximumOffset = bo_size;
  1353. dirty = (cmd->body.transfer == SVGA3D_WRITE_HOST_VRAM) ?
  1354. VMW_RES_DIRTY_SET : 0;
  1355. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, dirty,
  1356. user_surface_converter, &cmd->body.host.sid,
  1357. NULL);
  1358. if (unlikely(ret != 0)) {
  1359. if (unlikely(ret != -ERESTARTSYS))
  1360. VMW_DEBUG_USER("could not find surface for DMA.\n");
  1361. return ret;
  1362. }
  1363. res = sw_context->res_cache[vmw_res_surface].res;
  1364. if (!res) {
  1365. VMW_DEBUG_USER("Invalid DMA surface.\n");
  1366. return -EINVAL;
  1367. }
  1368. srf = vmw_res_to_srf(res);
  1369. vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->tbo,
  1370. header);
  1371. return 0;
  1372. }
  1373. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  1374. struct vmw_sw_context *sw_context,
  1375. SVGA3dCmdHeader *header)
  1376. {
  1377. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDrawPrimitives);
  1378. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  1379. (unsigned long)header + sizeof(*cmd));
  1380. SVGA3dPrimitiveRange *range;
  1381. uint32_t i;
  1382. uint32_t maxnum;
  1383. int ret;
  1384. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1385. if (unlikely(ret != 0))
  1386. return ret;
  1387. cmd = container_of(header, typeof(*cmd), header);
  1388. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1389. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1390. VMW_DEBUG_USER("Illegal number of vertex declarations.\n");
  1391. return -EINVAL;
  1392. }
  1393. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1394. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1395. VMW_RES_DIRTY_NONE,
  1396. user_surface_converter,
  1397. &decl->array.surfaceId, NULL);
  1398. if (unlikely(ret != 0))
  1399. return ret;
  1400. }
  1401. maxnum = (header->size - sizeof(cmd->body) -
  1402. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1403. if (unlikely(cmd->body.numRanges > maxnum)) {
  1404. VMW_DEBUG_USER("Illegal number of index ranges.\n");
  1405. return -EINVAL;
  1406. }
  1407. range = (SVGA3dPrimitiveRange *) decl;
  1408. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1409. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1410. VMW_RES_DIRTY_NONE,
  1411. user_surface_converter,
  1412. &range->indexArray.surfaceId, NULL);
  1413. if (unlikely(ret != 0))
  1414. return ret;
  1415. }
  1416. return 0;
  1417. }
  1418. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1419. struct vmw_sw_context *sw_context,
  1420. SVGA3dCmdHeader *header)
  1421. {
  1422. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetTextureState);
  1423. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1424. ((unsigned long) header + header->size + sizeof(*header));
  1425. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1426. ((unsigned long) header + sizeof(*cmd));
  1427. struct vmw_resource *ctx;
  1428. struct vmw_resource *res;
  1429. int ret;
  1430. cmd = container_of(header, typeof(*cmd), header);
  1431. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1432. VMW_RES_DIRTY_SET, user_context_converter,
  1433. &cmd->body.cid, &ctx);
  1434. if (unlikely(ret != 0))
  1435. return ret;
  1436. for (; cur_state < last_state; ++cur_state) {
  1437. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1438. continue;
  1439. if (cur_state->stage >= SVGA3D_NUM_TEXTURE_UNITS) {
  1440. VMW_DEBUG_USER("Illegal texture/sampler unit %u.\n",
  1441. (unsigned int) cur_state->stage);
  1442. return -EINVAL;
  1443. }
  1444. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1445. VMW_RES_DIRTY_NONE,
  1446. user_surface_converter,
  1447. &cur_state->value, &res);
  1448. if (unlikely(ret != 0))
  1449. return ret;
  1450. if (dev_priv->has_mob) {
  1451. struct vmw_ctx_bindinfo_tex binding;
  1452. struct vmw_ctx_validation_info *node;
  1453. node = vmw_execbuf_info_from_res(sw_context, ctx);
  1454. if (!node)
  1455. return -EINVAL;
  1456. binding.bi.ctx = ctx;
  1457. binding.bi.res = res;
  1458. binding.bi.bt = vmw_ctx_binding_tex;
  1459. binding.texture_stage = cur_state->stage;
  1460. vmw_binding_add(node->staged, &binding.bi, 0,
  1461. binding.texture_stage);
  1462. }
  1463. }
  1464. return 0;
  1465. }
  1466. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1467. struct vmw_sw_context *sw_context,
  1468. void *buf)
  1469. {
  1470. struct vmw_bo *vmw_bo;
  1471. struct {
  1472. uint32_t header;
  1473. SVGAFifoCmdDefineGMRFB body;
  1474. } *cmd = buf;
  1475. return vmw_translate_guest_ptr(dev_priv, sw_context, &cmd->body.ptr,
  1476. &vmw_bo);
  1477. }
  1478. /**
  1479. * vmw_cmd_res_switch_backup - Utility function to handle backup buffer
  1480. * switching
  1481. *
  1482. * @dev_priv: Pointer to a device private struct.
  1483. * @sw_context: The software context being used for this batch.
  1484. * @res: Pointer to the resource.
  1485. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1486. * stream.
  1487. * @backup_offset: Offset of backup into MOB.
  1488. *
  1489. * This function prepares for registering a switch of backup buffers in the
  1490. * resource metadata just prior to unreserving. It's basically a wrapper around
  1491. * vmw_cmd_res_switch_backup with a different interface.
  1492. */
  1493. static int vmw_cmd_res_switch_backup(struct vmw_private *dev_priv,
  1494. struct vmw_sw_context *sw_context,
  1495. struct vmw_resource *res, uint32_t *buf_id,
  1496. unsigned long backup_offset)
  1497. {
  1498. struct vmw_bo *vbo;
  1499. void *info;
  1500. int ret;
  1501. info = vmw_execbuf_info_from_res(sw_context, res);
  1502. if (!info)
  1503. return -EINVAL;
  1504. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &vbo);
  1505. if (ret)
  1506. return ret;
  1507. vmw_validation_res_switch_backup(sw_context->ctx, info, vbo,
  1508. backup_offset);
  1509. return 0;
  1510. }
  1511. /**
  1512. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1513. *
  1514. * @dev_priv: Pointer to a device private struct.
  1515. * @sw_context: The software context being used for this batch.
  1516. * @res_type: The resource type.
  1517. * @converter: Information about user-space binding for this resource type.
  1518. * @res_id: Pointer to the user-space resource handle in the command stream.
  1519. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1520. * stream.
  1521. * @backup_offset: Offset of backup into MOB.
  1522. *
  1523. * This function prepares for registering a switch of backup buffers in the
  1524. * resource metadata just prior to unreserving. It's basically a wrapper around
  1525. * vmw_cmd_res_switch_backup with a different interface.
  1526. */
  1527. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1528. struct vmw_sw_context *sw_context,
  1529. enum vmw_res_type res_type,
  1530. const struct vmw_user_resource_conv
  1531. *converter, uint32_t *res_id, uint32_t *buf_id,
  1532. unsigned long backup_offset)
  1533. {
  1534. struct vmw_resource *res;
  1535. int ret;
  1536. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1537. VMW_RES_DIRTY_NONE, converter, res_id, &res);
  1538. if (ret)
  1539. return ret;
  1540. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res, buf_id,
  1541. backup_offset);
  1542. }
  1543. /**
  1544. * vmw_cmd_bind_gb_surface - Validate SVGA_3D_CMD_BIND_GB_SURFACE command
  1545. *
  1546. * @dev_priv: Pointer to a device private struct.
  1547. * @sw_context: The software context being used for this batch.
  1548. * @header: Pointer to the command header in the command stream.
  1549. */
  1550. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1551. struct vmw_sw_context *sw_context,
  1552. SVGA3dCmdHeader *header)
  1553. {
  1554. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBSurface) =
  1555. container_of(header, typeof(*cmd), header);
  1556. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1557. user_surface_converter, &cmd->body.sid,
  1558. &cmd->body.mobid, 0);
  1559. }
  1560. /**
  1561. * vmw_cmd_update_gb_image - Validate SVGA_3D_CMD_UPDATE_GB_IMAGE command
  1562. *
  1563. * @dev_priv: Pointer to a device private struct.
  1564. * @sw_context: The software context being used for this batch.
  1565. * @header: Pointer to the command header in the command stream.
  1566. */
  1567. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1568. struct vmw_sw_context *sw_context,
  1569. SVGA3dCmdHeader *header)
  1570. {
  1571. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBImage) =
  1572. container_of(header, typeof(*cmd), header);
  1573. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1574. VMW_RES_DIRTY_NONE, user_surface_converter,
  1575. &cmd->body.image.sid, NULL);
  1576. }
  1577. /**
  1578. * vmw_cmd_update_gb_surface - Validate SVGA_3D_CMD_UPDATE_GB_SURFACE command
  1579. *
  1580. * @dev_priv: Pointer to a device private struct.
  1581. * @sw_context: The software context being used for this batch.
  1582. * @header: Pointer to the command header in the command stream.
  1583. */
  1584. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1585. struct vmw_sw_context *sw_context,
  1586. SVGA3dCmdHeader *header)
  1587. {
  1588. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBSurface) =
  1589. container_of(header, typeof(*cmd), header);
  1590. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1591. VMW_RES_DIRTY_CLEAR, user_surface_converter,
  1592. &cmd->body.sid, NULL);
  1593. }
  1594. /**
  1595. * vmw_cmd_readback_gb_image - Validate SVGA_3D_CMD_READBACK_GB_IMAGE command
  1596. *
  1597. * @dev_priv: Pointer to a device private struct.
  1598. * @sw_context: The software context being used for this batch.
  1599. * @header: Pointer to the command header in the command stream.
  1600. */
  1601. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1602. struct vmw_sw_context *sw_context,
  1603. SVGA3dCmdHeader *header)
  1604. {
  1605. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBImage) =
  1606. container_of(header, typeof(*cmd), header);
  1607. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1608. VMW_RES_DIRTY_NONE, user_surface_converter,
  1609. &cmd->body.image.sid, NULL);
  1610. }
  1611. /**
  1612. * vmw_cmd_readback_gb_surface - Validate SVGA_3D_CMD_READBACK_GB_SURFACE
  1613. * command
  1614. *
  1615. * @dev_priv: Pointer to a device private struct.
  1616. * @sw_context: The software context being used for this batch.
  1617. * @header: Pointer to the command header in the command stream.
  1618. */
  1619. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1620. struct vmw_sw_context *sw_context,
  1621. SVGA3dCmdHeader *header)
  1622. {
  1623. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBSurface) =
  1624. container_of(header, typeof(*cmd), header);
  1625. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1626. VMW_RES_DIRTY_CLEAR, user_surface_converter,
  1627. &cmd->body.sid, NULL);
  1628. }
  1629. /**
  1630. * vmw_cmd_invalidate_gb_image - Validate SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1631. * command
  1632. *
  1633. * @dev_priv: Pointer to a device private struct.
  1634. * @sw_context: The software context being used for this batch.
  1635. * @header: Pointer to the command header in the command stream.
  1636. */
  1637. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1638. struct vmw_sw_context *sw_context,
  1639. SVGA3dCmdHeader *header)
  1640. {
  1641. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBImage) =
  1642. container_of(header, typeof(*cmd), header);
  1643. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1644. VMW_RES_DIRTY_NONE, user_surface_converter,
  1645. &cmd->body.image.sid, NULL);
  1646. }
  1647. /**
  1648. * vmw_cmd_invalidate_gb_surface - Validate SVGA_3D_CMD_INVALIDATE_GB_SURFACE
  1649. * command
  1650. *
  1651. * @dev_priv: Pointer to a device private struct.
  1652. * @sw_context: The software context being used for this batch.
  1653. * @header: Pointer to the command header in the command stream.
  1654. */
  1655. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1656. struct vmw_sw_context *sw_context,
  1657. SVGA3dCmdHeader *header)
  1658. {
  1659. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBSurface) =
  1660. container_of(header, typeof(*cmd), header);
  1661. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1662. VMW_RES_DIRTY_CLEAR, user_surface_converter,
  1663. &cmd->body.sid, NULL);
  1664. }
  1665. /**
  1666. * vmw_cmd_shader_define - Validate SVGA_3D_CMD_SHADER_DEFINE command
  1667. *
  1668. * @dev_priv: Pointer to a device private struct.
  1669. * @sw_context: The software context being used for this batch.
  1670. * @header: Pointer to the command header in the command stream.
  1671. */
  1672. static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
  1673. struct vmw_sw_context *sw_context,
  1674. SVGA3dCmdHeader *header)
  1675. {
  1676. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDefineShader);
  1677. int ret;
  1678. size_t size;
  1679. struct vmw_resource *ctx;
  1680. cmd = container_of(header, typeof(*cmd), header);
  1681. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1682. VMW_RES_DIRTY_SET, user_context_converter,
  1683. &cmd->body.cid, &ctx);
  1684. if (unlikely(ret != 0))
  1685. return ret;
  1686. if (unlikely(!dev_priv->has_mob))
  1687. return 0;
  1688. size = cmd->header.size - sizeof(cmd->body);
  1689. ret = vmw_compat_shader_add(dev_priv, vmw_context_res_man(ctx),
  1690. cmd->body.shid, cmd + 1, cmd->body.type,
  1691. size, &sw_context->staged_cmd_res);
  1692. if (unlikely(ret != 0))
  1693. return ret;
  1694. return vmw_resource_relocation_add(sw_context, NULL,
  1695. vmw_ptr_diff(sw_context->buf_start,
  1696. &cmd->header.id),
  1697. vmw_res_rel_nop);
  1698. }
  1699. /**
  1700. * vmw_cmd_shader_destroy - Validate SVGA_3D_CMD_SHADER_DESTROY command
  1701. *
  1702. * @dev_priv: Pointer to a device private struct.
  1703. * @sw_context: The software context being used for this batch.
  1704. * @header: Pointer to the command header in the command stream.
  1705. */
  1706. static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
  1707. struct vmw_sw_context *sw_context,
  1708. SVGA3dCmdHeader *header)
  1709. {
  1710. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDestroyShader);
  1711. int ret;
  1712. struct vmw_resource *ctx;
  1713. cmd = container_of(header, typeof(*cmd), header);
  1714. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1715. VMW_RES_DIRTY_SET, user_context_converter,
  1716. &cmd->body.cid, &ctx);
  1717. if (unlikely(ret != 0))
  1718. return ret;
  1719. if (unlikely(!dev_priv->has_mob))
  1720. return 0;
  1721. ret = vmw_shader_remove(vmw_context_res_man(ctx), cmd->body.shid,
  1722. cmd->body.type, &sw_context->staged_cmd_res);
  1723. if (unlikely(ret != 0))
  1724. return ret;
  1725. return vmw_resource_relocation_add(sw_context, NULL,
  1726. vmw_ptr_diff(sw_context->buf_start,
  1727. &cmd->header.id),
  1728. vmw_res_rel_nop);
  1729. }
  1730. /**
  1731. * vmw_cmd_set_shader - Validate SVGA_3D_CMD_SET_SHADER command
  1732. *
  1733. * @dev_priv: Pointer to a device private struct.
  1734. * @sw_context: The software context being used for this batch.
  1735. * @header: Pointer to the command header in the command stream.
  1736. */
  1737. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1738. struct vmw_sw_context *sw_context,
  1739. SVGA3dCmdHeader *header)
  1740. {
  1741. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShader);
  1742. struct vmw_ctx_bindinfo_shader binding;
  1743. struct vmw_resource *ctx, *res = NULL;
  1744. struct vmw_ctx_validation_info *ctx_info;
  1745. int ret;
  1746. cmd = container_of(header, typeof(*cmd), header);
  1747. if (!vmw_shadertype_is_valid(VMW_SM_LEGACY, cmd->body.type)) {
  1748. VMW_DEBUG_USER("Illegal shader type %u.\n",
  1749. (unsigned int) cmd->body.type);
  1750. return -EINVAL;
  1751. }
  1752. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1753. VMW_RES_DIRTY_SET, user_context_converter,
  1754. &cmd->body.cid, &ctx);
  1755. if (unlikely(ret != 0))
  1756. return ret;
  1757. if (!dev_priv->has_mob)
  1758. return 0;
  1759. if (cmd->body.shid != SVGA3D_INVALID_ID) {
  1760. /*
  1761. * This is the compat shader path - Per device guest-backed
  1762. * shaders, but user-space thinks it's per context host-
  1763. * backed shaders.
  1764. */
  1765. res = vmw_shader_lookup(vmw_context_res_man(ctx),
  1766. cmd->body.shid, cmd->body.type);
  1767. if (!IS_ERR(res)) {
  1768. ret = vmw_execbuf_res_val_add(sw_context, res,
  1769. VMW_RES_DIRTY_NONE,
  1770. vmw_val_add_flag_noctx);
  1771. if (unlikely(ret != 0))
  1772. return ret;
  1773. ret = vmw_resource_relocation_add
  1774. (sw_context, res,
  1775. vmw_ptr_diff(sw_context->buf_start,
  1776. &cmd->body.shid),
  1777. vmw_res_rel_normal);
  1778. if (unlikely(ret != 0))
  1779. return ret;
  1780. }
  1781. }
  1782. if (IS_ERR_OR_NULL(res)) {
  1783. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_shader,
  1784. VMW_RES_DIRTY_NONE,
  1785. user_shader_converter, &cmd->body.shid,
  1786. &res);
  1787. if (unlikely(ret != 0))
  1788. return ret;
  1789. }
  1790. ctx_info = vmw_execbuf_info_from_res(sw_context, ctx);
  1791. if (!ctx_info)
  1792. return -EINVAL;
  1793. binding.bi.ctx = ctx;
  1794. binding.bi.res = res;
  1795. binding.bi.bt = vmw_ctx_binding_shader;
  1796. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1797. vmw_binding_add(ctx_info->staged, &binding.bi, binding.shader_slot, 0);
  1798. return 0;
  1799. }
  1800. /**
  1801. * vmw_cmd_set_shader_const - Validate SVGA_3D_CMD_SET_SHADER_CONST command
  1802. *
  1803. * @dev_priv: Pointer to a device private struct.
  1804. * @sw_context: The software context being used for this batch.
  1805. * @header: Pointer to the command header in the command stream.
  1806. */
  1807. static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
  1808. struct vmw_sw_context *sw_context,
  1809. SVGA3dCmdHeader *header)
  1810. {
  1811. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShaderConst);
  1812. int ret;
  1813. cmd = container_of(header, typeof(*cmd), header);
  1814. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1815. VMW_RES_DIRTY_SET, user_context_converter,
  1816. &cmd->body.cid, NULL);
  1817. if (unlikely(ret != 0))
  1818. return ret;
  1819. if (dev_priv->has_mob)
  1820. header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
  1821. return 0;
  1822. }
  1823. /**
  1824. * vmw_cmd_bind_gb_shader - Validate SVGA_3D_CMD_BIND_GB_SHADER command
  1825. *
  1826. * @dev_priv: Pointer to a device private struct.
  1827. * @sw_context: The software context being used for this batch.
  1828. * @header: Pointer to the command header in the command stream.
  1829. */
  1830. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1831. struct vmw_sw_context *sw_context,
  1832. SVGA3dCmdHeader *header)
  1833. {
  1834. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBShader) =
  1835. container_of(header, typeof(*cmd), header);
  1836. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1837. user_shader_converter, &cmd->body.shid,
  1838. &cmd->body.mobid, cmd->body.offsetInBytes);
  1839. }
  1840. /**
  1841. * vmw_cmd_dx_set_single_constant_buffer - Validate
  1842. * SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER command.
  1843. *
  1844. * @dev_priv: Pointer to a device private struct.
  1845. * @sw_context: The software context being used for this batch.
  1846. * @header: Pointer to the command header in the command stream.
  1847. */
  1848. static int
  1849. vmw_cmd_dx_set_single_constant_buffer(struct vmw_private *dev_priv,
  1850. struct vmw_sw_context *sw_context,
  1851. SVGA3dCmdHeader *header)
  1852. {
  1853. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetSingleConstantBuffer);
  1854. struct vmw_resource *res = NULL;
  1855. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1856. struct vmw_ctx_bindinfo_cb binding;
  1857. int ret;
  1858. if (!ctx_node)
  1859. return -EINVAL;
  1860. cmd = container_of(header, typeof(*cmd), header);
  1861. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1862. VMW_RES_DIRTY_NONE, user_surface_converter,
  1863. &cmd->body.sid, &res);
  1864. if (unlikely(ret != 0))
  1865. return ret;
  1866. if (!vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type) ||
  1867. cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
  1868. VMW_DEBUG_USER("Illegal const buffer shader %u slot %u.\n",
  1869. (unsigned int) cmd->body.type,
  1870. (unsigned int) cmd->body.slot);
  1871. return -EINVAL;
  1872. }
  1873. binding.bi.ctx = ctx_node->ctx;
  1874. binding.bi.res = res;
  1875. binding.bi.bt = vmw_ctx_binding_cb;
  1876. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1877. binding.offset = cmd->body.offsetInBytes;
  1878. binding.size = cmd->body.sizeInBytes;
  1879. binding.slot = cmd->body.slot;
  1880. vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot,
  1881. binding.slot);
  1882. return 0;
  1883. }
  1884. /**
  1885. * vmw_cmd_dx_set_constant_buffer_offset - Validate
  1886. * SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET command.
  1887. *
  1888. * @dev_priv: Pointer to a device private struct.
  1889. * @sw_context: The software context being used for this batch.
  1890. * @header: Pointer to the command header in the command stream.
  1891. */
  1892. static int
  1893. vmw_cmd_dx_set_constant_buffer_offset(struct vmw_private *dev_priv,
  1894. struct vmw_sw_context *sw_context,
  1895. SVGA3dCmdHeader *header)
  1896. {
  1897. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetConstantBufferOffset);
  1898. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1899. u32 shader_slot;
  1900. if (!has_sm5_context(dev_priv))
  1901. return -EINVAL;
  1902. if (!ctx_node)
  1903. return -EINVAL;
  1904. cmd = container_of(header, typeof(*cmd), header);
  1905. if (cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
  1906. VMW_DEBUG_USER("Illegal const buffer slot %u.\n",
  1907. (unsigned int) cmd->body.slot);
  1908. return -EINVAL;
  1909. }
  1910. shader_slot = cmd->header.id - SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET;
  1911. vmw_binding_cb_offset_update(ctx_node->staged, shader_slot,
  1912. cmd->body.slot, cmd->body.offsetInBytes);
  1913. return 0;
  1914. }
  1915. /**
  1916. * vmw_cmd_dx_set_shader_res - Validate SVGA_3D_CMD_DX_SET_SHADER_RESOURCES
  1917. * command
  1918. *
  1919. * @dev_priv: Pointer to a device private struct.
  1920. * @sw_context: The software context being used for this batch.
  1921. * @header: Pointer to the command header in the command stream.
  1922. */
  1923. static int vmw_cmd_dx_set_shader_res(struct vmw_private *dev_priv,
  1924. struct vmw_sw_context *sw_context,
  1925. SVGA3dCmdHeader *header)
  1926. {
  1927. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShaderResources) =
  1928. container_of(header, typeof(*cmd), header);
  1929. u32 num_sr_view = (cmd->header.size - sizeof(cmd->body)) /
  1930. sizeof(SVGA3dShaderResourceViewId);
  1931. if ((u64) cmd->body.startView + (u64) num_sr_view >
  1932. (u64) SVGA3D_DX_MAX_SRVIEWS ||
  1933. !vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type)) {
  1934. VMW_DEBUG_USER("Invalid shader binding.\n");
  1935. return -EINVAL;
  1936. }
  1937. return vmw_view_bindings_add(sw_context, vmw_view_sr,
  1938. vmw_ctx_binding_sr,
  1939. cmd->body.type - SVGA3D_SHADERTYPE_MIN,
  1940. (void *) &cmd[1], num_sr_view,
  1941. cmd->body.startView);
  1942. }
  1943. /**
  1944. * vmw_cmd_dx_set_shader - Validate SVGA_3D_CMD_DX_SET_SHADER command
  1945. *
  1946. * @dev_priv: Pointer to a device private struct.
  1947. * @sw_context: The software context being used for this batch.
  1948. * @header: Pointer to the command header in the command stream.
  1949. */
  1950. static int vmw_cmd_dx_set_shader(struct vmw_private *dev_priv,
  1951. struct vmw_sw_context *sw_context,
  1952. SVGA3dCmdHeader *header)
  1953. {
  1954. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShader);
  1955. struct vmw_resource *res = NULL;
  1956. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1957. struct vmw_ctx_bindinfo_shader binding;
  1958. int ret = 0;
  1959. if (!ctx_node)
  1960. return -EINVAL;
  1961. cmd = container_of(header, typeof(*cmd), header);
  1962. if (!vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type)) {
  1963. VMW_DEBUG_USER("Illegal shader type %u.\n",
  1964. (unsigned int) cmd->body.type);
  1965. return -EINVAL;
  1966. }
  1967. if (cmd->body.shaderId != SVGA3D_INVALID_ID) {
  1968. res = vmw_shader_lookup(sw_context->man, cmd->body.shaderId, 0);
  1969. if (IS_ERR(res)) {
  1970. VMW_DEBUG_USER("Could not find shader for binding.\n");
  1971. return PTR_ERR(res);
  1972. }
  1973. ret = vmw_execbuf_res_val_add(sw_context, res,
  1974. VMW_RES_DIRTY_NONE,
  1975. vmw_val_add_flag_noctx);
  1976. if (ret)
  1977. return ret;
  1978. }
  1979. binding.bi.ctx = ctx_node->ctx;
  1980. binding.bi.res = res;
  1981. binding.bi.bt = vmw_ctx_binding_dx_shader;
  1982. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1983. vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot, 0);
  1984. return 0;
  1985. }
  1986. /**
  1987. * vmw_cmd_dx_set_vertex_buffers - Validates SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS
  1988. * command
  1989. *
  1990. * @dev_priv: Pointer to a device private struct.
  1991. * @sw_context: The software context being used for this batch.
  1992. * @header: Pointer to the command header in the command stream.
  1993. */
  1994. static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv,
  1995. struct vmw_sw_context *sw_context,
  1996. SVGA3dCmdHeader *header)
  1997. {
  1998. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1999. struct vmw_ctx_bindinfo_vb binding;
  2000. struct vmw_resource *res;
  2001. struct {
  2002. SVGA3dCmdHeader header;
  2003. SVGA3dCmdDXSetVertexBuffers body;
  2004. SVGA3dVertexBuffer buf[];
  2005. } *cmd;
  2006. int i, ret, num;
  2007. if (!ctx_node)
  2008. return -EINVAL;
  2009. cmd = container_of(header, typeof(*cmd), header);
  2010. num = (cmd->header.size - sizeof(cmd->body)) /
  2011. sizeof(SVGA3dVertexBuffer);
  2012. if ((u64)num + (u64)cmd->body.startBuffer >
  2013. (u64)SVGA3D_DX_MAX_VERTEXBUFFERS) {
  2014. VMW_DEBUG_USER("Invalid number of vertex buffers.\n");
  2015. return -EINVAL;
  2016. }
  2017. for (i = 0; i < num; i++) {
  2018. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2019. VMW_RES_DIRTY_NONE,
  2020. user_surface_converter,
  2021. &cmd->buf[i].sid, &res);
  2022. if (unlikely(ret != 0))
  2023. return ret;
  2024. binding.bi.ctx = ctx_node->ctx;
  2025. binding.bi.bt = vmw_ctx_binding_vb;
  2026. binding.bi.res = res;
  2027. binding.offset = cmd->buf[i].offset;
  2028. binding.stride = cmd->buf[i].stride;
  2029. binding.slot = i + cmd->body.startBuffer;
  2030. vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot);
  2031. }
  2032. return 0;
  2033. }
  2034. /**
  2035. * vmw_cmd_dx_set_index_buffer - Validate
  2036. * SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command.
  2037. *
  2038. * @dev_priv: Pointer to a device private struct.
  2039. * @sw_context: The software context being used for this batch.
  2040. * @header: Pointer to the command header in the command stream.
  2041. */
  2042. static int vmw_cmd_dx_set_index_buffer(struct vmw_private *dev_priv,
  2043. struct vmw_sw_context *sw_context,
  2044. SVGA3dCmdHeader *header)
  2045. {
  2046. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2047. struct vmw_ctx_bindinfo_ib binding;
  2048. struct vmw_resource *res;
  2049. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetIndexBuffer);
  2050. int ret;
  2051. if (!ctx_node)
  2052. return -EINVAL;
  2053. cmd = container_of(header, typeof(*cmd), header);
  2054. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2055. VMW_RES_DIRTY_NONE, user_surface_converter,
  2056. &cmd->body.sid, &res);
  2057. if (unlikely(ret != 0))
  2058. return ret;
  2059. binding.bi.ctx = ctx_node->ctx;
  2060. binding.bi.res = res;
  2061. binding.bi.bt = vmw_ctx_binding_ib;
  2062. binding.offset = cmd->body.offset;
  2063. binding.format = cmd->body.format;
  2064. vmw_binding_add(ctx_node->staged, &binding.bi, 0, 0);
  2065. return 0;
  2066. }
  2067. /**
  2068. * vmw_cmd_dx_set_rendertargets - Validate SVGA_3D_CMD_DX_SET_RENDERTARGETS
  2069. * command
  2070. *
  2071. * @dev_priv: Pointer to a device private struct.
  2072. * @sw_context: The software context being used for this batch.
  2073. * @header: Pointer to the command header in the command stream.
  2074. */
  2075. static int vmw_cmd_dx_set_rendertargets(struct vmw_private *dev_priv,
  2076. struct vmw_sw_context *sw_context,
  2077. SVGA3dCmdHeader *header)
  2078. {
  2079. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetRenderTargets) =
  2080. container_of(header, typeof(*cmd), header);
  2081. u32 num_rt_view = (cmd->header.size - sizeof(cmd->body)) /
  2082. sizeof(SVGA3dRenderTargetViewId);
  2083. int ret;
  2084. if (num_rt_view > SVGA3D_DX_MAX_RENDER_TARGETS) {
  2085. VMW_DEBUG_USER("Invalid DX Rendertarget binding.\n");
  2086. return -EINVAL;
  2087. }
  2088. ret = vmw_view_bindings_add(sw_context, vmw_view_ds, vmw_ctx_binding_ds,
  2089. 0, &cmd->body.depthStencilViewId, 1, 0);
  2090. if (ret)
  2091. return ret;
  2092. return vmw_view_bindings_add(sw_context, vmw_view_rt,
  2093. vmw_ctx_binding_dx_rt, 0, (void *)&cmd[1],
  2094. num_rt_view, 0);
  2095. }
  2096. /**
  2097. * vmw_cmd_dx_clear_rendertarget_view - Validate
  2098. * SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW command
  2099. *
  2100. * @dev_priv: Pointer to a device private struct.
  2101. * @sw_context: The software context being used for this batch.
  2102. * @header: Pointer to the command header in the command stream.
  2103. */
  2104. static int vmw_cmd_dx_clear_rendertarget_view(struct vmw_private *dev_priv,
  2105. struct vmw_sw_context *sw_context,
  2106. SVGA3dCmdHeader *header)
  2107. {
  2108. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearRenderTargetView) =
  2109. container_of(header, typeof(*cmd), header);
  2110. struct vmw_resource *ret;
  2111. ret = vmw_view_id_val_add(sw_context, vmw_view_rt,
  2112. cmd->body.renderTargetViewId);
  2113. return PTR_ERR_OR_ZERO(ret);
  2114. }
  2115. /**
  2116. * vmw_cmd_dx_clear_depthstencil_view - Validate
  2117. * SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW command
  2118. *
  2119. * @dev_priv: Pointer to a device private struct.
  2120. * @sw_context: The software context being used for this batch.
  2121. * @header: Pointer to the command header in the command stream.
  2122. */
  2123. static int vmw_cmd_dx_clear_depthstencil_view(struct vmw_private *dev_priv,
  2124. struct vmw_sw_context *sw_context,
  2125. SVGA3dCmdHeader *header)
  2126. {
  2127. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearDepthStencilView) =
  2128. container_of(header, typeof(*cmd), header);
  2129. struct vmw_resource *ret;
  2130. ret = vmw_view_id_val_add(sw_context, vmw_view_ds,
  2131. cmd->body.depthStencilViewId);
  2132. return PTR_ERR_OR_ZERO(ret);
  2133. }
  2134. static int vmw_cmd_dx_view_define(struct vmw_private *dev_priv,
  2135. struct vmw_sw_context *sw_context,
  2136. SVGA3dCmdHeader *header)
  2137. {
  2138. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2139. struct vmw_resource *srf;
  2140. struct vmw_resource *res;
  2141. enum vmw_view_type view_type;
  2142. int ret;
  2143. /*
  2144. * This is based on the fact that all affected define commands have the
  2145. * same initial command body layout.
  2146. */
  2147. struct {
  2148. SVGA3dCmdHeader header;
  2149. uint32 defined_id;
  2150. uint32 sid;
  2151. } *cmd;
  2152. if (!ctx_node)
  2153. return -EINVAL;
  2154. view_type = vmw_view_cmd_to_type(header->id);
  2155. if (view_type == vmw_view_max)
  2156. return -EINVAL;
  2157. cmd = container_of(header, typeof(*cmd), header);
  2158. if (unlikely(cmd->sid == SVGA3D_INVALID_ID)) {
  2159. VMW_DEBUG_USER("Invalid surface id.\n");
  2160. return -EINVAL;
  2161. }
  2162. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2163. VMW_RES_DIRTY_NONE, user_surface_converter,
  2164. &cmd->sid, &srf);
  2165. if (unlikely(ret != 0))
  2166. return ret;
  2167. res = vmw_context_cotable(ctx_node->ctx, vmw_view_cotables[view_type]);
  2168. if (IS_ERR_OR_NULL(res))
  2169. return res ? PTR_ERR(res) : -EINVAL;
  2170. ret = vmw_cotable_notify(res, cmd->defined_id);
  2171. if (unlikely(ret != 0))
  2172. return ret;
  2173. return vmw_view_add(sw_context->man, ctx_node->ctx, srf, view_type,
  2174. cmd->defined_id, header,
  2175. header->size + sizeof(*header),
  2176. &sw_context->staged_cmd_res);
  2177. }
  2178. /**
  2179. * vmw_cmd_dx_set_so_targets - Validate SVGA_3D_CMD_DX_SET_SOTARGETS command.
  2180. *
  2181. * @dev_priv: Pointer to a device private struct.
  2182. * @sw_context: The software context being used for this batch.
  2183. * @header: Pointer to the command header in the command stream.
  2184. */
  2185. static int vmw_cmd_dx_set_so_targets(struct vmw_private *dev_priv,
  2186. struct vmw_sw_context *sw_context,
  2187. SVGA3dCmdHeader *header)
  2188. {
  2189. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2190. struct vmw_ctx_bindinfo_so_target binding;
  2191. struct vmw_resource *res;
  2192. struct {
  2193. SVGA3dCmdHeader header;
  2194. SVGA3dCmdDXSetSOTargets body;
  2195. SVGA3dSoTarget targets[];
  2196. } *cmd;
  2197. int i, ret, num;
  2198. if (!ctx_node)
  2199. return -EINVAL;
  2200. cmd = container_of(header, typeof(*cmd), header);
  2201. num = (cmd->header.size - sizeof(cmd->body)) / sizeof(SVGA3dSoTarget);
  2202. if (num > SVGA3D_DX_MAX_SOTARGETS) {
  2203. VMW_DEBUG_USER("Invalid DX SO binding.\n");
  2204. return -EINVAL;
  2205. }
  2206. for (i = 0; i < num; i++) {
  2207. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2208. VMW_RES_DIRTY_SET,
  2209. user_surface_converter,
  2210. &cmd->targets[i].sid, &res);
  2211. if (unlikely(ret != 0))
  2212. return ret;
  2213. binding.bi.ctx = ctx_node->ctx;
  2214. binding.bi.res = res;
  2215. binding.bi.bt = vmw_ctx_binding_so_target;
  2216. binding.offset = cmd->targets[i].offset;
  2217. binding.size = cmd->targets[i].sizeInBytes;
  2218. binding.slot = i;
  2219. vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot);
  2220. }
  2221. return 0;
  2222. }
  2223. static int vmw_cmd_dx_so_define(struct vmw_private *dev_priv,
  2224. struct vmw_sw_context *sw_context,
  2225. SVGA3dCmdHeader *header)
  2226. {
  2227. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2228. struct vmw_resource *res;
  2229. /*
  2230. * This is based on the fact that all affected define commands have
  2231. * the same initial command body layout.
  2232. */
  2233. struct {
  2234. SVGA3dCmdHeader header;
  2235. uint32 defined_id;
  2236. } *cmd;
  2237. enum vmw_so_type so_type;
  2238. int ret;
  2239. if (!ctx_node)
  2240. return -EINVAL;
  2241. so_type = vmw_so_cmd_to_type(header->id);
  2242. res = vmw_context_cotable(ctx_node->ctx, vmw_so_cotables[so_type]);
  2243. if (IS_ERR_OR_NULL(res))
  2244. return res ? PTR_ERR(res) : -EINVAL;
  2245. cmd = container_of(header, typeof(*cmd), header);
  2246. ret = vmw_cotable_notify(res, cmd->defined_id);
  2247. return ret;
  2248. }
  2249. /**
  2250. * vmw_cmd_dx_check_subresource - Validate SVGA_3D_CMD_DX_[X]_SUBRESOURCE
  2251. * command
  2252. *
  2253. * @dev_priv: Pointer to a device private struct.
  2254. * @sw_context: The software context being used for this batch.
  2255. * @header: Pointer to the command header in the command stream.
  2256. */
  2257. static int vmw_cmd_dx_check_subresource(struct vmw_private *dev_priv,
  2258. struct vmw_sw_context *sw_context,
  2259. SVGA3dCmdHeader *header)
  2260. {
  2261. struct {
  2262. SVGA3dCmdHeader header;
  2263. union {
  2264. SVGA3dCmdDXReadbackSubResource r_body;
  2265. SVGA3dCmdDXInvalidateSubResource i_body;
  2266. SVGA3dCmdDXUpdateSubResource u_body;
  2267. SVGA3dSurfaceId sid;
  2268. };
  2269. } *cmd;
  2270. BUILD_BUG_ON(offsetof(typeof(*cmd), r_body.sid) !=
  2271. offsetof(typeof(*cmd), sid));
  2272. BUILD_BUG_ON(offsetof(typeof(*cmd), i_body.sid) !=
  2273. offsetof(typeof(*cmd), sid));
  2274. BUILD_BUG_ON(offsetof(typeof(*cmd), u_body.sid) !=
  2275. offsetof(typeof(*cmd), sid));
  2276. cmd = container_of(header, typeof(*cmd), header);
  2277. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2278. VMW_RES_DIRTY_NONE, user_surface_converter,
  2279. &cmd->sid, NULL);
  2280. }
  2281. static int vmw_cmd_dx_cid_check(struct vmw_private *dev_priv,
  2282. struct vmw_sw_context *sw_context,
  2283. SVGA3dCmdHeader *header)
  2284. {
  2285. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2286. if (!ctx_node)
  2287. return -EINVAL;
  2288. return 0;
  2289. }
  2290. /**
  2291. * vmw_cmd_dx_view_remove - validate a view remove command and schedule the view
  2292. * resource for removal.
  2293. *
  2294. * @dev_priv: Pointer to a device private struct.
  2295. * @sw_context: The software context being used for this batch.
  2296. * @header: Pointer to the command header in the command stream.
  2297. *
  2298. * Check that the view exists, and if it was not created using this command
  2299. * batch, conditionally make this command a NOP.
  2300. */
  2301. static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv,
  2302. struct vmw_sw_context *sw_context,
  2303. SVGA3dCmdHeader *header)
  2304. {
  2305. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2306. struct {
  2307. SVGA3dCmdHeader header;
  2308. union vmw_view_destroy body;
  2309. } *cmd = container_of(header, typeof(*cmd), header);
  2310. enum vmw_view_type view_type = vmw_view_cmd_to_type(header->id);
  2311. struct vmw_resource *view;
  2312. int ret;
  2313. if (!ctx_node)
  2314. return -EINVAL;
  2315. ret = vmw_view_remove(sw_context->man, cmd->body.view_id, view_type,
  2316. &sw_context->staged_cmd_res, &view);
  2317. if (ret || !view)
  2318. return ret;
  2319. /*
  2320. * If the view wasn't created during this command batch, it might
  2321. * have been removed due to a context swapout, so add a
  2322. * relocation to conditionally make this command a NOP to avoid
  2323. * device errors.
  2324. */
  2325. return vmw_resource_relocation_add(sw_context, view,
  2326. vmw_ptr_diff(sw_context->buf_start,
  2327. &cmd->header.id),
  2328. vmw_res_rel_cond_nop);
  2329. }
  2330. /**
  2331. * vmw_cmd_dx_define_shader - Validate SVGA_3D_CMD_DX_DEFINE_SHADER command
  2332. *
  2333. * @dev_priv: Pointer to a device private struct.
  2334. * @sw_context: The software context being used for this batch.
  2335. * @header: Pointer to the command header in the command stream.
  2336. */
  2337. static int vmw_cmd_dx_define_shader(struct vmw_private *dev_priv,
  2338. struct vmw_sw_context *sw_context,
  2339. SVGA3dCmdHeader *header)
  2340. {
  2341. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2342. struct vmw_resource *res;
  2343. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineShader) =
  2344. container_of(header, typeof(*cmd), header);
  2345. int ret;
  2346. if (!ctx_node)
  2347. return -EINVAL;
  2348. res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXSHADER);
  2349. if (IS_ERR_OR_NULL(res))
  2350. return res ? PTR_ERR(res) : -EINVAL;
  2351. ret = vmw_cotable_notify(res, cmd->body.shaderId);
  2352. if (ret)
  2353. return ret;
  2354. return vmw_dx_shader_add(sw_context->man, ctx_node->ctx,
  2355. cmd->body.shaderId, cmd->body.type,
  2356. &sw_context->staged_cmd_res);
  2357. }
  2358. /**
  2359. * vmw_cmd_dx_destroy_shader - Validate SVGA_3D_CMD_DX_DESTROY_SHADER command
  2360. *
  2361. * @dev_priv: Pointer to a device private struct.
  2362. * @sw_context: The software context being used for this batch.
  2363. * @header: Pointer to the command header in the command stream.
  2364. */
  2365. static int vmw_cmd_dx_destroy_shader(struct vmw_private *dev_priv,
  2366. struct vmw_sw_context *sw_context,
  2367. SVGA3dCmdHeader *header)
  2368. {
  2369. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2370. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDestroyShader) =
  2371. container_of(header, typeof(*cmd), header);
  2372. int ret;
  2373. if (!ctx_node)
  2374. return -EINVAL;
  2375. ret = vmw_shader_remove(sw_context->man, cmd->body.shaderId, 0,
  2376. &sw_context->staged_cmd_res);
  2377. return ret;
  2378. }
  2379. /**
  2380. * vmw_cmd_dx_bind_shader - Validate SVGA_3D_CMD_DX_BIND_SHADER command
  2381. *
  2382. * @dev_priv: Pointer to a device private struct.
  2383. * @sw_context: The software context being used for this batch.
  2384. * @header: Pointer to the command header in the command stream.
  2385. */
  2386. static int vmw_cmd_dx_bind_shader(struct vmw_private *dev_priv,
  2387. struct vmw_sw_context *sw_context,
  2388. SVGA3dCmdHeader *header)
  2389. {
  2390. struct vmw_resource *ctx;
  2391. struct vmw_resource *res;
  2392. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindShader) =
  2393. container_of(header, typeof(*cmd), header);
  2394. int ret;
  2395. if (cmd->body.cid != SVGA3D_INVALID_ID) {
  2396. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  2397. VMW_RES_DIRTY_SET,
  2398. user_context_converter, &cmd->body.cid,
  2399. &ctx);
  2400. if (ret)
  2401. return ret;
  2402. } else {
  2403. struct vmw_ctx_validation_info *ctx_node =
  2404. VMW_GET_CTX_NODE(sw_context);
  2405. if (!ctx_node)
  2406. return -EINVAL;
  2407. ctx = ctx_node->ctx;
  2408. }
  2409. res = vmw_shader_lookup(vmw_context_res_man(ctx), cmd->body.shid, 0);
  2410. if (IS_ERR(res)) {
  2411. VMW_DEBUG_USER("Could not find shader to bind.\n");
  2412. return PTR_ERR(res);
  2413. }
  2414. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
  2415. vmw_val_add_flag_noctx);
  2416. if (ret) {
  2417. VMW_DEBUG_USER("Error creating resource validation node.\n");
  2418. return ret;
  2419. }
  2420. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
  2421. &cmd->body.mobid,
  2422. cmd->body.offsetInBytes);
  2423. }
  2424. /**
  2425. * vmw_cmd_dx_genmips - Validate SVGA_3D_CMD_DX_GENMIPS command
  2426. *
  2427. * @dev_priv: Pointer to a device private struct.
  2428. * @sw_context: The software context being used for this batch.
  2429. * @header: Pointer to the command header in the command stream.
  2430. */
  2431. static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv,
  2432. struct vmw_sw_context *sw_context,
  2433. SVGA3dCmdHeader *header)
  2434. {
  2435. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXGenMips) =
  2436. container_of(header, typeof(*cmd), header);
  2437. struct vmw_resource *view;
  2438. struct vmw_res_cache_entry *rcache;
  2439. view = vmw_view_id_val_add(sw_context, vmw_view_sr,
  2440. cmd->body.shaderResourceViewId);
  2441. if (IS_ERR(view))
  2442. return PTR_ERR(view);
  2443. /*
  2444. * Normally the shader-resource view is not gpu-dirtying, but for
  2445. * this particular command it is...
  2446. * So mark the last looked-up surface, which is the surface
  2447. * the view points to, gpu-dirty.
  2448. */
  2449. rcache = &sw_context->res_cache[vmw_res_surface];
  2450. vmw_validation_res_set_dirty(sw_context->ctx, rcache->private,
  2451. VMW_RES_DIRTY_SET);
  2452. return 0;
  2453. }
  2454. /**
  2455. * vmw_cmd_dx_transfer_from_buffer - Validate
  2456. * SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command
  2457. *
  2458. * @dev_priv: Pointer to a device private struct.
  2459. * @sw_context: The software context being used for this batch.
  2460. * @header: Pointer to the command header in the command stream.
  2461. */
  2462. static int vmw_cmd_dx_transfer_from_buffer(struct vmw_private *dev_priv,
  2463. struct vmw_sw_context *sw_context,
  2464. SVGA3dCmdHeader *header)
  2465. {
  2466. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXTransferFromBuffer) =
  2467. container_of(header, typeof(*cmd), header);
  2468. int ret;
  2469. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2470. VMW_RES_DIRTY_NONE, user_surface_converter,
  2471. &cmd->body.srcSid, NULL);
  2472. if (ret != 0)
  2473. return ret;
  2474. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2475. VMW_RES_DIRTY_SET, user_surface_converter,
  2476. &cmd->body.destSid, NULL);
  2477. }
  2478. /**
  2479. * vmw_cmd_intra_surface_copy - Validate SVGA_3D_CMD_INTRA_SURFACE_COPY command
  2480. *
  2481. * @dev_priv: Pointer to a device private struct.
  2482. * @sw_context: The software context being used for this batch.
  2483. * @header: Pointer to the command header in the command stream.
  2484. */
  2485. static int vmw_cmd_intra_surface_copy(struct vmw_private *dev_priv,
  2486. struct vmw_sw_context *sw_context,
  2487. SVGA3dCmdHeader *header)
  2488. {
  2489. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdIntraSurfaceCopy) =
  2490. container_of(header, typeof(*cmd), header);
  2491. if (!(dev_priv->capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY))
  2492. return -EINVAL;
  2493. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2494. VMW_RES_DIRTY_SET, user_surface_converter,
  2495. &cmd->body.surface.sid, NULL);
  2496. }
  2497. static int vmw_cmd_sm5(struct vmw_private *dev_priv,
  2498. struct vmw_sw_context *sw_context,
  2499. SVGA3dCmdHeader *header)
  2500. {
  2501. if (!has_sm5_context(dev_priv))
  2502. return -EINVAL;
  2503. return 0;
  2504. }
  2505. static int vmw_cmd_sm5_view_define(struct vmw_private *dev_priv,
  2506. struct vmw_sw_context *sw_context,
  2507. SVGA3dCmdHeader *header)
  2508. {
  2509. if (!has_sm5_context(dev_priv))
  2510. return -EINVAL;
  2511. return vmw_cmd_dx_view_define(dev_priv, sw_context, header);
  2512. }
  2513. static int vmw_cmd_sm5_view_remove(struct vmw_private *dev_priv,
  2514. struct vmw_sw_context *sw_context,
  2515. SVGA3dCmdHeader *header)
  2516. {
  2517. if (!has_sm5_context(dev_priv))
  2518. return -EINVAL;
  2519. return vmw_cmd_dx_view_remove(dev_priv, sw_context, header);
  2520. }
  2521. static int vmw_cmd_clear_uav_uint(struct vmw_private *dev_priv,
  2522. struct vmw_sw_context *sw_context,
  2523. SVGA3dCmdHeader *header)
  2524. {
  2525. struct {
  2526. SVGA3dCmdHeader header;
  2527. SVGA3dCmdDXClearUAViewUint body;
  2528. } *cmd = container_of(header, typeof(*cmd), header);
  2529. struct vmw_resource *ret;
  2530. if (!has_sm5_context(dev_priv))
  2531. return -EINVAL;
  2532. ret = vmw_view_id_val_add(sw_context, vmw_view_ua,
  2533. cmd->body.uaViewId);
  2534. return PTR_ERR_OR_ZERO(ret);
  2535. }
  2536. static int vmw_cmd_clear_uav_float(struct vmw_private *dev_priv,
  2537. struct vmw_sw_context *sw_context,
  2538. SVGA3dCmdHeader *header)
  2539. {
  2540. struct {
  2541. SVGA3dCmdHeader header;
  2542. SVGA3dCmdDXClearUAViewFloat body;
  2543. } *cmd = container_of(header, typeof(*cmd), header);
  2544. struct vmw_resource *ret;
  2545. if (!has_sm5_context(dev_priv))
  2546. return -EINVAL;
  2547. ret = vmw_view_id_val_add(sw_context, vmw_view_ua,
  2548. cmd->body.uaViewId);
  2549. return PTR_ERR_OR_ZERO(ret);
  2550. }
  2551. static int vmw_cmd_set_uav(struct vmw_private *dev_priv,
  2552. struct vmw_sw_context *sw_context,
  2553. SVGA3dCmdHeader *header)
  2554. {
  2555. struct {
  2556. SVGA3dCmdHeader header;
  2557. SVGA3dCmdDXSetUAViews body;
  2558. } *cmd = container_of(header, typeof(*cmd), header);
  2559. u32 num_uav = (cmd->header.size - sizeof(cmd->body)) /
  2560. sizeof(SVGA3dUAViewId);
  2561. int ret;
  2562. if (!has_sm5_context(dev_priv))
  2563. return -EINVAL;
  2564. if (num_uav > vmw_max_num_uavs(dev_priv)) {
  2565. VMW_DEBUG_USER("Invalid UAV binding.\n");
  2566. return -EINVAL;
  2567. }
  2568. ret = vmw_view_bindings_add(sw_context, vmw_view_ua,
  2569. vmw_ctx_binding_uav, 0, (void *)&cmd[1],
  2570. num_uav, 0);
  2571. if (ret)
  2572. return ret;
  2573. vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 0,
  2574. cmd->body.uavSpliceIndex);
  2575. return ret;
  2576. }
  2577. static int vmw_cmd_set_cs_uav(struct vmw_private *dev_priv,
  2578. struct vmw_sw_context *sw_context,
  2579. SVGA3dCmdHeader *header)
  2580. {
  2581. struct {
  2582. SVGA3dCmdHeader header;
  2583. SVGA3dCmdDXSetCSUAViews body;
  2584. } *cmd = container_of(header, typeof(*cmd), header);
  2585. u32 num_uav = (cmd->header.size - sizeof(cmd->body)) /
  2586. sizeof(SVGA3dUAViewId);
  2587. int ret;
  2588. if (!has_sm5_context(dev_priv))
  2589. return -EINVAL;
  2590. if (num_uav > vmw_max_num_uavs(dev_priv)) {
  2591. VMW_DEBUG_USER("Invalid UAV binding.\n");
  2592. return -EINVAL;
  2593. }
  2594. ret = vmw_view_bindings_add(sw_context, vmw_view_ua,
  2595. vmw_ctx_binding_cs_uav, 0, (void *)&cmd[1],
  2596. num_uav, 0);
  2597. if (ret)
  2598. return ret;
  2599. vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 1,
  2600. cmd->body.startIndex);
  2601. return ret;
  2602. }
  2603. static int vmw_cmd_dx_define_streamoutput(struct vmw_private *dev_priv,
  2604. struct vmw_sw_context *sw_context,
  2605. SVGA3dCmdHeader *header)
  2606. {
  2607. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2608. struct vmw_resource *res;
  2609. struct {
  2610. SVGA3dCmdHeader header;
  2611. SVGA3dCmdDXDefineStreamOutputWithMob body;
  2612. } *cmd = container_of(header, typeof(*cmd), header);
  2613. int ret;
  2614. if (!has_sm5_context(dev_priv))
  2615. return -EINVAL;
  2616. if (!ctx_node) {
  2617. DRM_ERROR("DX Context not set.\n");
  2618. return -EINVAL;
  2619. }
  2620. res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_STREAMOUTPUT);
  2621. if (IS_ERR_OR_NULL(res))
  2622. return res ? PTR_ERR(res) : -EINVAL;
  2623. ret = vmw_cotable_notify(res, cmd->body.soid);
  2624. if (ret)
  2625. return ret;
  2626. return vmw_dx_streamoutput_add(sw_context->man, ctx_node->ctx,
  2627. cmd->body.soid,
  2628. &sw_context->staged_cmd_res);
  2629. }
  2630. static int vmw_cmd_dx_destroy_streamoutput(struct vmw_private *dev_priv,
  2631. struct vmw_sw_context *sw_context,
  2632. SVGA3dCmdHeader *header)
  2633. {
  2634. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2635. struct vmw_resource *res;
  2636. struct {
  2637. SVGA3dCmdHeader header;
  2638. SVGA3dCmdDXDestroyStreamOutput body;
  2639. } *cmd = container_of(header, typeof(*cmd), header);
  2640. if (!ctx_node) {
  2641. DRM_ERROR("DX Context not set.\n");
  2642. return -EINVAL;
  2643. }
  2644. /*
  2645. * When device does not support SM5 then streamoutput with mob command is
  2646. * not available to user-space. Simply return in this case.
  2647. */
  2648. if (!has_sm5_context(dev_priv))
  2649. return 0;
  2650. /*
  2651. * With SM5 capable device if lookup fails then user-space probably used
  2652. * old streamoutput define command. Return without an error.
  2653. */
  2654. res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
  2655. cmd->body.soid);
  2656. if (IS_ERR(res))
  2657. return 0;
  2658. return vmw_dx_streamoutput_remove(sw_context->man, cmd->body.soid,
  2659. &sw_context->staged_cmd_res);
  2660. }
  2661. static int vmw_cmd_dx_bind_streamoutput(struct vmw_private *dev_priv,
  2662. struct vmw_sw_context *sw_context,
  2663. SVGA3dCmdHeader *header)
  2664. {
  2665. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2666. struct vmw_resource *res;
  2667. struct {
  2668. SVGA3dCmdHeader header;
  2669. SVGA3dCmdDXBindStreamOutput body;
  2670. } *cmd = container_of(header, typeof(*cmd), header);
  2671. int ret;
  2672. if (!has_sm5_context(dev_priv))
  2673. return -EINVAL;
  2674. if (!ctx_node) {
  2675. DRM_ERROR("DX Context not set.\n");
  2676. return -EINVAL;
  2677. }
  2678. res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
  2679. cmd->body.soid);
  2680. if (IS_ERR(res)) {
  2681. DRM_ERROR("Could not find streamoutput to bind.\n");
  2682. return PTR_ERR(res);
  2683. }
  2684. vmw_dx_streamoutput_set_size(res, cmd->body.sizeInBytes);
  2685. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
  2686. vmw_val_add_flag_noctx);
  2687. if (ret) {
  2688. DRM_ERROR("Error creating resource validation node.\n");
  2689. return ret;
  2690. }
  2691. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
  2692. &cmd->body.mobid,
  2693. cmd->body.offsetInBytes);
  2694. }
  2695. static int vmw_cmd_dx_set_streamoutput(struct vmw_private *dev_priv,
  2696. struct vmw_sw_context *sw_context,
  2697. SVGA3dCmdHeader *header)
  2698. {
  2699. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2700. struct vmw_resource *res;
  2701. struct vmw_ctx_bindinfo_so binding;
  2702. struct {
  2703. SVGA3dCmdHeader header;
  2704. SVGA3dCmdDXSetStreamOutput body;
  2705. } *cmd = container_of(header, typeof(*cmd), header);
  2706. int ret;
  2707. if (!ctx_node) {
  2708. DRM_ERROR("DX Context not set.\n");
  2709. return -EINVAL;
  2710. }
  2711. if (cmd->body.soid == SVGA3D_INVALID_ID)
  2712. return 0;
  2713. /*
  2714. * When device does not support SM5 then streamoutput with mob command is
  2715. * not available to user-space. Simply return in this case.
  2716. */
  2717. if (!has_sm5_context(dev_priv))
  2718. return 0;
  2719. /*
  2720. * With SM5 capable device if lookup fails then user-space probably used
  2721. * old streamoutput define command. Return without an error.
  2722. */
  2723. res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
  2724. cmd->body.soid);
  2725. if (IS_ERR(res)) {
  2726. return 0;
  2727. }
  2728. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
  2729. vmw_val_add_flag_noctx);
  2730. if (ret) {
  2731. DRM_ERROR("Error creating resource validation node.\n");
  2732. return ret;
  2733. }
  2734. binding.bi.ctx = ctx_node->ctx;
  2735. binding.bi.res = res;
  2736. binding.bi.bt = vmw_ctx_binding_so;
  2737. binding.slot = 0; /* Only one SO set to context at a time. */
  2738. vmw_binding_add(sw_context->dx_ctx_node->staged, &binding.bi, 0,
  2739. binding.slot);
  2740. return ret;
  2741. }
  2742. static int vmw_cmd_indexed_instanced_indirect(struct vmw_private *dev_priv,
  2743. struct vmw_sw_context *sw_context,
  2744. SVGA3dCmdHeader *header)
  2745. {
  2746. struct vmw_draw_indexed_instanced_indirect_cmd {
  2747. SVGA3dCmdHeader header;
  2748. SVGA3dCmdDXDrawIndexedInstancedIndirect body;
  2749. } *cmd = container_of(header, typeof(*cmd), header);
  2750. if (!has_sm5_context(dev_priv))
  2751. return -EINVAL;
  2752. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2753. VMW_RES_DIRTY_NONE, user_surface_converter,
  2754. &cmd->body.argsBufferSid, NULL);
  2755. }
  2756. static int vmw_cmd_instanced_indirect(struct vmw_private *dev_priv,
  2757. struct vmw_sw_context *sw_context,
  2758. SVGA3dCmdHeader *header)
  2759. {
  2760. struct vmw_draw_instanced_indirect_cmd {
  2761. SVGA3dCmdHeader header;
  2762. SVGA3dCmdDXDrawInstancedIndirect body;
  2763. } *cmd = container_of(header, typeof(*cmd), header);
  2764. if (!has_sm5_context(dev_priv))
  2765. return -EINVAL;
  2766. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2767. VMW_RES_DIRTY_NONE, user_surface_converter,
  2768. &cmd->body.argsBufferSid, NULL);
  2769. }
  2770. static int vmw_cmd_dispatch_indirect(struct vmw_private *dev_priv,
  2771. struct vmw_sw_context *sw_context,
  2772. SVGA3dCmdHeader *header)
  2773. {
  2774. struct vmw_dispatch_indirect_cmd {
  2775. SVGA3dCmdHeader header;
  2776. SVGA3dCmdDXDispatchIndirect body;
  2777. } *cmd = container_of(header, typeof(*cmd), header);
  2778. if (!has_sm5_context(dev_priv))
  2779. return -EINVAL;
  2780. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2781. VMW_RES_DIRTY_NONE, user_surface_converter,
  2782. &cmd->body.argsBufferSid, NULL);
  2783. }
  2784. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  2785. struct vmw_sw_context *sw_context,
  2786. void *buf, uint32_t *size)
  2787. {
  2788. uint32_t size_remaining = *size;
  2789. uint32_t cmd_id;
  2790. cmd_id = ((uint32_t *)buf)[0];
  2791. switch (cmd_id) {
  2792. case SVGA_CMD_UPDATE:
  2793. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  2794. break;
  2795. case SVGA_CMD_DEFINE_GMRFB:
  2796. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  2797. break;
  2798. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  2799. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2800. break;
  2801. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  2802. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2803. break;
  2804. default:
  2805. VMW_DEBUG_USER("Unsupported SVGA command: %u.\n", cmd_id);
  2806. return -EINVAL;
  2807. }
  2808. if (*size > size_remaining) {
  2809. VMW_DEBUG_USER("Invalid SVGA command (size mismatch): %u.\n",
  2810. cmd_id);
  2811. return -EINVAL;
  2812. }
  2813. if (unlikely(!sw_context->kernel)) {
  2814. VMW_DEBUG_USER("Kernel only SVGA command: %u.\n", cmd_id);
  2815. return -EPERM;
  2816. }
  2817. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  2818. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  2819. return 0;
  2820. }
  2821. static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  2822. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  2823. false, false, false),
  2824. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  2825. false, false, false),
  2826. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  2827. true, false, false),
  2828. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  2829. true, false, false),
  2830. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  2831. true, false, false),
  2832. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  2833. false, false, false),
  2834. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  2835. false, false, false),
  2836. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  2837. true, false, false),
  2838. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  2839. true, false, false),
  2840. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  2841. true, false, false),
  2842. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  2843. &vmw_cmd_set_render_target_check, true, false, false),
  2844. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  2845. true, false, false),
  2846. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  2847. true, false, false),
  2848. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  2849. true, false, false),
  2850. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  2851. true, false, false),
  2852. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  2853. true, false, false),
  2854. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  2855. true, false, false),
  2856. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  2857. true, false, false),
  2858. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  2859. false, false, false),
  2860. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
  2861. true, false, false),
  2862. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
  2863. true, false, false),
  2864. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  2865. true, false, false),
  2866. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
  2867. true, false, false),
  2868. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  2869. true, false, false),
  2870. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  2871. true, false, false),
  2872. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  2873. true, false, false),
  2874. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  2875. true, false, false),
  2876. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  2877. true, false, false),
  2878. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  2879. true, false, false),
  2880. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  2881. &vmw_cmd_blt_surf_screen_check, false, false, false),
  2882. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  2883. false, false, false),
  2884. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  2885. false, false, false),
  2886. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  2887. false, false, false),
  2888. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  2889. false, false, false),
  2890. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  2891. false, false, false),
  2892. VMW_CMD_DEF(SVGA_3D_CMD_DEAD1, &vmw_cmd_invalid,
  2893. false, false, false),
  2894. VMW_CMD_DEF(SVGA_3D_CMD_DEAD2, &vmw_cmd_invalid,
  2895. false, false, false),
  2896. VMW_CMD_DEF(SVGA_3D_CMD_DEAD12, &vmw_cmd_invalid, false, false, false),
  2897. VMW_CMD_DEF(SVGA_3D_CMD_DEAD13, &vmw_cmd_invalid, false, false, false),
  2898. VMW_CMD_DEF(SVGA_3D_CMD_DEAD14, &vmw_cmd_invalid, false, false, false),
  2899. VMW_CMD_DEF(SVGA_3D_CMD_DEAD15, &vmw_cmd_invalid, false, false, false),
  2900. VMW_CMD_DEF(SVGA_3D_CMD_DEAD16, &vmw_cmd_invalid, false, false, false),
  2901. VMW_CMD_DEF(SVGA_3D_CMD_DEAD17, &vmw_cmd_invalid, false, false, false),
  2902. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  2903. false, false, true),
  2904. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  2905. false, false, true),
  2906. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  2907. false, false, true),
  2908. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  2909. false, false, true),
  2910. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB64, &vmw_cmd_invalid,
  2911. false, false, true),
  2912. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  2913. false, false, true),
  2914. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  2915. false, false, true),
  2916. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  2917. false, false, true),
  2918. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  2919. true, false, true),
  2920. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  2921. false, false, true),
  2922. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  2923. true, false, true),
  2924. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  2925. &vmw_cmd_update_gb_surface, true, false, true),
  2926. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  2927. &vmw_cmd_readback_gb_image, true, false, true),
  2928. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  2929. &vmw_cmd_readback_gb_surface, true, false, true),
  2930. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  2931. &vmw_cmd_invalidate_gb_image, true, false, true),
  2932. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  2933. &vmw_cmd_invalidate_gb_surface, true, false, true),
  2934. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  2935. false, false, true),
  2936. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  2937. false, false, true),
  2938. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  2939. false, false, true),
  2940. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  2941. false, false, true),
  2942. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  2943. false, false, true),
  2944. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  2945. false, false, true),
  2946. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  2947. true, false, true),
  2948. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  2949. false, false, true),
  2950. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  2951. false, false, false),
  2952. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  2953. true, false, true),
  2954. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  2955. true, false, true),
  2956. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  2957. true, false, true),
  2958. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  2959. true, false, true),
  2960. VMW_CMD_DEF(SVGA_3D_CMD_NOP_ERROR, &vmw_cmd_ok,
  2961. true, false, true),
  2962. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  2963. false, false, true),
  2964. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  2965. false, false, true),
  2966. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  2967. false, false, true),
  2968. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  2969. false, false, true),
  2970. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  2971. false, false, true),
  2972. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  2973. false, false, true),
  2974. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  2975. false, false, true),
  2976. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  2977. false, false, true),
  2978. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  2979. false, false, true),
  2980. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  2981. false, false, true),
  2982. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  2983. true, false, true),
  2984. VMW_CMD_DEF(SVGA_3D_CMD_GB_SCREEN_DMA, &vmw_cmd_invalid,
  2985. false, false, true),
  2986. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH, &vmw_cmd_invalid,
  2987. false, false, true),
  2988. VMW_CMD_DEF(SVGA_3D_CMD_GB_MOB_FENCE, &vmw_cmd_invalid,
  2989. false, false, true),
  2990. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V2, &vmw_cmd_invalid,
  2991. false, false, true),
  2992. /* SM commands */
  2993. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_CONTEXT, &vmw_cmd_invalid,
  2994. false, false, true),
  2995. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_CONTEXT, &vmw_cmd_invalid,
  2996. false, false, true),
  2997. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_CONTEXT, &vmw_cmd_invalid,
  2998. false, false, true),
  2999. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_CONTEXT, &vmw_cmd_invalid,
  3000. false, false, true),
  3001. VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_CONTEXT, &vmw_cmd_invalid,
  3002. false, false, true),
  3003. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
  3004. &vmw_cmd_dx_set_single_constant_buffer, true, false, true),
  3005. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
  3006. &vmw_cmd_dx_set_shader_res, true, false, true),
  3007. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER, &vmw_cmd_dx_set_shader,
  3008. true, false, true),
  3009. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SAMPLERS, &vmw_cmd_dx_cid_check,
  3010. true, false, true),
  3011. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW, &vmw_cmd_dx_cid_check,
  3012. true, false, true),
  3013. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED, &vmw_cmd_dx_cid_check,
  3014. true, false, true),
  3015. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED, &vmw_cmd_dx_cid_check,
  3016. true, false, true),
  3017. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED,
  3018. &vmw_cmd_dx_cid_check, true, false, true),
  3019. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_AUTO, &vmw_cmd_dx_cid_check,
  3020. true, false, true),
  3021. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
  3022. &vmw_cmd_dx_set_vertex_buffers, true, false, true),
  3023. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
  3024. &vmw_cmd_dx_set_index_buffer, true, false, true),
  3025. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RENDERTARGETS,
  3026. &vmw_cmd_dx_set_rendertargets, true, false, true),
  3027. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_BLEND_STATE, &vmw_cmd_dx_cid_check,
  3028. true, false, true),
  3029. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE,
  3030. &vmw_cmd_dx_cid_check, true, false, true),
  3031. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RASTERIZER_STATE,
  3032. &vmw_cmd_dx_cid_check, true, false, true),
  3033. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
  3034. true, false, true),
  3035. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
  3036. true, false, true),
  3037. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
  3038. true, false, true),
  3039. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
  3040. &vmw_cmd_dx_cid_check, true, false, true),
  3041. VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
  3042. true, false, true),
  3043. VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
  3044. true, false, true),
  3045. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
  3046. true, false, true),
  3047. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
  3048. true, false, true),
  3049. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
  3050. true, false, true),
  3051. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SCISSORRECTS, &vmw_cmd_dx_cid_check,
  3052. true, false, true),
  3053. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
  3054. &vmw_cmd_dx_clear_rendertarget_view, true, false, true),
  3055. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
  3056. &vmw_cmd_dx_clear_depthstencil_view, true, false, true),
  3057. VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY, &vmw_cmd_invalid,
  3058. true, false, true),
  3059. VMW_CMD_DEF(SVGA_3D_CMD_DX_GENMIPS, &vmw_cmd_dx_genmips,
  3060. true, false, true),
  3061. VMW_CMD_DEF(SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
  3062. &vmw_cmd_dx_check_subresource, true, false, true),
  3063. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
  3064. &vmw_cmd_dx_check_subresource, true, false, true),
  3065. VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE,
  3066. &vmw_cmd_dx_check_subresource, true, false, true),
  3067. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
  3068. &vmw_cmd_dx_view_define, true, false, true),
  3069. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW,
  3070. &vmw_cmd_dx_view_remove, true, false, true),
  3071. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
  3072. &vmw_cmd_dx_view_define, true, false, true),
  3073. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW,
  3074. &vmw_cmd_dx_view_remove, true, false, true),
  3075. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
  3076. &vmw_cmd_dx_view_define, true, false, true),
  3077. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW,
  3078. &vmw_cmd_dx_view_remove, true, false, true),
  3079. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
  3080. &vmw_cmd_dx_so_define, true, false, true),
  3081. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT,
  3082. &vmw_cmd_dx_cid_check, true, false, true),
  3083. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_BLEND_STATE,
  3084. &vmw_cmd_dx_so_define, true, false, true),
  3085. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_BLEND_STATE,
  3086. &vmw_cmd_dx_cid_check, true, false, true),
  3087. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE,
  3088. &vmw_cmd_dx_so_define, true, false, true),
  3089. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE,
  3090. &vmw_cmd_dx_cid_check, true, false, true),
  3091. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE,
  3092. &vmw_cmd_dx_so_define, true, false, true),
  3093. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE,
  3094. &vmw_cmd_dx_cid_check, true, false, true),
  3095. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE,
  3096. &vmw_cmd_dx_so_define, true, false, true),
  3097. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE,
  3098. &vmw_cmd_dx_cid_check, true, false, true),
  3099. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADER,
  3100. &vmw_cmd_dx_define_shader, true, false, true),
  3101. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADER,
  3102. &vmw_cmd_dx_destroy_shader, true, false, true),
  3103. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_SHADER,
  3104. &vmw_cmd_dx_bind_shader, true, false, true),
  3105. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT,
  3106. &vmw_cmd_dx_so_define, true, false, true),
  3107. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT,
  3108. &vmw_cmd_dx_destroy_streamoutput, true, false, true),
  3109. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_STREAMOUTPUT,
  3110. &vmw_cmd_dx_set_streamoutput, true, false, true),
  3111. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SOTARGETS,
  3112. &vmw_cmd_dx_set_so_targets, true, false, true),
  3113. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INPUT_LAYOUT,
  3114. &vmw_cmd_dx_cid_check, true, false, true),
  3115. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_TOPOLOGY,
  3116. &vmw_cmd_dx_cid_check, true, false, true),
  3117. VMW_CMD_DEF(SVGA_3D_CMD_DX_BUFFER_COPY,
  3118. &vmw_cmd_buffer_copy_check, true, false, true),
  3119. VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY_REGION,
  3120. &vmw_cmd_pred_copy_check, true, false, true),
  3121. VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
  3122. &vmw_cmd_dx_transfer_from_buffer,
  3123. true, false, true),
  3124. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET,
  3125. &vmw_cmd_dx_set_constant_buffer_offset,
  3126. true, false, true),
  3127. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET,
  3128. &vmw_cmd_dx_set_constant_buffer_offset,
  3129. true, false, true),
  3130. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET,
  3131. &vmw_cmd_dx_set_constant_buffer_offset,
  3132. true, false, true),
  3133. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET,
  3134. &vmw_cmd_dx_set_constant_buffer_offset,
  3135. true, false, true),
  3136. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET,
  3137. &vmw_cmd_dx_set_constant_buffer_offset,
  3138. true, false, true),
  3139. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET,
  3140. &vmw_cmd_dx_set_constant_buffer_offset,
  3141. true, false, true),
  3142. VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy,
  3143. true, false, true),
  3144. /*
  3145. * SM5 commands
  3146. */
  3147. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_UA_VIEW, &vmw_cmd_sm5_view_define,
  3148. true, false, true),
  3149. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_UA_VIEW, &vmw_cmd_sm5_view_remove,
  3150. true, false, true),
  3151. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT, &vmw_cmd_clear_uav_uint,
  3152. true, false, true),
  3153. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT,
  3154. &vmw_cmd_clear_uav_float, true, false, true),
  3155. VMW_CMD_DEF(SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT, &vmw_cmd_invalid, true,
  3156. false, true),
  3157. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_UA_VIEWS, &vmw_cmd_set_uav, true, false,
  3158. true),
  3159. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,
  3160. &vmw_cmd_indexed_instanced_indirect, true, false, true),
  3161. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,
  3162. &vmw_cmd_instanced_indirect, true, false, true),
  3163. VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH, &vmw_cmd_sm5, true, false, true),
  3164. VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH_INDIRECT,
  3165. &vmw_cmd_dispatch_indirect, true, false, true),
  3166. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_UA_VIEWS, &vmw_cmd_set_cs_uav, true,
  3167. false, true),
  3168. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2,
  3169. &vmw_cmd_sm5_view_define, true, false, true),
  3170. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB,
  3171. &vmw_cmd_dx_define_streamoutput, true, false, true),
  3172. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_STREAMOUTPUT,
  3173. &vmw_cmd_dx_bind_streamoutput, true, false, true),
  3174. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2,
  3175. &vmw_cmd_dx_so_define, true, false, true),
  3176. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V4,
  3177. &vmw_cmd_invalid, false, false, true),
  3178. };
  3179. bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd)
  3180. {
  3181. u32 cmd_id = ((u32 *) buf)[0];
  3182. if (cmd_id >= SVGA_CMD_MAX) {
  3183. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  3184. const struct vmw_cmd_entry *entry;
  3185. *size = header->size + sizeof(SVGA3dCmdHeader);
  3186. cmd_id = header->id;
  3187. if (cmd_id >= SVGA_3D_CMD_MAX)
  3188. return false;
  3189. cmd_id -= SVGA_3D_CMD_BASE;
  3190. entry = &vmw_cmd_entries[cmd_id];
  3191. *cmd = entry->cmd_name;
  3192. return true;
  3193. }
  3194. switch (cmd_id) {
  3195. case SVGA_CMD_UPDATE:
  3196. *cmd = "SVGA_CMD_UPDATE";
  3197. *size = sizeof(u32) + sizeof(SVGAFifoCmdUpdate);
  3198. break;
  3199. case SVGA_CMD_DEFINE_GMRFB:
  3200. *cmd = "SVGA_CMD_DEFINE_GMRFB";
  3201. *size = sizeof(u32) + sizeof(SVGAFifoCmdDefineGMRFB);
  3202. break;
  3203. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  3204. *cmd = "SVGA_CMD_BLIT_GMRFB_TO_SCREEN";
  3205. *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  3206. break;
  3207. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  3208. *cmd = "SVGA_CMD_BLIT_SCREEN_TO_GMRFB";
  3209. *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  3210. break;
  3211. default:
  3212. *cmd = "UNKNOWN";
  3213. *size = 0;
  3214. return false;
  3215. }
  3216. return true;
  3217. }
  3218. static int vmw_cmd_check(struct vmw_private *dev_priv,
  3219. struct vmw_sw_context *sw_context, void *buf,
  3220. uint32_t *size)
  3221. {
  3222. uint32_t cmd_id;
  3223. uint32_t size_remaining = *size;
  3224. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  3225. int ret;
  3226. const struct vmw_cmd_entry *entry;
  3227. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  3228. cmd_id = ((uint32_t *)buf)[0];
  3229. /* Handle any none 3D commands */
  3230. if (unlikely(cmd_id < SVGA_CMD_MAX))
  3231. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  3232. cmd_id = header->id;
  3233. *size = header->size + sizeof(SVGA3dCmdHeader);
  3234. cmd_id -= SVGA_3D_CMD_BASE;
  3235. if (unlikely(*size > size_remaining))
  3236. goto out_invalid;
  3237. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  3238. goto out_invalid;
  3239. entry = &vmw_cmd_entries[cmd_id];
  3240. if (unlikely(!entry->func))
  3241. goto out_invalid;
  3242. if (unlikely(!entry->user_allow && !sw_context->kernel))
  3243. goto out_privileged;
  3244. if (unlikely(entry->gb_disable && gb))
  3245. goto out_old;
  3246. if (unlikely(entry->gb_enable && !gb))
  3247. goto out_new;
  3248. ret = entry->func(dev_priv, sw_context, header);
  3249. if (unlikely(ret != 0)) {
  3250. VMW_DEBUG_USER("SVGA3D command: %d failed with error %d\n",
  3251. cmd_id + SVGA_3D_CMD_BASE, ret);
  3252. return ret;
  3253. }
  3254. return 0;
  3255. out_invalid:
  3256. VMW_DEBUG_USER("Invalid SVGA3D command: %d\n",
  3257. cmd_id + SVGA_3D_CMD_BASE);
  3258. return -EINVAL;
  3259. out_privileged:
  3260. VMW_DEBUG_USER("Privileged SVGA3D command: %d\n",
  3261. cmd_id + SVGA_3D_CMD_BASE);
  3262. return -EPERM;
  3263. out_old:
  3264. VMW_DEBUG_USER("Deprecated (disallowed) SVGA3D command: %d\n",
  3265. cmd_id + SVGA_3D_CMD_BASE);
  3266. return -EINVAL;
  3267. out_new:
  3268. VMW_DEBUG_USER("SVGA3D command: %d not supported by virtual device.\n",
  3269. cmd_id + SVGA_3D_CMD_BASE);
  3270. return -EINVAL;
  3271. }
  3272. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  3273. struct vmw_sw_context *sw_context, void *buf,
  3274. uint32_t size)
  3275. {
  3276. int32_t cur_size = size;
  3277. int ret;
  3278. sw_context->buf_start = buf;
  3279. while (cur_size > 0) {
  3280. size = cur_size;
  3281. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  3282. if (unlikely(ret != 0))
  3283. return ret;
  3284. buf = (void *)((unsigned long) buf + size);
  3285. cur_size -= size;
  3286. }
  3287. if (unlikely(cur_size != 0)) {
  3288. VMW_DEBUG_USER("Command verifier out of sync.\n");
  3289. return -EINVAL;
  3290. }
  3291. return 0;
  3292. }
  3293. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  3294. {
  3295. /* Memory is validation context memory, so no need to free it */
  3296. INIT_LIST_HEAD(&sw_context->bo_relocations);
  3297. }
  3298. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  3299. {
  3300. struct vmw_relocation *reloc;
  3301. struct ttm_buffer_object *bo;
  3302. list_for_each_entry(reloc, &sw_context->bo_relocations, head) {
  3303. bo = &reloc->vbo->tbo;
  3304. switch (bo->resource->mem_type) {
  3305. case TTM_PL_VRAM:
  3306. reloc->location->offset += bo->resource->start << PAGE_SHIFT;
  3307. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  3308. break;
  3309. case VMW_PL_GMR:
  3310. reloc->location->gmrId = bo->resource->start;
  3311. break;
  3312. case VMW_PL_MOB:
  3313. *reloc->mob_loc = bo->resource->start;
  3314. break;
  3315. default:
  3316. BUG();
  3317. }
  3318. }
  3319. vmw_free_relocations(sw_context);
  3320. }
  3321. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  3322. uint32_t size)
  3323. {
  3324. if (likely(sw_context->cmd_bounce_size >= size))
  3325. return 0;
  3326. if (sw_context->cmd_bounce_size == 0)
  3327. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  3328. while (sw_context->cmd_bounce_size < size) {
  3329. sw_context->cmd_bounce_size =
  3330. PAGE_ALIGN(sw_context->cmd_bounce_size +
  3331. (sw_context->cmd_bounce_size >> 1));
  3332. }
  3333. vfree(sw_context->cmd_bounce);
  3334. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  3335. if (sw_context->cmd_bounce == NULL) {
  3336. VMW_DEBUG_USER("Failed to allocate command bounce buffer.\n");
  3337. sw_context->cmd_bounce_size = 0;
  3338. return -ENOMEM;
  3339. }
  3340. return 0;
  3341. }
  3342. /*
  3343. * vmw_execbuf_fence_commands - create and submit a command stream fence
  3344. *
  3345. * Creates a fence object and submits a command stream marker.
  3346. * If this fails for some reason, We sync the fifo and return NULL.
  3347. * It is then safe to fence buffers with a NULL pointer.
  3348. *
  3349. * If @p_handle is not NULL @file_priv must also not be NULL. Creates a
  3350. * userspace handle if @p_handle is not NULL, otherwise not.
  3351. */
  3352. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  3353. struct vmw_private *dev_priv,
  3354. struct vmw_fence_obj **p_fence,
  3355. uint32_t *p_handle)
  3356. {
  3357. uint32_t sequence;
  3358. int ret;
  3359. bool synced = false;
  3360. /* p_handle implies file_priv. */
  3361. BUG_ON(p_handle != NULL && file_priv == NULL);
  3362. ret = vmw_cmd_send_fence(dev_priv, &sequence);
  3363. if (unlikely(ret != 0)) {
  3364. VMW_DEBUG_USER("Fence submission error. Syncing.\n");
  3365. synced = true;
  3366. }
  3367. if (p_handle != NULL)
  3368. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  3369. sequence, p_fence, p_handle);
  3370. else
  3371. ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
  3372. if (unlikely(ret != 0 && !synced)) {
  3373. (void) vmw_fallback_wait(dev_priv, false, false, sequence,
  3374. false, VMW_FENCE_WAIT_TIMEOUT);
  3375. *p_fence = NULL;
  3376. }
  3377. return ret;
  3378. }
  3379. /**
  3380. * vmw_execbuf_copy_fence_user - copy fence object information to user-space.
  3381. *
  3382. * @dev_priv: Pointer to a vmw_private struct.
  3383. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  3384. * @ret: Return value from fence object creation.
  3385. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to which
  3386. * the information should be copied.
  3387. * @fence: Pointer to the fenc object.
  3388. * @fence_handle: User-space fence handle.
  3389. * @out_fence_fd: exported file descriptor for the fence. -1 if not used
  3390. *
  3391. * This function copies fence information to user-space. If copying fails, the
  3392. * user-space struct drm_vmw_fence_rep::error member is hopefully left
  3393. * untouched, and if it's preloaded with an -EFAULT by user-space, the error
  3394. * will hopefully be detected.
  3395. *
  3396. * Also if copying fails, user-space will be unable to signal the fence object
  3397. * so we wait for it immediately, and then unreference the user-space reference.
  3398. */
  3399. int
  3400. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  3401. struct vmw_fpriv *vmw_fp, int ret,
  3402. struct drm_vmw_fence_rep __user *user_fence_rep,
  3403. struct vmw_fence_obj *fence, uint32_t fence_handle,
  3404. int32_t out_fence_fd)
  3405. {
  3406. struct drm_vmw_fence_rep fence_rep;
  3407. if (user_fence_rep == NULL)
  3408. return 0;
  3409. memset(&fence_rep, 0, sizeof(fence_rep));
  3410. fence_rep.error = ret;
  3411. fence_rep.fd = out_fence_fd;
  3412. if (ret == 0) {
  3413. BUG_ON(fence == NULL);
  3414. fence_rep.handle = fence_handle;
  3415. fence_rep.seqno = fence->base.seqno;
  3416. vmw_update_seqno(dev_priv);
  3417. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  3418. }
  3419. /*
  3420. * copy_to_user errors will be detected by user space not seeing
  3421. * fence_rep::error filled in. Typically user-space would have pre-set
  3422. * that member to -EFAULT.
  3423. */
  3424. ret = copy_to_user(user_fence_rep, &fence_rep,
  3425. sizeof(fence_rep));
  3426. /*
  3427. * User-space lost the fence object. We need to sync and unreference the
  3428. * handle.
  3429. */
  3430. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  3431. ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle);
  3432. VMW_DEBUG_USER("Fence copy error. Syncing.\n");
  3433. (void) vmw_fence_obj_wait(fence, false, false,
  3434. VMW_FENCE_WAIT_TIMEOUT);
  3435. }
  3436. return ret ? -EFAULT : 0;
  3437. }
  3438. /**
  3439. * vmw_execbuf_submit_fifo - Patch a command batch and submit it using the fifo.
  3440. *
  3441. * @dev_priv: Pointer to a device private structure.
  3442. * @kernel_commands: Pointer to the unpatched command batch.
  3443. * @command_size: Size of the unpatched command batch.
  3444. * @sw_context: Structure holding the relocation lists.
  3445. *
  3446. * Side effects: If this function returns 0, then the command batch pointed to
  3447. * by @kernel_commands will have been modified.
  3448. */
  3449. static int vmw_execbuf_submit_fifo(struct vmw_private *dev_priv,
  3450. void *kernel_commands, u32 command_size,
  3451. struct vmw_sw_context *sw_context)
  3452. {
  3453. void *cmd;
  3454. if (sw_context->dx_ctx_node)
  3455. cmd = VMW_CMD_CTX_RESERVE(dev_priv, command_size,
  3456. sw_context->dx_ctx_node->ctx->id);
  3457. else
  3458. cmd = VMW_CMD_RESERVE(dev_priv, command_size);
  3459. if (!cmd)
  3460. return -ENOMEM;
  3461. vmw_apply_relocations(sw_context);
  3462. memcpy(cmd, kernel_commands, command_size);
  3463. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  3464. vmw_resource_relocations_free(&sw_context->res_relocations);
  3465. vmw_cmd_commit(dev_priv, command_size);
  3466. return 0;
  3467. }
  3468. /**
  3469. * vmw_execbuf_submit_cmdbuf - Patch a command batch and submit it using the
  3470. * command buffer manager.
  3471. *
  3472. * @dev_priv: Pointer to a device private structure.
  3473. * @header: Opaque handle to the command buffer allocation.
  3474. * @command_size: Size of the unpatched command batch.
  3475. * @sw_context: Structure holding the relocation lists.
  3476. *
  3477. * Side effects: If this function returns 0, then the command buffer represented
  3478. * by @header will have been modified.
  3479. */
  3480. static int vmw_execbuf_submit_cmdbuf(struct vmw_private *dev_priv,
  3481. struct vmw_cmdbuf_header *header,
  3482. u32 command_size,
  3483. struct vmw_sw_context *sw_context)
  3484. {
  3485. u32 id = ((sw_context->dx_ctx_node) ? sw_context->dx_ctx_node->ctx->id :
  3486. SVGA3D_INVALID_ID);
  3487. void *cmd = vmw_cmdbuf_reserve(dev_priv->cman, command_size, id, false,
  3488. header);
  3489. vmw_apply_relocations(sw_context);
  3490. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  3491. vmw_resource_relocations_free(&sw_context->res_relocations);
  3492. vmw_cmdbuf_commit(dev_priv->cman, command_size, header, false);
  3493. return 0;
  3494. }
  3495. /**
  3496. * vmw_execbuf_cmdbuf - Prepare, if possible, a user-space command batch for
  3497. * submission using a command buffer.
  3498. *
  3499. * @dev_priv: Pointer to a device private structure.
  3500. * @user_commands: User-space pointer to the commands to be submitted.
  3501. * @command_size: Size of the unpatched command batch.
  3502. * @header: Out parameter returning the opaque pointer to the command buffer.
  3503. *
  3504. * This function checks whether we can use the command buffer manager for
  3505. * submission and if so, creates a command buffer of suitable size and copies
  3506. * the user data into that buffer.
  3507. *
  3508. * On successful return, the function returns a pointer to the data in the
  3509. * command buffer and *@header is set to non-NULL.
  3510. *
  3511. * @kernel_commands: If command buffers could not be used, the function will
  3512. * return the value of @kernel_commands on function call. That value may be
  3513. * NULL. In that case, the value of *@header will be set to NULL.
  3514. *
  3515. * If an error is encountered, the function will return a pointer error value.
  3516. * If the function is interrupted by a signal while sleeping, it will return
  3517. * -ERESTARTSYS casted to a pointer error value.
  3518. */
  3519. static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv,
  3520. void __user *user_commands,
  3521. void *kernel_commands, u32 command_size,
  3522. struct vmw_cmdbuf_header **header)
  3523. {
  3524. size_t cmdbuf_size;
  3525. int ret;
  3526. *header = NULL;
  3527. if (command_size > SVGA_CB_MAX_SIZE) {
  3528. VMW_DEBUG_USER("Command buffer is too large.\n");
  3529. return ERR_PTR(-EINVAL);
  3530. }
  3531. if (!dev_priv->cman || kernel_commands)
  3532. return kernel_commands;
  3533. /* If possible, add a little space for fencing. */
  3534. cmdbuf_size = command_size + 512;
  3535. cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE);
  3536. kernel_commands = vmw_cmdbuf_alloc(dev_priv->cman, cmdbuf_size, true,
  3537. header);
  3538. if (IS_ERR(kernel_commands))
  3539. return kernel_commands;
  3540. ret = copy_from_user(kernel_commands, user_commands, command_size);
  3541. if (ret) {
  3542. VMW_DEBUG_USER("Failed copying commands.\n");
  3543. vmw_cmdbuf_header_free(*header);
  3544. *header = NULL;
  3545. return ERR_PTR(-EFAULT);
  3546. }
  3547. return kernel_commands;
  3548. }
  3549. static int vmw_execbuf_tie_context(struct vmw_private *dev_priv,
  3550. struct vmw_sw_context *sw_context,
  3551. uint32_t handle)
  3552. {
  3553. struct vmw_resource *res;
  3554. int ret;
  3555. unsigned int size;
  3556. if (handle == SVGA3D_INVALID_ID)
  3557. return 0;
  3558. size = vmw_execbuf_res_size(dev_priv, vmw_res_dx_context);
  3559. ret = vmw_validation_preload_res(sw_context->ctx, size);
  3560. if (ret)
  3561. return ret;
  3562. ret = vmw_user_resource_lookup_handle
  3563. (dev_priv, sw_context->fp->tfile, handle,
  3564. user_context_converter, &res);
  3565. if (ret != 0) {
  3566. VMW_DEBUG_USER("Could not find or user DX context 0x%08x.\n",
  3567. (unsigned int) handle);
  3568. return ret;
  3569. }
  3570. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_SET,
  3571. vmw_val_add_flag_none);
  3572. if (unlikely(ret != 0)) {
  3573. vmw_resource_unreference(&res);
  3574. return ret;
  3575. }
  3576. sw_context->dx_ctx_node = vmw_execbuf_info_from_res(sw_context, res);
  3577. sw_context->man = vmw_context_res_man(res);
  3578. vmw_resource_unreference(&res);
  3579. return 0;
  3580. }
  3581. /*
  3582. * DMA fence callback to remove a seqno_waiter
  3583. */
  3584. struct seqno_waiter_rm_context {
  3585. struct dma_fence_cb base;
  3586. struct vmw_private *dev_priv;
  3587. };
  3588. static void seqno_waiter_rm_cb(struct dma_fence *f, struct dma_fence_cb *cb)
  3589. {
  3590. struct seqno_waiter_rm_context *ctx =
  3591. container_of(cb, struct seqno_waiter_rm_context, base);
  3592. vmw_seqno_waiter_remove(ctx->dev_priv);
  3593. kfree(ctx);
  3594. }
  3595. int vmw_execbuf_process(struct drm_file *file_priv,
  3596. struct vmw_private *dev_priv,
  3597. void __user *user_commands, void *kernel_commands,
  3598. uint32_t command_size, uint64_t throttle_us,
  3599. uint32_t dx_context_handle,
  3600. struct drm_vmw_fence_rep __user *user_fence_rep,
  3601. struct vmw_fence_obj **out_fence, uint32_t flags)
  3602. {
  3603. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  3604. struct vmw_fence_obj *fence = NULL;
  3605. struct vmw_cmdbuf_header *header;
  3606. uint32_t handle = 0;
  3607. int ret;
  3608. int32_t out_fence_fd = -1;
  3609. struct sync_file *sync_file = NULL;
  3610. DECLARE_VAL_CONTEXT(val_ctx, sw_context, 1);
  3611. if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
  3612. out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
  3613. if (out_fence_fd < 0) {
  3614. VMW_DEBUG_USER("Failed to get a fence fd.\n");
  3615. return out_fence_fd;
  3616. }
  3617. }
  3618. if (throttle_us) {
  3619. VMW_DEBUG_USER("Throttling is no longer supported.\n");
  3620. }
  3621. kernel_commands = vmw_execbuf_cmdbuf(dev_priv, user_commands,
  3622. kernel_commands, command_size,
  3623. &header);
  3624. if (IS_ERR(kernel_commands)) {
  3625. ret = PTR_ERR(kernel_commands);
  3626. goto out_free_fence_fd;
  3627. }
  3628. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  3629. if (ret) {
  3630. ret = -ERESTARTSYS;
  3631. goto out_free_header;
  3632. }
  3633. sw_context->kernel = false;
  3634. if (kernel_commands == NULL) {
  3635. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  3636. if (unlikely(ret != 0))
  3637. goto out_unlock;
  3638. ret = copy_from_user(sw_context->cmd_bounce, user_commands,
  3639. command_size);
  3640. if (unlikely(ret != 0)) {
  3641. ret = -EFAULT;
  3642. VMW_DEBUG_USER("Failed copying commands.\n");
  3643. goto out_unlock;
  3644. }
  3645. kernel_commands = sw_context->cmd_bounce;
  3646. } else if (!header) {
  3647. sw_context->kernel = true;
  3648. }
  3649. sw_context->filp = file_priv;
  3650. sw_context->fp = vmw_fpriv(file_priv);
  3651. INIT_LIST_HEAD(&sw_context->ctx_list);
  3652. sw_context->cur_query_bo = dev_priv->pinned_bo;
  3653. sw_context->last_query_ctx = NULL;
  3654. sw_context->needs_post_query_barrier = false;
  3655. sw_context->dx_ctx_node = NULL;
  3656. sw_context->dx_query_mob = NULL;
  3657. sw_context->dx_query_ctx = NULL;
  3658. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  3659. INIT_LIST_HEAD(&sw_context->res_relocations);
  3660. INIT_LIST_HEAD(&sw_context->bo_relocations);
  3661. if (sw_context->staged_bindings)
  3662. vmw_binding_state_reset(sw_context->staged_bindings);
  3663. INIT_LIST_HEAD(&sw_context->staged_cmd_res);
  3664. sw_context->ctx = &val_ctx;
  3665. ret = vmw_execbuf_tie_context(dev_priv, sw_context, dx_context_handle);
  3666. if (unlikely(ret != 0))
  3667. goto out_err_nores;
  3668. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  3669. command_size);
  3670. if (unlikely(ret != 0))
  3671. goto out_err_nores;
  3672. ret = vmw_resources_reserve(sw_context);
  3673. if (unlikely(ret != 0))
  3674. goto out_err_nores;
  3675. ret = vmw_validation_bo_reserve(&val_ctx, true);
  3676. if (unlikely(ret != 0))
  3677. goto out_err_nores;
  3678. ret = vmw_validation_bo_validate(&val_ctx, true);
  3679. if (unlikely(ret != 0))
  3680. goto out_err;
  3681. ret = vmw_validation_res_validate(&val_ctx, true);
  3682. if (unlikely(ret != 0))
  3683. goto out_err;
  3684. vmw_validation_drop_ht(&val_ctx);
  3685. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  3686. if (unlikely(ret != 0)) {
  3687. ret = -ERESTARTSYS;
  3688. goto out_err;
  3689. }
  3690. if (dev_priv->has_mob) {
  3691. ret = vmw_rebind_contexts(sw_context);
  3692. if (unlikely(ret != 0))
  3693. goto out_unlock_binding;
  3694. }
  3695. if (!header) {
  3696. ret = vmw_execbuf_submit_fifo(dev_priv, kernel_commands,
  3697. command_size, sw_context);
  3698. } else {
  3699. ret = vmw_execbuf_submit_cmdbuf(dev_priv, header, command_size,
  3700. sw_context);
  3701. header = NULL;
  3702. }
  3703. mutex_unlock(&dev_priv->binding_mutex);
  3704. if (ret)
  3705. goto out_err;
  3706. vmw_query_bo_switch_commit(dev_priv, sw_context);
  3707. ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
  3708. (user_fence_rep) ? &handle : NULL);
  3709. /*
  3710. * This error is harmless, because if fence submission fails,
  3711. * vmw_fifo_send_fence will sync. The error will be propagated to
  3712. * user-space in @fence_rep
  3713. */
  3714. if (ret != 0)
  3715. VMW_DEBUG_USER("Fence submission error. Syncing.\n");
  3716. vmw_execbuf_bindings_commit(sw_context, false);
  3717. vmw_bind_dx_query_mob(sw_context);
  3718. vmw_validation_res_unreserve(&val_ctx, false);
  3719. vmw_validation_bo_fence(sw_context->ctx, fence);
  3720. if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid))
  3721. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  3722. /*
  3723. * If anything fails here, give up trying to export the fence and do a
  3724. * sync since the user mode will not be able to sync the fence itself.
  3725. * This ensures we are still functionally correct.
  3726. */
  3727. if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
  3728. sync_file = sync_file_create(&fence->base);
  3729. if (!sync_file) {
  3730. VMW_DEBUG_USER("Sync file create failed for fence\n");
  3731. put_unused_fd(out_fence_fd);
  3732. out_fence_fd = -1;
  3733. (void) vmw_fence_obj_wait(fence, false, false,
  3734. VMW_FENCE_WAIT_TIMEOUT);
  3735. }
  3736. }
  3737. ret = vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  3738. user_fence_rep, fence, handle, out_fence_fd);
  3739. if (sync_file) {
  3740. if (ret) {
  3741. /* usercopy of fence failed, put the file object */
  3742. fput(sync_file->file);
  3743. put_unused_fd(out_fence_fd);
  3744. } else {
  3745. /* Link the fence with the FD created earlier */
  3746. fd_install(out_fence_fd, sync_file->file);
  3747. struct seqno_waiter_rm_context *ctx =
  3748. kmalloc(sizeof(*ctx), GFP_KERNEL);
  3749. ctx->dev_priv = dev_priv;
  3750. vmw_seqno_waiter_add(dev_priv);
  3751. if (dma_fence_add_callback(&fence->base, &ctx->base,
  3752. seqno_waiter_rm_cb) < 0) {
  3753. vmw_seqno_waiter_remove(dev_priv);
  3754. kfree(ctx);
  3755. }
  3756. }
  3757. }
  3758. /* Don't unreference when handing fence out */
  3759. if (unlikely(out_fence != NULL)) {
  3760. *out_fence = fence;
  3761. fence = NULL;
  3762. } else if (likely(fence != NULL)) {
  3763. vmw_fence_obj_unreference(&fence);
  3764. }
  3765. vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
  3766. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3767. /*
  3768. * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks
  3769. * in resource destruction paths.
  3770. */
  3771. vmw_validation_unref_lists(&val_ctx);
  3772. return ret;
  3773. out_unlock_binding:
  3774. mutex_unlock(&dev_priv->binding_mutex);
  3775. out_err:
  3776. vmw_validation_bo_backoff(&val_ctx);
  3777. out_err_nores:
  3778. vmw_execbuf_bindings_commit(sw_context, true);
  3779. vmw_validation_res_unreserve(&val_ctx, true);
  3780. vmw_resource_relocations_free(&sw_context->res_relocations);
  3781. vmw_free_relocations(sw_context);
  3782. if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid))
  3783. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  3784. out_unlock:
  3785. vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
  3786. vmw_validation_drop_ht(&val_ctx);
  3787. WARN_ON(!list_empty(&sw_context->ctx_list));
  3788. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3789. /*
  3790. * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks
  3791. * in resource destruction paths.
  3792. */
  3793. vmw_validation_unref_lists(&val_ctx);
  3794. out_free_header:
  3795. if (header)
  3796. vmw_cmdbuf_header_free(header);
  3797. out_free_fence_fd:
  3798. if (out_fence_fd >= 0)
  3799. put_unused_fd(out_fence_fd);
  3800. return ret;
  3801. }
  3802. /**
  3803. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  3804. *
  3805. * @dev_priv: The device private structure.
  3806. *
  3807. * This function is called to idle the fifo and unpin the query buffer if the
  3808. * normal way to do this hits an error, which should typically be extremely
  3809. * rare.
  3810. */
  3811. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  3812. {
  3813. VMW_DEBUG_USER("Can't unpin query buffer. Trying to recover.\n");
  3814. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  3815. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  3816. if (dev_priv->dummy_query_bo_pinned) {
  3817. vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
  3818. dev_priv->dummy_query_bo_pinned = false;
  3819. }
  3820. }
  3821. /**
  3822. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query
  3823. * bo.
  3824. *
  3825. * @dev_priv: The device private structure.
  3826. * @fence: If non-NULL should point to a struct vmw_fence_obj issued _after_ a
  3827. * query barrier that flushes all queries touching the current buffer pointed to
  3828. * by @dev_priv->pinned_bo
  3829. *
  3830. * This function should be used to unpin the pinned query bo, or as a query
  3831. * barrier when we need to make sure that all queries have finished before the
  3832. * next fifo command. (For example on hardware context destructions where the
  3833. * hardware may otherwise leak unfinished queries).
  3834. *
  3835. * This function does not return any failure codes, but make attempts to do safe
  3836. * unpinning in case of errors.
  3837. *
  3838. * The function will synchronize on the previous query barrier, and will thus
  3839. * not finish until that barrier has executed.
  3840. *
  3841. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread before
  3842. * calling this function.
  3843. */
  3844. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  3845. struct vmw_fence_obj *fence)
  3846. {
  3847. int ret = 0;
  3848. struct vmw_fence_obj *lfence = NULL;
  3849. DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
  3850. if (dev_priv->pinned_bo == NULL)
  3851. goto out_unlock;
  3852. vmw_bo_placement_set(dev_priv->pinned_bo,
  3853. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
  3854. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
  3855. ret = vmw_validation_add_bo(&val_ctx, dev_priv->pinned_bo);
  3856. if (ret)
  3857. goto out_no_reserve;
  3858. vmw_bo_placement_set(dev_priv->dummy_query_bo,
  3859. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
  3860. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
  3861. ret = vmw_validation_add_bo(&val_ctx, dev_priv->dummy_query_bo);
  3862. if (ret)
  3863. goto out_no_reserve;
  3864. ret = vmw_validation_bo_reserve(&val_ctx, false);
  3865. if (ret)
  3866. goto out_no_reserve;
  3867. if (dev_priv->query_cid_valid) {
  3868. BUG_ON(fence != NULL);
  3869. ret = vmw_cmd_emit_dummy_query(dev_priv, dev_priv->query_cid);
  3870. if (ret)
  3871. goto out_no_emit;
  3872. dev_priv->query_cid_valid = false;
  3873. }
  3874. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  3875. if (dev_priv->dummy_query_bo_pinned) {
  3876. vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
  3877. dev_priv->dummy_query_bo_pinned = false;
  3878. }
  3879. if (fence == NULL) {
  3880. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  3881. NULL);
  3882. fence = lfence;
  3883. }
  3884. vmw_validation_bo_fence(&val_ctx, fence);
  3885. if (lfence != NULL)
  3886. vmw_fence_obj_unreference(&lfence);
  3887. vmw_validation_unref_lists(&val_ctx);
  3888. vmw_bo_unreference(&dev_priv->pinned_bo);
  3889. out_unlock:
  3890. return;
  3891. out_no_emit:
  3892. vmw_validation_bo_backoff(&val_ctx);
  3893. out_no_reserve:
  3894. vmw_validation_unref_lists(&val_ctx);
  3895. vmw_execbuf_unpin_panic(dev_priv);
  3896. vmw_bo_unreference(&dev_priv->pinned_bo);
  3897. }
  3898. /**
  3899. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query bo.
  3900. *
  3901. * @dev_priv: The device private structure.
  3902. *
  3903. * This function should be used to unpin the pinned query bo, or as a query
  3904. * barrier when we need to make sure that all queries have finished before the
  3905. * next fifo command. (For example on hardware context destructions where the
  3906. * hardware may otherwise leak unfinished queries).
  3907. *
  3908. * This function does not return any failure codes, but make attempts to do safe
  3909. * unpinning in case of errors.
  3910. *
  3911. * The function will synchronize on the previous query barrier, and will thus
  3912. * not finish until that barrier has executed.
  3913. */
  3914. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  3915. {
  3916. mutex_lock(&dev_priv->cmdbuf_mutex);
  3917. if (dev_priv->query_cid_valid)
  3918. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  3919. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3920. }
  3921. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  3922. struct drm_file *file_priv)
  3923. {
  3924. struct vmw_private *dev_priv = vmw_priv(dev);
  3925. struct drm_vmw_execbuf_arg *arg = data;
  3926. int ret;
  3927. struct dma_fence *in_fence = NULL;
  3928. MKS_STAT_TIME_DECL(MKSSTAT_KERN_EXECBUF);
  3929. MKS_STAT_TIME_PUSH(MKSSTAT_KERN_EXECBUF);
  3930. /*
  3931. * Extend the ioctl argument while maintaining backwards compatibility:
  3932. * We take different code paths depending on the value of arg->version.
  3933. *
  3934. * Note: The ioctl argument is extended and zeropadded by core DRM.
  3935. */
  3936. if (unlikely(arg->version > DRM_VMW_EXECBUF_VERSION ||
  3937. arg->version == 0)) {
  3938. VMW_DEBUG_USER("Incorrect execbuf version.\n");
  3939. ret = -EINVAL;
  3940. goto mksstats_out;
  3941. }
  3942. switch (arg->version) {
  3943. case 1:
  3944. /* For v1 core DRM have extended + zeropadded the data */
  3945. arg->context_handle = (uint32_t) -1;
  3946. break;
  3947. case 2:
  3948. default:
  3949. /* For v2 and later core DRM would have correctly copied it */
  3950. break;
  3951. }
  3952. /* If imported a fence FD from elsewhere, then wait on it */
  3953. if (arg->flags & DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD) {
  3954. in_fence = sync_file_get_fence(arg->imported_fence_fd);
  3955. if (!in_fence) {
  3956. VMW_DEBUG_USER("Cannot get imported fence\n");
  3957. ret = -EINVAL;
  3958. goto mksstats_out;
  3959. }
  3960. ret = dma_fence_wait(in_fence, true);
  3961. if (ret)
  3962. goto out;
  3963. }
  3964. ret = vmw_execbuf_process(file_priv, dev_priv,
  3965. (void __user *)(unsigned long)arg->commands,
  3966. NULL, arg->command_size, arg->throttle_us,
  3967. arg->context_handle,
  3968. (void __user *)(unsigned long)arg->fence_rep,
  3969. NULL, arg->flags);
  3970. if (unlikely(ret != 0))
  3971. goto out;
  3972. vmw_kms_cursor_post_execbuf(dev_priv);
  3973. out:
  3974. if (in_fence)
  3975. dma_fence_put(in_fence);
  3976. mksstats_out:
  3977. MKS_STAT_TIME_POP(MKSSTAT_KERN_EXECBUF);
  3978. return ret;
  3979. }