hid-cp2112.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * hid-cp2112.c - Silicon Labs HID USB to SMBus master bridge
  4. * Copyright (c) 2013,2014 Uplogix, Inc.
  5. * David Barksdale <dbarksdale@uplogix.com>
  6. */
  7. /*
  8. * The Silicon Labs CP2112 chip is a USB HID device which provides an
  9. * SMBus controller for talking to slave devices and 8 GPIO pins. The
  10. * host communicates with the CP2112 via raw HID reports.
  11. *
  12. * Data Sheet:
  13. * https://www.silabs.com/Support%20Documents/TechnicalDocs/CP2112.pdf
  14. * Programming Interface Specification:
  15. * https://www.silabs.com/documents/public/application-notes/an495-cp2112-interface-specification.pdf
  16. */
  17. #include <linux/bitops.h>
  18. #include <linux/gpio/driver.h>
  19. #include <linux/hid.h>
  20. #include <linux/hidraw.h>
  21. #include <linux/i2c.h>
  22. #include <linux/module.h>
  23. #include <linux/nls.h>
  24. #include <linux/string_choices.h>
  25. #include <linux/usb/ch9.h>
  26. #include "hid-ids.h"
  27. #define CP2112_REPORT_MAX_LENGTH 64
  28. #define CP2112_GPIO_CONFIG_LENGTH 5
  29. #define CP2112_GPIO_GET_LENGTH 2
  30. #define CP2112_GPIO_SET_LENGTH 3
  31. #define CP2112_GPIO_MAX_GPIO 8
  32. #define CP2112_GPIO_ALL_GPIO_MASK GENMASK(7, 0)
  33. enum {
  34. CP2112_GPIO_CONFIG = 0x02,
  35. CP2112_GPIO_GET = 0x03,
  36. CP2112_GPIO_SET = 0x04,
  37. CP2112_GET_VERSION_INFO = 0x05,
  38. CP2112_SMBUS_CONFIG = 0x06,
  39. CP2112_DATA_READ_REQUEST = 0x10,
  40. CP2112_DATA_WRITE_READ_REQUEST = 0x11,
  41. CP2112_DATA_READ_FORCE_SEND = 0x12,
  42. CP2112_DATA_READ_RESPONSE = 0x13,
  43. CP2112_DATA_WRITE_REQUEST = 0x14,
  44. CP2112_TRANSFER_STATUS_REQUEST = 0x15,
  45. CP2112_TRANSFER_STATUS_RESPONSE = 0x16,
  46. CP2112_CANCEL_TRANSFER = 0x17,
  47. CP2112_LOCK_BYTE = 0x20,
  48. CP2112_USB_CONFIG = 0x21,
  49. CP2112_MANUFACTURER_STRING = 0x22,
  50. CP2112_PRODUCT_STRING = 0x23,
  51. CP2112_SERIAL_STRING = 0x24,
  52. };
  53. enum {
  54. STATUS0_IDLE = 0x00,
  55. STATUS0_BUSY = 0x01,
  56. STATUS0_COMPLETE = 0x02,
  57. STATUS0_ERROR = 0x03,
  58. };
  59. enum {
  60. STATUS1_TIMEOUT_NACK = 0x00,
  61. STATUS1_TIMEOUT_BUS = 0x01,
  62. STATUS1_ARBITRATION_LOST = 0x02,
  63. STATUS1_READ_INCOMPLETE = 0x03,
  64. STATUS1_WRITE_INCOMPLETE = 0x04,
  65. STATUS1_SUCCESS = 0x05,
  66. };
  67. struct cp2112_smbus_config_report {
  68. u8 report; /* CP2112_SMBUS_CONFIG */
  69. __be32 clock_speed; /* Hz */
  70. u8 device_address; /* Stored in the upper 7 bits */
  71. u8 auto_send_read; /* 1 = enabled, 0 = disabled */
  72. __be16 write_timeout; /* ms, 0 = no timeout */
  73. __be16 read_timeout; /* ms, 0 = no timeout */
  74. u8 scl_low_timeout; /* 1 = enabled, 0 = disabled */
  75. __be16 retry_time; /* # of retries, 0 = no limit */
  76. } __packed;
  77. struct cp2112_usb_config_report {
  78. u8 report; /* CP2112_USB_CONFIG */
  79. __le16 vid; /* Vendor ID */
  80. __le16 pid; /* Product ID */
  81. u8 max_power; /* Power requested in 2mA units */
  82. u8 power_mode; /* 0x00 = bus powered
  83. 0x01 = self powered & regulator off
  84. 0x02 = self powered & regulator on */
  85. u8 release_major;
  86. u8 release_minor;
  87. u8 mask; /* What fields to program */
  88. } __packed;
  89. struct cp2112_read_req_report {
  90. u8 report; /* CP2112_DATA_READ_REQUEST */
  91. u8 slave_address;
  92. __be16 length;
  93. } __packed;
  94. struct cp2112_write_read_req_report {
  95. u8 report; /* CP2112_DATA_WRITE_READ_REQUEST */
  96. u8 slave_address;
  97. __be16 length;
  98. u8 target_address_length;
  99. u8 target_address[16];
  100. } __packed;
  101. struct cp2112_write_req_report {
  102. u8 report; /* CP2112_DATA_WRITE_REQUEST */
  103. u8 slave_address;
  104. u8 length;
  105. u8 data[61];
  106. } __packed;
  107. struct cp2112_force_read_report {
  108. u8 report; /* CP2112_DATA_READ_FORCE_SEND */
  109. __be16 length;
  110. } __packed;
  111. struct cp2112_xfer_status_report {
  112. u8 report; /* CP2112_TRANSFER_STATUS_RESPONSE */
  113. u8 status0; /* STATUS0_* */
  114. u8 status1; /* STATUS1_* */
  115. __be16 retries;
  116. __be16 length;
  117. } __packed;
  118. struct cp2112_string_report {
  119. u8 dummy; /* force .string to be aligned */
  120. struct_group_attr(contents, __packed,
  121. u8 report; /* CP2112_*_STRING */
  122. u8 length; /* length in bytes of everything after .report */
  123. u8 type; /* USB_DT_STRING */
  124. wchar_t string[30]; /* UTF16_LITTLE_ENDIAN string */
  125. );
  126. } __packed;
  127. /* Number of times to request transfer status before giving up waiting for a
  128. transfer to complete. This may need to be changed if SMBUS clock, retries,
  129. or read/write/scl_low timeout settings are changed. */
  130. static const int XFER_STATUS_RETRIES = 10;
  131. /* Time in ms to wait for a CP2112_DATA_READ_RESPONSE or
  132. CP2112_TRANSFER_STATUS_RESPONSE. */
  133. static const int RESPONSE_TIMEOUT = 50;
  134. static const struct hid_device_id cp2112_devices[] = {
  135. { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) },
  136. { }
  137. };
  138. MODULE_DEVICE_TABLE(hid, cp2112_devices);
  139. struct cp2112_device {
  140. struct i2c_adapter adap;
  141. struct hid_device *hdev;
  142. wait_queue_head_t wait;
  143. u8 read_data[61];
  144. u8 read_length;
  145. u8 hwversion;
  146. int xfer_status;
  147. atomic_t read_avail;
  148. atomic_t xfer_avail;
  149. struct gpio_chip gc;
  150. u8 *in_out_buffer;
  151. struct mutex lock;
  152. bool gpio_poll;
  153. struct delayed_work gpio_poll_worker;
  154. unsigned long irq_mask;
  155. u8 gpio_prev_state;
  156. };
  157. static int gpio_push_pull = CP2112_GPIO_ALL_GPIO_MASK;
  158. module_param(gpio_push_pull, int, 0644);
  159. MODULE_PARM_DESC(gpio_push_pull, "GPIO push-pull configuration bitmask");
  160. static int cp2112_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  161. {
  162. struct cp2112_device *dev = gpiochip_get_data(chip);
  163. struct hid_device *hdev = dev->hdev;
  164. u8 *buf = dev->in_out_buffer;
  165. int ret;
  166. mutex_lock(&dev->lock);
  167. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  168. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  169. HID_REQ_GET_REPORT);
  170. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  171. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  172. if (ret >= 0)
  173. ret = -EIO;
  174. goto exit;
  175. }
  176. buf[1] &= ~BIT(offset);
  177. buf[2] = gpio_push_pull;
  178. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  179. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  180. HID_REQ_SET_REPORT);
  181. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  182. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  183. if (ret >= 0)
  184. ret = -EIO;
  185. goto exit;
  186. }
  187. ret = 0;
  188. exit:
  189. mutex_unlock(&dev->lock);
  190. return ret;
  191. }
  192. static void cp2112_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  193. {
  194. struct cp2112_device *dev = gpiochip_get_data(chip);
  195. struct hid_device *hdev = dev->hdev;
  196. u8 *buf = dev->in_out_buffer;
  197. int ret;
  198. mutex_lock(&dev->lock);
  199. buf[0] = CP2112_GPIO_SET;
  200. buf[1] = value ? CP2112_GPIO_ALL_GPIO_MASK : 0;
  201. buf[2] = BIT(offset);
  202. ret = hid_hw_raw_request(hdev, CP2112_GPIO_SET, buf,
  203. CP2112_GPIO_SET_LENGTH, HID_FEATURE_REPORT,
  204. HID_REQ_SET_REPORT);
  205. if (ret < 0)
  206. hid_err(hdev, "error setting GPIO values: %d\n", ret);
  207. mutex_unlock(&dev->lock);
  208. }
  209. static int cp2112_gpio_get_all(struct gpio_chip *chip)
  210. {
  211. struct cp2112_device *dev = gpiochip_get_data(chip);
  212. struct hid_device *hdev = dev->hdev;
  213. u8 *buf = dev->in_out_buffer;
  214. int ret;
  215. mutex_lock(&dev->lock);
  216. ret = hid_hw_raw_request(hdev, CP2112_GPIO_GET, buf,
  217. CP2112_GPIO_GET_LENGTH, HID_FEATURE_REPORT,
  218. HID_REQ_GET_REPORT);
  219. if (ret != CP2112_GPIO_GET_LENGTH) {
  220. hid_err(hdev, "error requesting GPIO values: %d\n", ret);
  221. ret = ret < 0 ? ret : -EIO;
  222. goto exit;
  223. }
  224. ret = buf[1];
  225. exit:
  226. mutex_unlock(&dev->lock);
  227. return ret;
  228. }
  229. static int cp2112_gpio_get(struct gpio_chip *chip, unsigned int offset)
  230. {
  231. int ret;
  232. ret = cp2112_gpio_get_all(chip);
  233. if (ret < 0)
  234. return ret;
  235. return (ret >> offset) & 1;
  236. }
  237. static int cp2112_gpio_direction_output(struct gpio_chip *chip,
  238. unsigned offset, int value)
  239. {
  240. struct cp2112_device *dev = gpiochip_get_data(chip);
  241. struct hid_device *hdev = dev->hdev;
  242. u8 *buf = dev->in_out_buffer;
  243. int ret;
  244. mutex_lock(&dev->lock);
  245. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  246. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  247. HID_REQ_GET_REPORT);
  248. if (ret != CP2112_GPIO_CONFIG_LENGTH) {
  249. hid_err(hdev, "error requesting GPIO config: %d\n", ret);
  250. goto fail;
  251. }
  252. buf[1] |= 1 << offset;
  253. buf[2] = gpio_push_pull;
  254. ret = hid_hw_raw_request(hdev, CP2112_GPIO_CONFIG, buf,
  255. CP2112_GPIO_CONFIG_LENGTH, HID_FEATURE_REPORT,
  256. HID_REQ_SET_REPORT);
  257. if (ret < 0) {
  258. hid_err(hdev, "error setting GPIO config: %d\n", ret);
  259. goto fail;
  260. }
  261. mutex_unlock(&dev->lock);
  262. /*
  263. * Set gpio value when output direction is already set,
  264. * as specified in AN495, Rev. 0.2, cpt. 4.4
  265. */
  266. cp2112_gpio_set(chip, offset, value);
  267. return 0;
  268. fail:
  269. mutex_unlock(&dev->lock);
  270. return ret < 0 ? ret : -EIO;
  271. }
  272. static int cp2112_hid_get(struct hid_device *hdev, unsigned char report_number,
  273. u8 *data, size_t count, unsigned char report_type)
  274. {
  275. u8 *buf;
  276. int ret;
  277. buf = kmalloc(count, GFP_KERNEL);
  278. if (!buf)
  279. return -ENOMEM;
  280. ret = hid_hw_raw_request(hdev, report_number, buf, count,
  281. report_type, HID_REQ_GET_REPORT);
  282. memcpy(data, buf, count);
  283. kfree(buf);
  284. return ret;
  285. }
  286. static int cp2112_hid_output(struct hid_device *hdev, u8 *data, size_t count,
  287. unsigned char report_type)
  288. {
  289. u8 *buf;
  290. int ret;
  291. buf = kmemdup(data, count, GFP_KERNEL);
  292. if (!buf)
  293. return -ENOMEM;
  294. if (report_type == HID_OUTPUT_REPORT)
  295. ret = hid_hw_output_report(hdev, buf, count);
  296. else
  297. ret = hid_hw_raw_request(hdev, buf[0], buf, count, report_type,
  298. HID_REQ_SET_REPORT);
  299. kfree(buf);
  300. return ret;
  301. }
  302. static int cp2112_wait(struct cp2112_device *dev, atomic_t *avail)
  303. {
  304. int ret = 0;
  305. /* We have sent either a CP2112_TRANSFER_STATUS_REQUEST or a
  306. * CP2112_DATA_READ_FORCE_SEND and we are waiting for the response to
  307. * come in cp2112_raw_event or timeout. There will only be one of these
  308. * in flight at any one time. The timeout is extremely large and is a
  309. * last resort if the CP2112 has died. If we do timeout we don't expect
  310. * to receive the response which would cause data races, it's not like
  311. * we can do anything about it anyway.
  312. */
  313. ret = wait_event_interruptible_timeout(dev->wait,
  314. atomic_read(avail), msecs_to_jiffies(RESPONSE_TIMEOUT));
  315. if (-ERESTARTSYS == ret)
  316. return ret;
  317. if (!ret)
  318. return -ETIMEDOUT;
  319. atomic_set(avail, 0);
  320. return 0;
  321. }
  322. static int cp2112_xfer_status(struct cp2112_device *dev)
  323. {
  324. struct hid_device *hdev = dev->hdev;
  325. u8 buf[2];
  326. int ret;
  327. buf[0] = CP2112_TRANSFER_STATUS_REQUEST;
  328. buf[1] = 0x01;
  329. atomic_set(&dev->xfer_avail, 0);
  330. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  331. if (ret < 0) {
  332. hid_warn(hdev, "Error requesting status: %d\n", ret);
  333. return ret;
  334. }
  335. ret = cp2112_wait(dev, &dev->xfer_avail);
  336. if (ret)
  337. return ret;
  338. return dev->xfer_status;
  339. }
  340. static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size)
  341. {
  342. struct hid_device *hdev = dev->hdev;
  343. struct cp2112_force_read_report report;
  344. int ret;
  345. if (size > sizeof(dev->read_data))
  346. size = sizeof(dev->read_data);
  347. report.report = CP2112_DATA_READ_FORCE_SEND;
  348. report.length = cpu_to_be16(size);
  349. atomic_set(&dev->read_avail, 0);
  350. ret = cp2112_hid_output(hdev, &report.report, sizeof(report),
  351. HID_OUTPUT_REPORT);
  352. if (ret < 0) {
  353. hid_warn(hdev, "Error requesting data: %d\n", ret);
  354. return ret;
  355. }
  356. ret = cp2112_wait(dev, &dev->read_avail);
  357. if (ret)
  358. return ret;
  359. hid_dbg(hdev, "read %d of %zd bytes requested\n",
  360. dev->read_length, size);
  361. if (size > dev->read_length)
  362. size = dev->read_length;
  363. memcpy(data, dev->read_data, size);
  364. return dev->read_length;
  365. }
  366. static int cp2112_read_req(void *buf, u8 slave_address, u16 length)
  367. {
  368. struct cp2112_read_req_report *report = buf;
  369. if (length < 1 || length > 512)
  370. return -EINVAL;
  371. report->report = CP2112_DATA_READ_REQUEST;
  372. report->slave_address = slave_address << 1;
  373. report->length = cpu_to_be16(length);
  374. return sizeof(*report);
  375. }
  376. static int cp2112_write_read_req(void *buf, u8 slave_address, u16 length,
  377. u8 command, u8 *data, u8 data_length)
  378. {
  379. struct cp2112_write_read_req_report *report = buf;
  380. if (length < 1 || length > 512
  381. || data_length > sizeof(report->target_address) - 1)
  382. return -EINVAL;
  383. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  384. report->slave_address = slave_address << 1;
  385. report->length = cpu_to_be16(length);
  386. report->target_address_length = data_length + 1;
  387. report->target_address[0] = command;
  388. memcpy(&report->target_address[1], data, data_length);
  389. return data_length + 6;
  390. }
  391. static int cp2112_write_req(void *buf, u8 slave_address, u8 command, u8 *data,
  392. u8 data_length)
  393. {
  394. struct cp2112_write_req_report *report = buf;
  395. if (data_length > sizeof(report->data) - 1)
  396. return -EINVAL;
  397. report->report = CP2112_DATA_WRITE_REQUEST;
  398. report->slave_address = slave_address << 1;
  399. report->length = data_length + 1;
  400. report->data[0] = command;
  401. memcpy(&report->data[1], data, data_length);
  402. return data_length + 4;
  403. }
  404. static int cp2112_i2c_write_req(void *buf, u8 slave_address, u8 *data,
  405. u8 data_length)
  406. {
  407. struct cp2112_write_req_report *report = buf;
  408. if (data_length > sizeof(report->data))
  409. return -EINVAL;
  410. report->report = CP2112_DATA_WRITE_REQUEST;
  411. report->slave_address = slave_address << 1;
  412. report->length = data_length;
  413. memcpy(report->data, data, data_length);
  414. return data_length + 3;
  415. }
  416. static int cp2112_i2c_write_read_req(void *buf, u8 slave_address,
  417. u8 *addr, int addr_length,
  418. int read_length)
  419. {
  420. struct cp2112_write_read_req_report *report = buf;
  421. if (read_length < 1 || read_length > 512 ||
  422. addr_length > sizeof(report->target_address))
  423. return -EINVAL;
  424. report->report = CP2112_DATA_WRITE_READ_REQUEST;
  425. report->slave_address = slave_address << 1;
  426. report->length = cpu_to_be16(read_length);
  427. report->target_address_length = addr_length;
  428. memcpy(report->target_address, addr, addr_length);
  429. return addr_length + 5;
  430. }
  431. static int cp2112_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
  432. int num)
  433. {
  434. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  435. struct hid_device *hdev = dev->hdev;
  436. u8 buf[64];
  437. ssize_t count;
  438. ssize_t read_length = 0;
  439. u8 *read_buf = NULL;
  440. unsigned int retries;
  441. int ret;
  442. hid_dbg(hdev, "I2C %d messages\n", num);
  443. if (num == 1) {
  444. hid_dbg(hdev, "I2C %s %#04x len %d\n",
  445. str_read_write(msgs->flags & I2C_M_RD), msgs->addr, msgs->len);
  446. if (msgs->flags & I2C_M_RD) {
  447. read_length = msgs->len;
  448. read_buf = msgs->buf;
  449. count = cp2112_read_req(buf, msgs->addr, msgs->len);
  450. } else {
  451. count = cp2112_i2c_write_req(buf, msgs->addr,
  452. msgs->buf, msgs->len);
  453. }
  454. if (count < 0)
  455. return count;
  456. } else if (dev->hwversion > 1 && /* no repeated start in rev 1 */
  457. num == 2 &&
  458. msgs[0].addr == msgs[1].addr &&
  459. !(msgs[0].flags & I2C_M_RD) && (msgs[1].flags & I2C_M_RD)) {
  460. hid_dbg(hdev, "I2C write-read %#04x wlen %d rlen %d\n",
  461. msgs[0].addr, msgs[0].len, msgs[1].len);
  462. read_length = msgs[1].len;
  463. read_buf = msgs[1].buf;
  464. count = cp2112_i2c_write_read_req(buf, msgs[0].addr,
  465. msgs[0].buf, msgs[0].len, msgs[1].len);
  466. if (count < 0)
  467. return count;
  468. } else {
  469. hid_err(hdev,
  470. "Multi-message I2C transactions not supported\n");
  471. return -EOPNOTSUPP;
  472. }
  473. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  474. if (ret < 0) {
  475. hid_err(hdev, "power management error: %d\n", ret);
  476. return ret;
  477. }
  478. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  479. if (ret < 0) {
  480. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  481. goto power_normal;
  482. }
  483. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  484. ret = cp2112_xfer_status(dev);
  485. if (-EBUSY == ret)
  486. continue;
  487. if (ret < 0)
  488. goto power_normal;
  489. break;
  490. }
  491. if (XFER_STATUS_RETRIES <= retries) {
  492. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  493. buf[0] = CP2112_CANCEL_TRANSFER;
  494. buf[1] = 0x01;
  495. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  496. if (ret < 0)
  497. hid_warn(hdev, "Error cancelling transaction: %d\n",
  498. ret);
  499. ret = -ETIMEDOUT;
  500. goto power_normal;
  501. }
  502. for (count = 0; count < read_length;) {
  503. ret = cp2112_read(dev, read_buf + count, read_length - count);
  504. if (ret < 0)
  505. goto power_normal;
  506. if (ret == 0) {
  507. hid_err(hdev, "read returned 0\n");
  508. ret = -EIO;
  509. goto power_normal;
  510. }
  511. count += ret;
  512. if (count > read_length) {
  513. /*
  514. * The hardware returned too much data.
  515. * This is mostly harmless because cp2112_read()
  516. * has a limit check so didn't overrun our
  517. * buffer. Nevertheless, we return an error
  518. * because something is seriously wrong and
  519. * it shouldn't go unnoticed.
  520. */
  521. hid_err(hdev, "long read: %d > %zd\n",
  522. ret, read_length - count + ret);
  523. ret = -EIO;
  524. goto power_normal;
  525. }
  526. }
  527. /* return the number of transferred messages */
  528. ret = num;
  529. power_normal:
  530. hid_hw_power(hdev, PM_HINT_NORMAL);
  531. hid_dbg(hdev, "I2C transfer finished: %d\n", ret);
  532. return ret;
  533. }
  534. static int cp2112_xfer(struct i2c_adapter *adap, u16 addr,
  535. unsigned short flags, char read_write, u8 command,
  536. int size, union i2c_smbus_data *data)
  537. {
  538. struct cp2112_device *dev = (struct cp2112_device *)adap->algo_data;
  539. struct hid_device *hdev = dev->hdev;
  540. u8 buf[64];
  541. __le16 word;
  542. ssize_t count;
  543. size_t read_length = 0;
  544. unsigned int retries;
  545. int ret;
  546. hid_dbg(hdev, "%s addr 0x%x flags 0x%x cmd 0x%x size %d\n",
  547. str_write_read(read_write == I2C_SMBUS_WRITE),
  548. addr, flags, command, size);
  549. switch (size) {
  550. case I2C_SMBUS_BYTE:
  551. read_length = 1;
  552. if (I2C_SMBUS_READ == read_write)
  553. count = cp2112_read_req(buf, addr, read_length);
  554. else
  555. count = cp2112_write_req(buf, addr, command, NULL,
  556. 0);
  557. break;
  558. case I2C_SMBUS_BYTE_DATA:
  559. read_length = 1;
  560. if (I2C_SMBUS_READ == read_write)
  561. count = cp2112_write_read_req(buf, addr, read_length,
  562. command, NULL, 0);
  563. else
  564. count = cp2112_write_req(buf, addr, command,
  565. &data->byte, 1);
  566. break;
  567. case I2C_SMBUS_WORD_DATA:
  568. read_length = 2;
  569. word = cpu_to_le16(data->word);
  570. if (I2C_SMBUS_READ == read_write)
  571. count = cp2112_write_read_req(buf, addr, read_length,
  572. command, NULL, 0);
  573. else
  574. count = cp2112_write_req(buf, addr, command,
  575. (u8 *)&word, 2);
  576. break;
  577. case I2C_SMBUS_PROC_CALL:
  578. size = I2C_SMBUS_WORD_DATA;
  579. read_write = I2C_SMBUS_READ;
  580. read_length = 2;
  581. word = cpu_to_le16(data->word);
  582. count = cp2112_write_read_req(buf, addr, read_length, command,
  583. (u8 *)&word, 2);
  584. break;
  585. case I2C_SMBUS_I2C_BLOCK_DATA:
  586. if (read_write == I2C_SMBUS_READ) {
  587. read_length = data->block[0];
  588. count = cp2112_write_read_req(buf, addr, read_length,
  589. command, NULL, 0);
  590. } else {
  591. count = cp2112_write_req(buf, addr, command,
  592. data->block + 1,
  593. data->block[0]);
  594. }
  595. break;
  596. case I2C_SMBUS_BLOCK_DATA:
  597. if (I2C_SMBUS_READ == read_write) {
  598. count = cp2112_write_read_req(buf, addr,
  599. I2C_SMBUS_BLOCK_MAX,
  600. command, NULL, 0);
  601. } else {
  602. count = cp2112_write_req(buf, addr, command,
  603. data->block,
  604. data->block[0] + 1);
  605. }
  606. break;
  607. case I2C_SMBUS_BLOCK_PROC_CALL:
  608. size = I2C_SMBUS_BLOCK_DATA;
  609. read_write = I2C_SMBUS_READ;
  610. count = cp2112_write_read_req(buf, addr, I2C_SMBUS_BLOCK_MAX,
  611. command, data->block,
  612. data->block[0] + 1);
  613. break;
  614. default:
  615. hid_warn(hdev, "Unsupported transaction %d\n", size);
  616. return -EOPNOTSUPP;
  617. }
  618. if (count < 0)
  619. return count;
  620. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  621. if (ret < 0) {
  622. hid_err(hdev, "power management error: %d\n", ret);
  623. return ret;
  624. }
  625. ret = cp2112_hid_output(hdev, buf, count, HID_OUTPUT_REPORT);
  626. if (ret < 0) {
  627. hid_warn(hdev, "Error starting transaction: %d\n", ret);
  628. goto power_normal;
  629. }
  630. for (retries = 0; retries < XFER_STATUS_RETRIES; ++retries) {
  631. ret = cp2112_xfer_status(dev);
  632. if (-EBUSY == ret)
  633. continue;
  634. if (ret < 0)
  635. goto power_normal;
  636. break;
  637. }
  638. if (XFER_STATUS_RETRIES <= retries) {
  639. hid_warn(hdev, "Transfer timed out, cancelling.\n");
  640. buf[0] = CP2112_CANCEL_TRANSFER;
  641. buf[1] = 0x01;
  642. ret = cp2112_hid_output(hdev, buf, 2, HID_OUTPUT_REPORT);
  643. if (ret < 0)
  644. hid_warn(hdev, "Error cancelling transaction: %d\n",
  645. ret);
  646. ret = -ETIMEDOUT;
  647. goto power_normal;
  648. }
  649. if (I2C_SMBUS_WRITE == read_write) {
  650. ret = 0;
  651. goto power_normal;
  652. }
  653. if (I2C_SMBUS_BLOCK_DATA == size)
  654. read_length = ret;
  655. ret = cp2112_read(dev, buf, read_length);
  656. if (ret < 0)
  657. goto power_normal;
  658. if (ret != read_length) {
  659. hid_warn(hdev, "short read: %d < %zd\n", ret, read_length);
  660. ret = -EIO;
  661. goto power_normal;
  662. }
  663. switch (size) {
  664. case I2C_SMBUS_BYTE:
  665. case I2C_SMBUS_BYTE_DATA:
  666. data->byte = buf[0];
  667. break;
  668. case I2C_SMBUS_WORD_DATA:
  669. data->word = le16_to_cpup((__le16 *)buf);
  670. break;
  671. case I2C_SMBUS_I2C_BLOCK_DATA:
  672. if (read_length > I2C_SMBUS_BLOCK_MAX) {
  673. ret = -EINVAL;
  674. goto power_normal;
  675. }
  676. memcpy(data->block + 1, buf, read_length);
  677. break;
  678. case I2C_SMBUS_BLOCK_DATA:
  679. if (read_length > I2C_SMBUS_BLOCK_MAX) {
  680. ret = -EPROTO;
  681. goto power_normal;
  682. }
  683. memcpy(data->block, buf, read_length);
  684. break;
  685. }
  686. ret = 0;
  687. power_normal:
  688. hid_hw_power(hdev, PM_HINT_NORMAL);
  689. hid_dbg(hdev, "transfer finished: %d\n", ret);
  690. return ret;
  691. }
  692. static u32 cp2112_functionality(struct i2c_adapter *adap)
  693. {
  694. return I2C_FUNC_I2C |
  695. I2C_FUNC_SMBUS_BYTE |
  696. I2C_FUNC_SMBUS_BYTE_DATA |
  697. I2C_FUNC_SMBUS_WORD_DATA |
  698. I2C_FUNC_SMBUS_BLOCK_DATA |
  699. I2C_FUNC_SMBUS_I2C_BLOCK |
  700. I2C_FUNC_SMBUS_PROC_CALL |
  701. I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
  702. }
  703. static const struct i2c_algorithm smbus_algorithm = {
  704. .master_xfer = cp2112_i2c_xfer,
  705. .smbus_xfer = cp2112_xfer,
  706. .functionality = cp2112_functionality,
  707. };
  708. static int cp2112_get_usb_config(struct hid_device *hdev,
  709. struct cp2112_usb_config_report *cfg)
  710. {
  711. int ret;
  712. ret = cp2112_hid_get(hdev, CP2112_USB_CONFIG, (u8 *)cfg, sizeof(*cfg),
  713. HID_FEATURE_REPORT);
  714. if (ret != sizeof(*cfg)) {
  715. hid_err(hdev, "error reading usb config: %d\n", ret);
  716. if (ret < 0)
  717. return ret;
  718. return -EIO;
  719. }
  720. return 0;
  721. }
  722. static int cp2112_set_usb_config(struct hid_device *hdev,
  723. struct cp2112_usb_config_report *cfg)
  724. {
  725. int ret;
  726. BUG_ON(cfg->report != CP2112_USB_CONFIG);
  727. ret = cp2112_hid_output(hdev, (u8 *)cfg, sizeof(*cfg),
  728. HID_FEATURE_REPORT);
  729. if (ret != sizeof(*cfg)) {
  730. hid_err(hdev, "error writing usb config: %d\n", ret);
  731. if (ret < 0)
  732. return ret;
  733. return -EIO;
  734. }
  735. return 0;
  736. }
  737. static void chmod_sysfs_attrs(struct hid_device *hdev);
  738. #define CP2112_CONFIG_ATTR(name, store, format, ...) \
  739. static ssize_t name##_store(struct device *kdev, \
  740. struct device_attribute *attr, const char *buf, \
  741. size_t count) \
  742. { \
  743. struct hid_device *hdev = to_hid_device(kdev); \
  744. struct cp2112_usb_config_report cfg; \
  745. int ret = cp2112_get_usb_config(hdev, &cfg); \
  746. if (ret) \
  747. return ret; \
  748. store; \
  749. ret = cp2112_set_usb_config(hdev, &cfg); \
  750. if (ret) \
  751. return ret; \
  752. chmod_sysfs_attrs(hdev); \
  753. return count; \
  754. } \
  755. static ssize_t name##_show(struct device *kdev, \
  756. struct device_attribute *attr, char *buf) \
  757. { \
  758. struct hid_device *hdev = to_hid_device(kdev); \
  759. struct cp2112_usb_config_report cfg; \
  760. int ret = cp2112_get_usb_config(hdev, &cfg); \
  761. if (ret) \
  762. return ret; \
  763. return sysfs_emit(buf, format, ##__VA_ARGS__); \
  764. } \
  765. static DEVICE_ATTR_RW(name);
  766. CP2112_CONFIG_ATTR(vendor_id, ({
  767. u16 vid;
  768. if (sscanf(buf, "%hi", &vid) != 1)
  769. return -EINVAL;
  770. cfg.vid = cpu_to_le16(vid);
  771. cfg.mask = 0x01;
  772. }), "0x%04x\n", le16_to_cpu(cfg.vid));
  773. CP2112_CONFIG_ATTR(product_id, ({
  774. u16 pid;
  775. if (sscanf(buf, "%hi", &pid) != 1)
  776. return -EINVAL;
  777. cfg.pid = cpu_to_le16(pid);
  778. cfg.mask = 0x02;
  779. }), "0x%04x\n", le16_to_cpu(cfg.pid));
  780. CP2112_CONFIG_ATTR(max_power, ({
  781. int mA;
  782. if (sscanf(buf, "%i", &mA) != 1)
  783. return -EINVAL;
  784. cfg.max_power = (mA + 1) / 2;
  785. cfg.mask = 0x04;
  786. }), "%u mA\n", cfg.max_power * 2);
  787. CP2112_CONFIG_ATTR(power_mode, ({
  788. if (sscanf(buf, "%hhi", &cfg.power_mode) != 1)
  789. return -EINVAL;
  790. cfg.mask = 0x08;
  791. }), "%u\n", cfg.power_mode);
  792. CP2112_CONFIG_ATTR(release_version, ({
  793. if (sscanf(buf, "%hhi.%hhi", &cfg.release_major, &cfg.release_minor)
  794. != 2)
  795. return -EINVAL;
  796. cfg.mask = 0x10;
  797. }), "%u.%u\n", cfg.release_major, cfg.release_minor);
  798. #undef CP2112_CONFIG_ATTR
  799. static ssize_t pstr_store(struct device *kdev, struct device_attribute *kattr,
  800. const char *buf, size_t count, int number)
  801. {
  802. struct hid_device *hdev = to_hid_device(kdev);
  803. struct cp2112_string_report report;
  804. int ret;
  805. memset(&report, 0, sizeof(report));
  806. ret = utf8s_to_utf16s(buf, count, UTF16_LITTLE_ENDIAN,
  807. report.string, ARRAY_SIZE(report.string));
  808. report.report = number;
  809. report.length = ret * sizeof(report.string[0]) + 2;
  810. report.type = USB_DT_STRING;
  811. ret = cp2112_hid_output(hdev, &report.report, report.length + 1,
  812. HID_FEATURE_REPORT);
  813. if (ret != report.length + 1) {
  814. hid_err(hdev, "error writing %s string: %d\n", kattr->attr.name,
  815. ret);
  816. if (ret < 0)
  817. return ret;
  818. return -EIO;
  819. }
  820. chmod_sysfs_attrs(hdev);
  821. return count;
  822. }
  823. static ssize_t pstr_show(struct device *kdev, struct device_attribute *kattr,
  824. char *buf, int number)
  825. {
  826. struct hid_device *hdev = to_hid_device(kdev);
  827. struct cp2112_string_report report;
  828. u8 length;
  829. int ret;
  830. ret = cp2112_hid_get(hdev, number, (u8 *)&report.contents,
  831. sizeof(report.contents), HID_FEATURE_REPORT);
  832. if (ret < 3) {
  833. hid_err(hdev, "error reading %s string: %d\n", kattr->attr.name,
  834. ret);
  835. if (ret < 0)
  836. return ret;
  837. return -EIO;
  838. }
  839. if (report.length < 2) {
  840. hid_err(hdev, "invalid %s string length: %d\n",
  841. kattr->attr.name, report.length);
  842. return -EIO;
  843. }
  844. length = report.length > ret - 1 ? ret - 1 : report.length;
  845. length = (length - 2) / sizeof(report.string[0]);
  846. ret = utf16s_to_utf8s(report.string, length, UTF16_LITTLE_ENDIAN, buf,
  847. PAGE_SIZE - 1);
  848. buf[ret++] = '\n';
  849. return ret;
  850. }
  851. #define CP2112_PSTR_ATTR(name, _report) \
  852. static ssize_t name##_store(struct device *kdev, struct device_attribute *kattr, \
  853. const char *buf, size_t count) \
  854. { \
  855. return pstr_store(kdev, kattr, buf, count, _report); \
  856. } \
  857. static ssize_t name##_show(struct device *kdev, struct device_attribute *kattr, char *buf) \
  858. { \
  859. return pstr_show(kdev, kattr, buf, _report); \
  860. } \
  861. static DEVICE_ATTR_RW(name);
  862. CP2112_PSTR_ATTR(manufacturer, CP2112_MANUFACTURER_STRING);
  863. CP2112_PSTR_ATTR(product, CP2112_PRODUCT_STRING);
  864. CP2112_PSTR_ATTR(serial, CP2112_SERIAL_STRING);
  865. #undef CP2112_PSTR_ATTR
  866. static const struct attribute_group cp2112_attr_group = {
  867. .attrs = (struct attribute *[]){
  868. &dev_attr_vendor_id.attr,
  869. &dev_attr_product_id.attr,
  870. &dev_attr_max_power.attr,
  871. &dev_attr_power_mode.attr,
  872. &dev_attr_release_version.attr,
  873. &dev_attr_manufacturer.attr,
  874. &dev_attr_product.attr,
  875. &dev_attr_serial.attr,
  876. NULL
  877. }
  878. };
  879. /* Chmoding our sysfs attributes is simply a way to expose which fields in the
  880. * PROM have already been programmed. We do not depend on this preventing
  881. * writing to these attributes since the CP2112 will simply ignore writes to
  882. * already-programmed fields. This is why there is no sense in fixing this
  883. * racy behaviour.
  884. */
  885. static void chmod_sysfs_attrs(struct hid_device *hdev)
  886. {
  887. struct attribute **attr;
  888. u8 buf[2];
  889. int ret;
  890. ret = cp2112_hid_get(hdev, CP2112_LOCK_BYTE, buf, sizeof(buf),
  891. HID_FEATURE_REPORT);
  892. if (ret != sizeof(buf)) {
  893. hid_err(hdev, "error reading lock byte: %d\n", ret);
  894. return;
  895. }
  896. for (attr = cp2112_attr_group.attrs; *attr; ++attr) {
  897. umode_t mode = (buf[1] & 1) ? 0644 : 0444;
  898. ret = sysfs_chmod_file(&hdev->dev.kobj, *attr, mode);
  899. if (ret < 0)
  900. hid_err(hdev, "error chmoding sysfs file %s\n",
  901. (*attr)->name);
  902. buf[1] >>= 1;
  903. }
  904. }
  905. static void cp2112_gpio_irq_ack(struct irq_data *d)
  906. {
  907. }
  908. static void cp2112_gpio_irq_mask(struct irq_data *d)
  909. {
  910. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  911. struct cp2112_device *dev = gpiochip_get_data(gc);
  912. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  913. __clear_bit(hwirq, &dev->irq_mask);
  914. gpiochip_disable_irq(gc, hwirq);
  915. }
  916. static void cp2112_gpio_irq_unmask(struct irq_data *d)
  917. {
  918. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  919. struct cp2112_device *dev = gpiochip_get_data(gc);
  920. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  921. gpiochip_enable_irq(gc, hwirq);
  922. __set_bit(hwirq, &dev->irq_mask);
  923. }
  924. static void cp2112_gpio_poll_callback(struct work_struct *work)
  925. {
  926. struct cp2112_device *dev = container_of(work, struct cp2112_device,
  927. gpio_poll_worker.work);
  928. u8 gpio_mask;
  929. u32 irq_type;
  930. int irq, virq, ret;
  931. ret = cp2112_gpio_get_all(&dev->gc);
  932. if (ret == -ENODEV) /* the hardware has been disconnected */
  933. return;
  934. if (ret < 0)
  935. goto exit;
  936. gpio_mask = ret;
  937. for_each_set_bit(virq, &dev->irq_mask, CP2112_GPIO_MAX_GPIO) {
  938. irq = irq_find_mapping(dev->gc.irq.domain, virq);
  939. if (!irq)
  940. continue;
  941. irq_type = irq_get_trigger_type(irq);
  942. if (!irq_type)
  943. continue;
  944. if (gpio_mask & BIT(virq)) {
  945. /* Level High */
  946. if (irq_type & IRQ_TYPE_LEVEL_HIGH)
  947. handle_nested_irq(irq);
  948. if ((irq_type & IRQ_TYPE_EDGE_RISING) &&
  949. !(dev->gpio_prev_state & BIT(virq)))
  950. handle_nested_irq(irq);
  951. } else {
  952. /* Level Low */
  953. if (irq_type & IRQ_TYPE_LEVEL_LOW)
  954. handle_nested_irq(irq);
  955. if ((irq_type & IRQ_TYPE_EDGE_FALLING) &&
  956. (dev->gpio_prev_state & BIT(virq)))
  957. handle_nested_irq(irq);
  958. }
  959. }
  960. dev->gpio_prev_state = gpio_mask;
  961. exit:
  962. if (dev->gpio_poll)
  963. schedule_delayed_work(&dev->gpio_poll_worker, 10);
  964. }
  965. static unsigned int cp2112_gpio_irq_startup(struct irq_data *d)
  966. {
  967. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  968. struct cp2112_device *dev = gpiochip_get_data(gc);
  969. if (!dev->gpio_poll) {
  970. dev->gpio_poll = true;
  971. schedule_delayed_work(&dev->gpio_poll_worker, 0);
  972. }
  973. cp2112_gpio_irq_unmask(d);
  974. return 0;
  975. }
  976. static void cp2112_gpio_irq_shutdown(struct irq_data *d)
  977. {
  978. struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
  979. struct cp2112_device *dev = gpiochip_get_data(gc);
  980. cp2112_gpio_irq_mask(d);
  981. if (!dev->irq_mask) {
  982. dev->gpio_poll = false;
  983. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  984. }
  985. }
  986. static int cp2112_gpio_irq_type(struct irq_data *d, unsigned int type)
  987. {
  988. return 0;
  989. }
  990. static const struct irq_chip cp2112_gpio_irqchip = {
  991. .name = "cp2112-gpio",
  992. .irq_startup = cp2112_gpio_irq_startup,
  993. .irq_shutdown = cp2112_gpio_irq_shutdown,
  994. .irq_ack = cp2112_gpio_irq_ack,
  995. .irq_mask = cp2112_gpio_irq_mask,
  996. .irq_unmask = cp2112_gpio_irq_unmask,
  997. .irq_set_type = cp2112_gpio_irq_type,
  998. .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,
  999. GPIOCHIP_IRQ_RESOURCE_HELPERS,
  1000. };
  1001. static int cp2112_probe(struct hid_device *hdev, const struct hid_device_id *id)
  1002. {
  1003. struct cp2112_device *dev;
  1004. u8 buf[3];
  1005. struct cp2112_smbus_config_report config;
  1006. struct gpio_irq_chip *girq;
  1007. int ret;
  1008. dev = devm_kzalloc(&hdev->dev, sizeof(*dev), GFP_KERNEL);
  1009. if (!dev)
  1010. return -ENOMEM;
  1011. dev->in_out_buffer = devm_kzalloc(&hdev->dev, CP2112_REPORT_MAX_LENGTH,
  1012. GFP_KERNEL);
  1013. if (!dev->in_out_buffer)
  1014. return -ENOMEM;
  1015. mutex_init(&dev->lock);
  1016. ret = hid_parse(hdev);
  1017. if (ret) {
  1018. hid_err(hdev, "parse failed\n");
  1019. return ret;
  1020. }
  1021. ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
  1022. if (ret) {
  1023. hid_err(hdev, "hw start failed\n");
  1024. return ret;
  1025. }
  1026. ret = hid_hw_open(hdev);
  1027. if (ret) {
  1028. hid_err(hdev, "hw open failed\n");
  1029. goto err_hid_stop;
  1030. }
  1031. ret = hid_hw_power(hdev, PM_HINT_FULLON);
  1032. if (ret < 0) {
  1033. hid_err(hdev, "power management error: %d\n", ret);
  1034. goto err_hid_close;
  1035. }
  1036. ret = cp2112_hid_get(hdev, CP2112_GET_VERSION_INFO, buf, sizeof(buf),
  1037. HID_FEATURE_REPORT);
  1038. if (ret != sizeof(buf)) {
  1039. hid_err(hdev, "error requesting version\n");
  1040. if (ret >= 0)
  1041. ret = -EIO;
  1042. goto err_power_normal;
  1043. }
  1044. hid_info(hdev, "Part Number: 0x%02X Device Version: 0x%02X\n",
  1045. buf[1], buf[2]);
  1046. ret = cp2112_hid_get(hdev, CP2112_SMBUS_CONFIG, (u8 *)&config,
  1047. sizeof(config), HID_FEATURE_REPORT);
  1048. if (ret != sizeof(config)) {
  1049. hid_err(hdev, "error requesting SMBus config\n");
  1050. if (ret >= 0)
  1051. ret = -EIO;
  1052. goto err_power_normal;
  1053. }
  1054. config.retry_time = cpu_to_be16(1);
  1055. ret = cp2112_hid_output(hdev, (u8 *)&config, sizeof(config),
  1056. HID_FEATURE_REPORT);
  1057. if (ret != sizeof(config)) {
  1058. hid_err(hdev, "error setting SMBus config\n");
  1059. if (ret >= 0)
  1060. ret = -EIO;
  1061. goto err_power_normal;
  1062. }
  1063. hid_set_drvdata(hdev, (void *)dev);
  1064. dev->hdev = hdev;
  1065. dev->adap.owner = THIS_MODULE;
  1066. dev->adap.class = I2C_CLASS_HWMON;
  1067. dev->adap.algo = &smbus_algorithm;
  1068. dev->adap.algo_data = dev;
  1069. dev->adap.dev.parent = &hdev->dev;
  1070. snprintf(dev->adap.name, sizeof(dev->adap.name),
  1071. "CP2112 SMBus Bridge on hidraw%d",
  1072. ((struct hidraw *)hdev->hidraw)->minor);
  1073. dev->hwversion = buf[2];
  1074. init_waitqueue_head(&dev->wait);
  1075. hid_device_io_start(hdev);
  1076. ret = i2c_add_adapter(&dev->adap);
  1077. hid_device_io_stop(hdev);
  1078. if (ret) {
  1079. hid_err(hdev, "error registering i2c adapter\n");
  1080. goto err_power_normal;
  1081. }
  1082. hid_dbg(hdev, "adapter registered\n");
  1083. dev->gc.label = "cp2112_gpio";
  1084. dev->gc.direction_input = cp2112_gpio_direction_input;
  1085. dev->gc.direction_output = cp2112_gpio_direction_output;
  1086. dev->gc.set = cp2112_gpio_set;
  1087. dev->gc.get = cp2112_gpio_get;
  1088. dev->gc.base = -1;
  1089. dev->gc.ngpio = CP2112_GPIO_MAX_GPIO;
  1090. dev->gc.can_sleep = 1;
  1091. dev->gc.parent = &hdev->dev;
  1092. girq = &dev->gc.irq;
  1093. gpio_irq_chip_set_chip(girq, &cp2112_gpio_irqchip);
  1094. /* The event comes from the outside so no parent handler */
  1095. girq->parent_handler = NULL;
  1096. girq->num_parents = 0;
  1097. girq->parents = NULL;
  1098. girq->default_type = IRQ_TYPE_NONE;
  1099. girq->handler = handle_simple_irq;
  1100. girq->threaded = true;
  1101. INIT_DELAYED_WORK(&dev->gpio_poll_worker, cp2112_gpio_poll_callback);
  1102. ret = gpiochip_add_data(&dev->gc, dev);
  1103. if (ret < 0) {
  1104. hid_err(hdev, "error registering gpio chip\n");
  1105. goto err_free_i2c;
  1106. }
  1107. ret = sysfs_create_group(&hdev->dev.kobj, &cp2112_attr_group);
  1108. if (ret < 0) {
  1109. hid_err(hdev, "error creating sysfs attrs\n");
  1110. goto err_gpiochip_remove;
  1111. }
  1112. chmod_sysfs_attrs(hdev);
  1113. hid_hw_power(hdev, PM_HINT_NORMAL);
  1114. return ret;
  1115. err_gpiochip_remove:
  1116. gpiochip_remove(&dev->gc);
  1117. err_free_i2c:
  1118. i2c_del_adapter(&dev->adap);
  1119. err_power_normal:
  1120. hid_hw_power(hdev, PM_HINT_NORMAL);
  1121. err_hid_close:
  1122. hid_hw_close(hdev);
  1123. err_hid_stop:
  1124. hid_hw_stop(hdev);
  1125. return ret;
  1126. }
  1127. static void cp2112_remove(struct hid_device *hdev)
  1128. {
  1129. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1130. sysfs_remove_group(&hdev->dev.kobj, &cp2112_attr_group);
  1131. i2c_del_adapter(&dev->adap);
  1132. if (dev->gpio_poll) {
  1133. dev->gpio_poll = false;
  1134. cancel_delayed_work_sync(&dev->gpio_poll_worker);
  1135. }
  1136. gpiochip_remove(&dev->gc);
  1137. /* i2c_del_adapter has finished removing all i2c devices from our
  1138. * adapter. Well behaved devices should no longer call our cp2112_xfer
  1139. * and should have waited for any pending calls to finish. It has also
  1140. * waited for device_unregister(&adap->dev) to complete. Therefore we
  1141. * can safely free our struct cp2112_device.
  1142. */
  1143. hid_hw_close(hdev);
  1144. hid_hw_stop(hdev);
  1145. }
  1146. static int cp2112_raw_event(struct hid_device *hdev, struct hid_report *report,
  1147. u8 *data, int size)
  1148. {
  1149. struct cp2112_device *dev = hid_get_drvdata(hdev);
  1150. struct cp2112_xfer_status_report *xfer = (void *)data;
  1151. switch (data[0]) {
  1152. case CP2112_TRANSFER_STATUS_RESPONSE:
  1153. hid_dbg(hdev, "xfer status: %02x %02x %04x %04x\n",
  1154. xfer->status0, xfer->status1,
  1155. be16_to_cpu(xfer->retries), be16_to_cpu(xfer->length));
  1156. switch (xfer->status0) {
  1157. case STATUS0_IDLE:
  1158. dev->xfer_status = -EAGAIN;
  1159. break;
  1160. case STATUS0_BUSY:
  1161. dev->xfer_status = -EBUSY;
  1162. break;
  1163. case STATUS0_COMPLETE:
  1164. dev->xfer_status = be16_to_cpu(xfer->length);
  1165. break;
  1166. case STATUS0_ERROR:
  1167. switch (xfer->status1) {
  1168. case STATUS1_TIMEOUT_NACK:
  1169. case STATUS1_TIMEOUT_BUS:
  1170. dev->xfer_status = -ETIMEDOUT;
  1171. break;
  1172. default:
  1173. dev->xfer_status = -EIO;
  1174. break;
  1175. }
  1176. break;
  1177. default:
  1178. dev->xfer_status = -EINVAL;
  1179. break;
  1180. }
  1181. atomic_set(&dev->xfer_avail, 1);
  1182. break;
  1183. case CP2112_DATA_READ_RESPONSE:
  1184. hid_dbg(hdev, "read response: %02x %02x\n", data[1], data[2]);
  1185. dev->read_length = data[2];
  1186. if (dev->read_length > sizeof(dev->read_data))
  1187. dev->read_length = sizeof(dev->read_data);
  1188. memcpy(dev->read_data, &data[3], dev->read_length);
  1189. atomic_set(&dev->read_avail, 1);
  1190. break;
  1191. default:
  1192. hid_err(hdev, "unknown report\n");
  1193. return 0;
  1194. }
  1195. wake_up_interruptible(&dev->wait);
  1196. return 1;
  1197. }
  1198. static struct hid_driver cp2112_driver = {
  1199. .name = "cp2112",
  1200. .id_table = cp2112_devices,
  1201. .probe = cp2112_probe,
  1202. .remove = cp2112_remove,
  1203. .raw_event = cp2112_raw_event,
  1204. };
  1205. module_hid_driver(cp2112_driver);
  1206. MODULE_DESCRIPTION("Silicon Labs HID USB to SMBus master bridge");
  1207. MODULE_AUTHOR("David Barksdale <dbarksdale@uplogix.com>");
  1208. MODULE_LICENSE("GPL");