ltc2688.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * LTC2688 16 channel, 16 bit Voltage Output SoftSpan DAC driver
  4. *
  5. * Copyright 2022 Analog Devices Inc.
  6. */
  7. #include <linux/bitfield.h>
  8. #include <linux/bits.h>
  9. #include <linux/clk.h>
  10. #include <linux/device.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/iio/iio.h>
  13. #include <linux/limits.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/mod_devicetable.h>
  17. #include <linux/mutex.h>
  18. #include <linux/of.h>
  19. #include <linux/property.h>
  20. #include <linux/regmap.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/spi/spi.h>
  23. #define LTC2688_DAC_CHANNELS 16
  24. #define LTC2688_CMD_CH_CODE(x) (0x00 + (x))
  25. #define LTC2688_CMD_CH_SETTING(x) (0x10 + (x))
  26. #define LTC2688_CMD_CH_OFFSET(x) (0X20 + (x))
  27. #define LTC2688_CMD_CH_GAIN(x) (0x30 + (x))
  28. #define LTC2688_CMD_CH_CODE_UPDATE(x) (0x40 + (x))
  29. #define LTC2688_CMD_CONFIG 0x70
  30. #define LTC2688_CMD_POWERDOWN 0x71
  31. #define LTC2688_CMD_A_B_SELECT 0x72
  32. #define LTC2688_CMD_SW_TOGGLE 0x73
  33. #define LTC2688_CMD_TOGGLE_DITHER_EN 0x74
  34. #define LTC2688_CMD_THERMAL_STAT 0x77
  35. #define LTC2688_CMD_UPDATE_ALL 0x7C
  36. #define LTC2688_CMD_NOOP 0xFF
  37. #define LTC2688_READ_OPERATION 0x80
  38. /* Channel Settings */
  39. #define LTC2688_CH_SPAN_MSK GENMASK(2, 0)
  40. #define LTC2688_CH_OVERRANGE_MSK BIT(3)
  41. #define LTC2688_CH_TD_SEL_MSK GENMASK(5, 4)
  42. #define LTC2688_CH_TGP_MAX 3
  43. #define LTC2688_CH_DIT_PER_MSK GENMASK(8, 6)
  44. #define LTC2688_CH_DIT_PH_MSK GENMASK(10, 9)
  45. #define LTC2688_CH_MODE_MSK BIT(11)
  46. #define LTC2688_DITHER_RAW_MASK GENMASK(15, 2)
  47. #define LTC2688_CH_CALIBBIAS_MASK GENMASK(15, 2)
  48. #define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1)
  49. #define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1)
  50. /* Configuration register */
  51. #define LTC2688_CONFIG_RST BIT(15)
  52. #define LTC2688_CONFIG_EXT_REF BIT(1)
  53. #define LTC2688_DITHER_FREQ_AVAIL_N 5
  54. enum {
  55. LTC2688_SPAN_RANGE_0V_5V,
  56. LTC2688_SPAN_RANGE_0V_10V,
  57. LTC2688_SPAN_RANGE_M5V_5V,
  58. LTC2688_SPAN_RANGE_M10V_10V,
  59. LTC2688_SPAN_RANGE_M15V_15V,
  60. LTC2688_SPAN_RANGE_MAX
  61. };
  62. enum {
  63. LTC2688_MODE_DEFAULT,
  64. LTC2688_MODE_DITHER_TOGGLE,
  65. };
  66. struct ltc2688_chan {
  67. long dither_frequency[LTC2688_DITHER_FREQ_AVAIL_N];
  68. bool overrange;
  69. bool toggle_chan;
  70. u8 mode;
  71. };
  72. struct ltc2688_state {
  73. struct spi_device *spi;
  74. struct regmap *regmap;
  75. struct ltc2688_chan channels[LTC2688_DAC_CHANNELS];
  76. struct iio_chan_spec *iio_chan;
  77. /* lock to protect against multiple access to the device and shared data */
  78. struct mutex lock;
  79. int vref;
  80. /*
  81. * DMA (thus cache coherency maintenance) may require the
  82. * transfer buffers to live in their own cache lines.
  83. */
  84. u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
  85. u8 rx_data[3];
  86. };
  87. static int ltc2688_spi_read(void *context, const void *reg, size_t reg_size,
  88. void *val, size_t val_size)
  89. {
  90. struct ltc2688_state *st = context;
  91. struct spi_transfer xfers[] = {
  92. {
  93. .tx_buf = st->tx_data,
  94. .bits_per_word = 8,
  95. .len = reg_size + val_size,
  96. .cs_change = 1,
  97. }, {
  98. .tx_buf = st->tx_data + 3,
  99. .rx_buf = st->rx_data,
  100. .bits_per_word = 8,
  101. .len = reg_size + val_size,
  102. },
  103. };
  104. int ret;
  105. memcpy(st->tx_data, reg, reg_size);
  106. ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
  107. if (ret)
  108. return ret;
  109. memcpy(val, &st->rx_data[1], val_size);
  110. return 0;
  111. }
  112. static int ltc2688_spi_write(void *context, const void *data, size_t count)
  113. {
  114. struct ltc2688_state *st = context;
  115. return spi_write(st->spi, data, count);
  116. }
  117. static int ltc2688_span_get(const struct ltc2688_state *st, int c)
  118. {
  119. int ret, reg, span;
  120. ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(c), &reg);
  121. if (ret)
  122. return ret;
  123. span = FIELD_GET(LTC2688_CH_SPAN_MSK, reg);
  124. /* sanity check to make sure we don't get any weird value from the HW */
  125. if (span >= LTC2688_SPAN_RANGE_MAX)
  126. return -EIO;
  127. return span;
  128. }
  129. static const int ltc2688_span_helper[LTC2688_SPAN_RANGE_MAX][2] = {
  130. {0, 5000}, {0, 10000}, {-5000, 5000}, {-10000, 10000}, {-15000, 15000},
  131. };
  132. static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val)
  133. {
  134. const struct ltc2688_chan *chan = &st->channels[c];
  135. int span, fs;
  136. span = ltc2688_span_get(st, c);
  137. if (span < 0)
  138. return span;
  139. fs = ltc2688_span_helper[span][1] - ltc2688_span_helper[span][0];
  140. if (chan->overrange)
  141. fs = mult_frac(fs, 105, 100);
  142. *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096);
  143. return 0;
  144. }
  145. static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val)
  146. {
  147. int span;
  148. span = ltc2688_span_get(st, c);
  149. if (span < 0)
  150. return span;
  151. if (ltc2688_span_helper[span][0] < 0)
  152. *val = -32768;
  153. else
  154. *val = 0;
  155. return 0;
  156. }
  157. enum {
  158. LTC2688_INPUT_A,
  159. LTC2688_INPUT_B,
  160. LTC2688_INPUT_B_AVAIL,
  161. LTC2688_DITHER_OFF,
  162. LTC2688_DITHER_FREQ_AVAIL,
  163. };
  164. static int ltc2688_dac_code_write(struct ltc2688_state *st, u32 chan, u32 input,
  165. u16 code)
  166. {
  167. struct ltc2688_chan *c = &st->channels[chan];
  168. int ret, reg;
  169. /* 2 LSBs set to 0 if writing dither amplitude */
  170. if (!c->toggle_chan && input == LTC2688_INPUT_B) {
  171. if (code > LTC2688_DITHER_RAW_MAX_VAL)
  172. return -EINVAL;
  173. code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code);
  174. }
  175. mutex_lock(&st->lock);
  176. /* select the correct input register to read from */
  177. ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
  178. input << chan);
  179. if (ret)
  180. goto out_unlock;
  181. /*
  182. * If in dither/toggle mode the dac should be updated by an
  183. * external signal (or sw toggle) and not here.
  184. */
  185. if (c->mode == LTC2688_MODE_DEFAULT)
  186. reg = LTC2688_CMD_CH_CODE_UPDATE(chan);
  187. else
  188. reg = LTC2688_CMD_CH_CODE(chan);
  189. ret = regmap_write(st->regmap, reg, code);
  190. out_unlock:
  191. mutex_unlock(&st->lock);
  192. return ret;
  193. }
  194. static int ltc2688_dac_code_read(struct ltc2688_state *st, u32 chan, u32 input,
  195. u32 *code)
  196. {
  197. struct ltc2688_chan *c = &st->channels[chan];
  198. int ret;
  199. mutex_lock(&st->lock);
  200. ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan),
  201. input << chan);
  202. if (ret)
  203. goto out_unlock;
  204. ret = regmap_read(st->regmap, LTC2688_CMD_CH_CODE(chan), code);
  205. out_unlock:
  206. mutex_unlock(&st->lock);
  207. if (!c->toggle_chan && input == LTC2688_INPUT_B)
  208. *code = FIELD_GET(LTC2688_DITHER_RAW_MASK, *code);
  209. return ret;
  210. }
  211. static const int ltc2688_raw_range[] = {0, 1, U16_MAX};
  212. static int ltc2688_read_avail(struct iio_dev *indio_dev,
  213. struct iio_chan_spec const *chan,
  214. const int **vals, int *type, int *length,
  215. long info)
  216. {
  217. switch (info) {
  218. case IIO_CHAN_INFO_RAW:
  219. *vals = ltc2688_raw_range;
  220. *type = IIO_VAL_INT;
  221. return IIO_AVAIL_RANGE;
  222. default:
  223. return -EINVAL;
  224. }
  225. }
  226. static int ltc2688_read_raw(struct iio_dev *indio_dev,
  227. struct iio_chan_spec const *chan, int *val,
  228. int *val2, long info)
  229. {
  230. struct ltc2688_state *st = iio_priv(indio_dev);
  231. int ret;
  232. switch (info) {
  233. case IIO_CHAN_INFO_RAW:
  234. ret = ltc2688_dac_code_read(st, chan->channel, LTC2688_INPUT_A,
  235. val);
  236. if (ret)
  237. return ret;
  238. return IIO_VAL_INT;
  239. case IIO_CHAN_INFO_OFFSET:
  240. ret = ltc2688_offset_get(st, chan->channel, val);
  241. if (ret)
  242. return ret;
  243. return IIO_VAL_INT;
  244. case IIO_CHAN_INFO_SCALE:
  245. ret = ltc2688_scale_get(st, chan->channel, val);
  246. if (ret)
  247. return ret;
  248. *val2 = 16;
  249. return IIO_VAL_FRACTIONAL_LOG2;
  250. case IIO_CHAN_INFO_CALIBBIAS:
  251. ret = regmap_read(st->regmap,
  252. LTC2688_CMD_CH_OFFSET(chan->channel), val);
  253. if (ret)
  254. return ret;
  255. *val = FIELD_GET(LTC2688_CH_CALIBBIAS_MASK, *val);
  256. return IIO_VAL_INT;
  257. case IIO_CHAN_INFO_CALIBSCALE:
  258. ret = regmap_read(st->regmap,
  259. LTC2688_CMD_CH_GAIN(chan->channel), val);
  260. if (ret)
  261. return ret;
  262. return IIO_VAL_INT;
  263. default:
  264. return -EINVAL;
  265. }
  266. }
  267. static int ltc2688_write_raw(struct iio_dev *indio_dev,
  268. struct iio_chan_spec const *chan, int val,
  269. int val2, long info)
  270. {
  271. struct ltc2688_state *st = iio_priv(indio_dev);
  272. switch (info) {
  273. case IIO_CHAN_INFO_RAW:
  274. if (val > U16_MAX || val < 0)
  275. return -EINVAL;
  276. return ltc2688_dac_code_write(st, chan->channel,
  277. LTC2688_INPUT_A, val);
  278. case IIO_CHAN_INFO_CALIBBIAS:
  279. if (val > LTC2688_CH_CALIBBIAS_MAX_VAL)
  280. return -EINVAL;
  281. return regmap_write(st->regmap,
  282. LTC2688_CMD_CH_OFFSET(chan->channel),
  283. FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val));
  284. case IIO_CHAN_INFO_CALIBSCALE:
  285. return regmap_write(st->regmap,
  286. LTC2688_CMD_CH_GAIN(chan->channel), val);
  287. default:
  288. return -EINVAL;
  289. }
  290. }
  291. static ssize_t ltc2688_dither_toggle_set(struct iio_dev *indio_dev,
  292. uintptr_t private,
  293. const struct iio_chan_spec *chan,
  294. const char *buf, size_t len)
  295. {
  296. struct ltc2688_state *st = iio_priv(indio_dev);
  297. struct ltc2688_chan *c = &st->channels[chan->channel];
  298. int ret;
  299. bool en;
  300. ret = kstrtobool(buf, &en);
  301. if (ret)
  302. return ret;
  303. mutex_lock(&st->lock);
  304. ret = regmap_update_bits(st->regmap, LTC2688_CMD_TOGGLE_DITHER_EN,
  305. BIT(chan->channel), en << chan->channel);
  306. if (ret)
  307. goto out_unlock;
  308. c->mode = en ? LTC2688_MODE_DITHER_TOGGLE : LTC2688_MODE_DEFAULT;
  309. out_unlock:
  310. mutex_unlock(&st->lock);
  311. return ret ?: len;
  312. }
  313. static ssize_t ltc2688_reg_bool_get(struct iio_dev *indio_dev,
  314. uintptr_t private,
  315. const struct iio_chan_spec *chan,
  316. char *buf)
  317. {
  318. const struct ltc2688_state *st = iio_priv(indio_dev);
  319. int ret;
  320. u32 val;
  321. ret = regmap_read(st->regmap, private, &val);
  322. if (ret)
  323. return ret;
  324. return sysfs_emit(buf, "%u\n", !!(val & BIT(chan->channel)));
  325. }
  326. static ssize_t ltc2688_reg_bool_set(struct iio_dev *indio_dev,
  327. uintptr_t private,
  328. const struct iio_chan_spec *chan,
  329. const char *buf, size_t len)
  330. {
  331. const struct ltc2688_state *st = iio_priv(indio_dev);
  332. int ret;
  333. bool en;
  334. ret = kstrtobool(buf, &en);
  335. if (ret)
  336. return ret;
  337. ret = regmap_update_bits(st->regmap, private, BIT(chan->channel),
  338. en << chan->channel);
  339. if (ret)
  340. return ret;
  341. return len;
  342. }
  343. static ssize_t ltc2688_dither_freq_avail(const struct ltc2688_state *st,
  344. const struct ltc2688_chan *chan,
  345. char *buf)
  346. {
  347. int sz = 0;
  348. u32 f;
  349. for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
  350. sz += sysfs_emit_at(buf, sz, "%ld ", chan->dither_frequency[f]);
  351. buf[sz - 1] = '\n';
  352. return sz;
  353. }
  354. static ssize_t ltc2688_dither_freq_get(struct iio_dev *indio_dev,
  355. uintptr_t private,
  356. const struct iio_chan_spec *chan,
  357. char *buf)
  358. {
  359. const struct ltc2688_state *st = iio_priv(indio_dev);
  360. const struct ltc2688_chan *c = &st->channels[chan->channel];
  361. u32 reg, freq;
  362. int ret;
  363. if (private == LTC2688_DITHER_FREQ_AVAIL)
  364. return ltc2688_dither_freq_avail(st, c, buf);
  365. ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
  366. &reg);
  367. if (ret)
  368. return ret;
  369. freq = FIELD_GET(LTC2688_CH_DIT_PER_MSK, reg);
  370. if (freq >= ARRAY_SIZE(c->dither_frequency))
  371. return -EIO;
  372. return sysfs_emit(buf, "%ld\n", c->dither_frequency[freq]);
  373. }
  374. static ssize_t ltc2688_dither_freq_set(struct iio_dev *indio_dev,
  375. uintptr_t private,
  376. const struct iio_chan_spec *chan,
  377. const char *buf, size_t len)
  378. {
  379. const struct ltc2688_state *st = iio_priv(indio_dev);
  380. const struct ltc2688_chan *c = &st->channels[chan->channel];
  381. long val;
  382. u32 freq;
  383. int ret;
  384. if (private == LTC2688_DITHER_FREQ_AVAIL)
  385. return -EINVAL;
  386. ret = kstrtol(buf, 10, &val);
  387. if (ret)
  388. return ret;
  389. for (freq = 0; freq < ARRAY_SIZE(c->dither_frequency); freq++) {
  390. if (val == c->dither_frequency[freq])
  391. break;
  392. }
  393. if (freq == ARRAY_SIZE(c->dither_frequency))
  394. return -EINVAL;
  395. ret = regmap_update_bits(st->regmap,
  396. LTC2688_CMD_CH_SETTING(chan->channel),
  397. LTC2688_CH_DIT_PER_MSK,
  398. FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq));
  399. if (ret)
  400. return ret;
  401. return len;
  402. }
  403. static ssize_t ltc2688_dac_input_read(struct iio_dev *indio_dev,
  404. uintptr_t private,
  405. const struct iio_chan_spec *chan,
  406. char *buf)
  407. {
  408. struct ltc2688_state *st = iio_priv(indio_dev);
  409. int ret;
  410. u32 val;
  411. if (private == LTC2688_INPUT_B_AVAIL)
  412. return sysfs_emit(buf, "[%u %u %u]\n", ltc2688_raw_range[0],
  413. ltc2688_raw_range[1],
  414. ltc2688_raw_range[2] / 4);
  415. if (private == LTC2688_DITHER_OFF)
  416. return sysfs_emit(buf, "0\n");
  417. ret = ltc2688_dac_code_read(st, chan->channel, private, &val);
  418. if (ret)
  419. return ret;
  420. return sysfs_emit(buf, "%u\n", val);
  421. }
  422. static ssize_t ltc2688_dac_input_write(struct iio_dev *indio_dev,
  423. uintptr_t private,
  424. const struct iio_chan_spec *chan,
  425. const char *buf, size_t len)
  426. {
  427. struct ltc2688_state *st = iio_priv(indio_dev);
  428. int ret;
  429. u16 val;
  430. if (private == LTC2688_INPUT_B_AVAIL || private == LTC2688_DITHER_OFF)
  431. return -EINVAL;
  432. ret = kstrtou16(buf, 10, &val);
  433. if (ret)
  434. return ret;
  435. ret = ltc2688_dac_code_write(st, chan->channel, private, val);
  436. if (ret)
  437. return ret;
  438. return len;
  439. }
  440. static int ltc2688_get_dither_phase(struct iio_dev *dev,
  441. const struct iio_chan_spec *chan)
  442. {
  443. struct ltc2688_state *st = iio_priv(dev);
  444. int ret, regval;
  445. ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel),
  446. &regval);
  447. if (ret)
  448. return ret;
  449. return FIELD_GET(LTC2688_CH_DIT_PH_MSK, regval);
  450. }
  451. static int ltc2688_set_dither_phase(struct iio_dev *dev,
  452. const struct iio_chan_spec *chan,
  453. unsigned int phase)
  454. {
  455. struct ltc2688_state *st = iio_priv(dev);
  456. return regmap_update_bits(st->regmap,
  457. LTC2688_CMD_CH_SETTING(chan->channel),
  458. LTC2688_CH_DIT_PH_MSK,
  459. FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase));
  460. }
  461. static int ltc2688_reg_access(struct iio_dev *indio_dev,
  462. unsigned int reg,
  463. unsigned int writeval,
  464. unsigned int *readval)
  465. {
  466. struct ltc2688_state *st = iio_priv(indio_dev);
  467. if (readval)
  468. return regmap_read(st->regmap, reg, readval);
  469. return regmap_write(st->regmap, reg, writeval);
  470. }
  471. static const char * const ltc2688_dither_phase[] = {
  472. "0", "1.5708", "3.14159", "4.71239",
  473. };
  474. static const struct iio_enum ltc2688_dither_phase_enum = {
  475. .items = ltc2688_dither_phase,
  476. .num_items = ARRAY_SIZE(ltc2688_dither_phase),
  477. .set = ltc2688_set_dither_phase,
  478. .get = ltc2688_get_dither_phase,
  479. };
  480. #define LTC2688_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \
  481. .name = _name, \
  482. .read = (_read), \
  483. .write = (_write), \
  484. .private = (_what), \
  485. .shared = (_shared), \
  486. }
  487. /*
  488. * For toggle mode we only expose the symbol attr (sw_toggle) in case a TGPx is
  489. * not provided in dts.
  490. */
  491. static const struct iio_chan_spec_ext_info ltc2688_toggle_sym_ext_info[] = {
  492. LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
  493. ltc2688_dac_input_read, ltc2688_dac_input_write),
  494. LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
  495. ltc2688_dac_input_read, ltc2688_dac_input_write),
  496. LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
  497. IIO_SEPARATE, ltc2688_reg_bool_get,
  498. ltc2688_dither_toggle_set),
  499. LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
  500. ltc2688_reg_bool_get, ltc2688_reg_bool_set),
  501. LTC2688_CHAN_EXT_INFO("symbol", LTC2688_CMD_SW_TOGGLE, IIO_SEPARATE,
  502. ltc2688_reg_bool_get, ltc2688_reg_bool_set),
  503. {}
  504. };
  505. static const struct iio_chan_spec_ext_info ltc2688_toggle_ext_info[] = {
  506. LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE,
  507. ltc2688_dac_input_read, ltc2688_dac_input_write),
  508. LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE,
  509. ltc2688_dac_input_read, ltc2688_dac_input_write),
  510. LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN,
  511. IIO_SEPARATE, ltc2688_reg_bool_get,
  512. ltc2688_dither_toggle_set),
  513. LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
  514. ltc2688_reg_bool_get, ltc2688_reg_bool_set),
  515. {}
  516. };
  517. static struct iio_chan_spec_ext_info ltc2688_dither_ext_info[] = {
  518. LTC2688_CHAN_EXT_INFO("dither_raw", LTC2688_INPUT_B, IIO_SEPARATE,
  519. ltc2688_dac_input_read, ltc2688_dac_input_write),
  520. LTC2688_CHAN_EXT_INFO("dither_raw_available", LTC2688_INPUT_B_AVAIL,
  521. IIO_SEPARATE, ltc2688_dac_input_read,
  522. ltc2688_dac_input_write),
  523. LTC2688_CHAN_EXT_INFO("dither_offset", LTC2688_DITHER_OFF, IIO_SEPARATE,
  524. ltc2688_dac_input_read, ltc2688_dac_input_write),
  525. /*
  526. * Not IIO_ENUM because the available freq needs to be computed at
  527. * probe. We could still use it, but it didn't felt much right.
  528. */
  529. LTC2688_CHAN_EXT_INFO("dither_frequency", 0, IIO_SEPARATE,
  530. ltc2688_dither_freq_get, ltc2688_dither_freq_set),
  531. LTC2688_CHAN_EXT_INFO("dither_frequency_available",
  532. LTC2688_DITHER_FREQ_AVAIL, IIO_SEPARATE,
  533. ltc2688_dither_freq_get, ltc2688_dither_freq_set),
  534. IIO_ENUM("dither_phase", IIO_SEPARATE, &ltc2688_dither_phase_enum),
  535. IIO_ENUM_AVAILABLE("dither_phase", IIO_SEPARATE,
  536. &ltc2688_dither_phase_enum),
  537. LTC2688_CHAN_EXT_INFO("dither_en", LTC2688_CMD_TOGGLE_DITHER_EN,
  538. IIO_SEPARATE, ltc2688_reg_bool_get,
  539. ltc2688_dither_toggle_set),
  540. LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
  541. ltc2688_reg_bool_get, ltc2688_reg_bool_set),
  542. {}
  543. };
  544. static const struct iio_chan_spec_ext_info ltc2688_ext_info[] = {
  545. LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE,
  546. ltc2688_reg_bool_get, ltc2688_reg_bool_set),
  547. {}
  548. };
  549. #define LTC2688_CHANNEL(_chan) { \
  550. .type = IIO_VOLTAGE, \
  551. .indexed = 1, \
  552. .output = 1, \
  553. .channel = (_chan), \
  554. .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
  555. BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | \
  556. BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_RAW), \
  557. .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), \
  558. .ext_info = ltc2688_ext_info, \
  559. }
  560. static const struct iio_chan_spec ltc2688_channels[] = {
  561. LTC2688_CHANNEL(0),
  562. LTC2688_CHANNEL(1),
  563. LTC2688_CHANNEL(2),
  564. LTC2688_CHANNEL(3),
  565. LTC2688_CHANNEL(4),
  566. LTC2688_CHANNEL(5),
  567. LTC2688_CHANNEL(6),
  568. LTC2688_CHANNEL(7),
  569. LTC2688_CHANNEL(8),
  570. LTC2688_CHANNEL(9),
  571. LTC2688_CHANNEL(10),
  572. LTC2688_CHANNEL(11),
  573. LTC2688_CHANNEL(12),
  574. LTC2688_CHANNEL(13),
  575. LTC2688_CHANNEL(14),
  576. LTC2688_CHANNEL(15),
  577. };
  578. static void ltc2688_clk_disable(void *clk)
  579. {
  580. clk_disable_unprepare(clk);
  581. }
  582. static const int ltc2688_period[LTC2688_DITHER_FREQ_AVAIL_N] = {
  583. 4, 8, 16, 32, 64,
  584. };
  585. static int ltc2688_tgp_clk_setup(struct ltc2688_state *st,
  586. struct ltc2688_chan *chan,
  587. struct fwnode_handle *node, int tgp)
  588. {
  589. struct device *dev = &st->spi->dev;
  590. unsigned long rate;
  591. struct clk *clk;
  592. int ret, f;
  593. clk = devm_get_clk_from_child(dev, to_of_node(node), NULL);
  594. if (IS_ERR(clk))
  595. return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n");
  596. ret = clk_prepare_enable(clk);
  597. if (ret)
  598. return dev_err_probe(dev, ret, "failed to enable tgp clk.\n");
  599. ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk);
  600. if (ret)
  601. return ret;
  602. if (chan->toggle_chan)
  603. return 0;
  604. /* calculate available dither frequencies */
  605. rate = clk_get_rate(clk);
  606. for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++)
  607. chan->dither_frequency[f] = DIV_ROUND_CLOSEST(rate, ltc2688_period[f]);
  608. return 0;
  609. }
  610. static int ltc2688_span_lookup(const struct ltc2688_state *st, int min, int max)
  611. {
  612. u32 span;
  613. for (span = 0; span < ARRAY_SIZE(ltc2688_span_helper); span++) {
  614. if (min == ltc2688_span_helper[span][0] &&
  615. max == ltc2688_span_helper[span][1])
  616. return span;
  617. }
  618. return -EINVAL;
  619. }
  620. static int ltc2688_channel_config(struct ltc2688_state *st)
  621. {
  622. struct device *dev = &st->spi->dev;
  623. u32 reg, clk_input, val, tmp[2];
  624. int ret, span;
  625. device_for_each_child_node_scoped(dev, child) {
  626. struct ltc2688_chan *chan;
  627. ret = fwnode_property_read_u32(child, "reg", &reg);
  628. if (ret)
  629. return dev_err_probe(dev, ret,
  630. "Failed to get reg property\n");
  631. if (reg >= LTC2688_DAC_CHANNELS)
  632. return dev_err_probe(dev, -EINVAL,
  633. "reg bigger than: %d\n",
  634. LTC2688_DAC_CHANNELS);
  635. val = 0;
  636. chan = &st->channels[reg];
  637. if (fwnode_property_read_bool(child, "adi,toggle-mode")) {
  638. chan->toggle_chan = true;
  639. /* assume sw toggle ABI */
  640. st->iio_chan[reg].ext_info = ltc2688_toggle_sym_ext_info;
  641. /*
  642. * Clear IIO_CHAN_INFO_RAW bit as toggle channels expose
  643. * out_voltage_raw{0|1} files.
  644. */
  645. __clear_bit(IIO_CHAN_INFO_RAW,
  646. &st->iio_chan[reg].info_mask_separate);
  647. }
  648. ret = fwnode_property_read_u32_array(child, "adi,output-range-microvolt",
  649. tmp, ARRAY_SIZE(tmp));
  650. if (!ret) {
  651. span = ltc2688_span_lookup(st, (int)tmp[0] / 1000,
  652. tmp[1] / 1000);
  653. if (span < 0)
  654. return dev_err_probe(dev, span,
  655. "output range not valid:[%d %d]\n",
  656. tmp[0], tmp[1]);
  657. val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span);
  658. }
  659. ret = fwnode_property_read_u32(child, "adi,toggle-dither-input",
  660. &clk_input);
  661. if (!ret) {
  662. if (clk_input >= LTC2688_CH_TGP_MAX) {
  663. return dev_err_probe(dev, -EINVAL,
  664. "toggle-dither-input inv value(%d)\n",
  665. clk_input);
  666. }
  667. ret = ltc2688_tgp_clk_setup(st, chan, child, clk_input);
  668. if (ret)
  669. return ret;
  670. /*
  671. * 0 means software toggle which is the default mode.
  672. * Hence the +1.
  673. */
  674. val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1);
  675. /*
  676. * If a TGPx is given, we automatically assume a dither
  677. * capable channel (unless toggle is already enabled).
  678. * On top of this we just set here the dither bit in the
  679. * channel settings. It won't have any effect until the
  680. * global toggle/dither bit is enabled.
  681. */
  682. if (!chan->toggle_chan) {
  683. val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1);
  684. st->iio_chan[reg].ext_info = ltc2688_dither_ext_info;
  685. } else {
  686. /* wait, no sw toggle after all */
  687. st->iio_chan[reg].ext_info = ltc2688_toggle_ext_info;
  688. }
  689. }
  690. if (fwnode_property_read_bool(child, "adi,overrange")) {
  691. chan->overrange = true;
  692. val |= LTC2688_CH_OVERRANGE_MSK;
  693. }
  694. if (!val)
  695. continue;
  696. ret = regmap_write(st->regmap, LTC2688_CMD_CH_SETTING(reg),
  697. val);
  698. if (ret)
  699. return dev_err_probe(dev, ret,
  700. "failed to set chan settings\n");
  701. }
  702. return 0;
  703. }
  704. static int ltc2688_setup(struct ltc2688_state *st, struct regulator *vref)
  705. {
  706. struct device *dev = &st->spi->dev;
  707. struct gpio_desc *gpio;
  708. int ret;
  709. /*
  710. * If we have a reset pin, use that to reset the board, If not, use
  711. * the reset bit.
  712. */
  713. gpio = devm_gpiod_get_optional(dev, "clr", GPIOD_OUT_HIGH);
  714. if (IS_ERR(gpio))
  715. return dev_err_probe(dev, PTR_ERR(gpio), "Failed to get reset gpio");
  716. if (gpio) {
  717. usleep_range(1000, 1200);
  718. /* bring device out of reset */
  719. gpiod_set_value_cansleep(gpio, 0);
  720. } else {
  721. ret = regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG,
  722. LTC2688_CONFIG_RST);
  723. if (ret)
  724. return ret;
  725. }
  726. usleep_range(10000, 12000);
  727. /*
  728. * Duplicate the default channel configuration as it can change during
  729. * @ltc2688_channel_config()
  730. */
  731. st->iio_chan = devm_kmemdup(dev, ltc2688_channels,
  732. sizeof(ltc2688_channels), GFP_KERNEL);
  733. if (!st->iio_chan)
  734. return -ENOMEM;
  735. ret = ltc2688_channel_config(st);
  736. if (ret)
  737. return ret;
  738. if (!vref)
  739. return 0;
  740. return regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG,
  741. LTC2688_CONFIG_EXT_REF);
  742. }
  743. static void ltc2688_disable_regulator(void *regulator)
  744. {
  745. regulator_disable(regulator);
  746. }
  747. static bool ltc2688_reg_readable(struct device *dev, unsigned int reg)
  748. {
  749. switch (reg) {
  750. case LTC2688_CMD_CH_CODE(0) ... LTC2688_CMD_CH_GAIN(15):
  751. return true;
  752. case LTC2688_CMD_CONFIG ... LTC2688_CMD_THERMAL_STAT:
  753. return true;
  754. default:
  755. return false;
  756. }
  757. }
  758. static bool ltc2688_reg_writable(struct device *dev, unsigned int reg)
  759. {
  760. /*
  761. * There's a jump from 0x76 to 0x78 in the write codes and the thermal
  762. * status code is 0x77 (which is read only) so that we need to check
  763. * that special condition.
  764. */
  765. if (reg <= LTC2688_CMD_UPDATE_ALL && reg != LTC2688_CMD_THERMAL_STAT)
  766. return true;
  767. return false;
  768. }
  769. static const struct regmap_bus ltc2688_regmap_bus = {
  770. .read = ltc2688_spi_read,
  771. .write = ltc2688_spi_write,
  772. .read_flag_mask = LTC2688_READ_OPERATION,
  773. .reg_format_endian_default = REGMAP_ENDIAN_BIG,
  774. .val_format_endian_default = REGMAP_ENDIAN_BIG,
  775. };
  776. static const struct regmap_config ltc2688_regmap_config = {
  777. .reg_bits = 8,
  778. .val_bits = 16,
  779. .readable_reg = ltc2688_reg_readable,
  780. .writeable_reg = ltc2688_reg_writable,
  781. /* ignoring the no op command */
  782. .max_register = LTC2688_CMD_UPDATE_ALL,
  783. };
  784. static const struct iio_info ltc2688_info = {
  785. .write_raw = ltc2688_write_raw,
  786. .read_raw = ltc2688_read_raw,
  787. .read_avail = ltc2688_read_avail,
  788. .debugfs_reg_access = ltc2688_reg_access,
  789. };
  790. static int ltc2688_probe(struct spi_device *spi)
  791. {
  792. static const char * const regulators[] = { "vcc", "iovcc" };
  793. struct ltc2688_state *st;
  794. struct iio_dev *indio_dev;
  795. struct regulator *vref_reg;
  796. struct device *dev = &spi->dev;
  797. int ret;
  798. indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
  799. if (!indio_dev)
  800. return -ENOMEM;
  801. st = iio_priv(indio_dev);
  802. st->spi = spi;
  803. /* Just write this once. No need to do it in every regmap read. */
  804. st->tx_data[3] = LTC2688_CMD_NOOP;
  805. mutex_init(&st->lock);
  806. st->regmap = devm_regmap_init(dev, &ltc2688_regmap_bus, st,
  807. &ltc2688_regmap_config);
  808. if (IS_ERR(st->regmap))
  809. return dev_err_probe(dev, PTR_ERR(st->regmap),
  810. "Failed to init regmap");
  811. ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
  812. regulators);
  813. if (ret)
  814. return dev_err_probe(dev, ret, "Failed to enable regulators\n");
  815. vref_reg = devm_regulator_get_optional(dev, "vref");
  816. if (IS_ERR(vref_reg)) {
  817. if (PTR_ERR(vref_reg) != -ENODEV)
  818. return dev_err_probe(dev, PTR_ERR(vref_reg),
  819. "Failed to get vref regulator");
  820. vref_reg = NULL;
  821. /* internal reference */
  822. st->vref = 4096;
  823. } else {
  824. ret = regulator_enable(vref_reg);
  825. if (ret)
  826. return dev_err_probe(dev, ret,
  827. "Failed to enable vref regulators\n");
  828. ret = devm_add_action_or_reset(dev, ltc2688_disable_regulator,
  829. vref_reg);
  830. if (ret)
  831. return ret;
  832. ret = regulator_get_voltage(vref_reg);
  833. if (ret < 0)
  834. return dev_err_probe(dev, ret, "Failed to get vref\n");
  835. st->vref = ret / 1000;
  836. }
  837. ret = ltc2688_setup(st, vref_reg);
  838. if (ret)
  839. return ret;
  840. indio_dev->name = "ltc2688";
  841. indio_dev->info = &ltc2688_info;
  842. indio_dev->modes = INDIO_DIRECT_MODE;
  843. indio_dev->channels = st->iio_chan;
  844. indio_dev->num_channels = ARRAY_SIZE(ltc2688_channels);
  845. return devm_iio_device_register(dev, indio_dev);
  846. }
  847. static const struct of_device_id ltc2688_of_id[] = {
  848. { .compatible = "adi,ltc2688" },
  849. {}
  850. };
  851. MODULE_DEVICE_TABLE(of, ltc2688_of_id);
  852. static const struct spi_device_id ltc2688_id[] = {
  853. { "ltc2688" },
  854. {}
  855. };
  856. MODULE_DEVICE_TABLE(spi, ltc2688_id);
  857. static struct spi_driver ltc2688_driver = {
  858. .driver = {
  859. .name = "ltc2688",
  860. .of_match_table = ltc2688_of_id,
  861. },
  862. .probe = ltc2688_probe,
  863. .id_table = ltc2688_id,
  864. };
  865. module_spi_driver(ltc2688_driver);
  866. MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>");
  867. MODULE_DESCRIPTION("Analog Devices LTC2688 DAC");
  868. MODULE_LICENSE("GPL");