adxrs450.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * ADXRS450/ADXRS453 Digital Output Gyroscope Driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. */
  7. #include <linux/interrupt.h>
  8. #include <linux/irq.h>
  9. #include <linux/delay.h>
  10. #include <linux/mutex.h>
  11. #include <linux/device.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/list.h>
  17. #include <linux/module.h>
  18. #include <linux/iio/iio.h>
  19. #include <linux/iio/sysfs.h>
  20. #define ADXRS450_STARTUP_DELAY 50 /* ms */
  21. /* The MSB for the spi commands */
  22. #define ADXRS450_SENSOR_DATA (0x20 << 24)
  23. #define ADXRS450_WRITE_DATA (0x40 << 24)
  24. #define ADXRS450_READ_DATA (0x80 << 24)
  25. #define ADXRS450_RATE1 0x00 /* Rate Registers */
  26. #define ADXRS450_TEMP1 0x02 /* Temperature Registers */
  27. #define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
  28. #define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
  29. #define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
  30. #define ADXRS450_FAULT1 0x0A /* Fault Registers */
  31. #define ADXRS450_PID1 0x0C /* Part ID Register 1 */
  32. #define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
  33. #define ADXRS450_SNL 0x10
  34. #define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
  35. /* Check bits */
  36. #define ADXRS450_P 0x01
  37. #define ADXRS450_CHK 0x02
  38. #define ADXRS450_CST 0x04
  39. #define ADXRS450_PWR 0x08
  40. #define ADXRS450_POR 0x10
  41. #define ADXRS450_NVM 0x20
  42. #define ADXRS450_Q 0x40
  43. #define ADXRS450_PLL 0x80
  44. #define ADXRS450_UV 0x100
  45. #define ADXRS450_OV 0x200
  46. #define ADXRS450_AMP 0x400
  47. #define ADXRS450_FAIL 0x800
  48. #define ADXRS450_WRERR_MASK (0x7 << 29)
  49. #define ADXRS450_MAX_RX 4
  50. #define ADXRS450_MAX_TX 4
  51. #define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
  52. enum {
  53. ID_ADXRS450,
  54. ID_ADXRS453,
  55. };
  56. /**
  57. * struct adxrs450_state - device instance specific data
  58. * @us: actual spi_device
  59. * @buf_lock: mutex to protect tx and rx
  60. * @tx: transmit buffer
  61. * @rx: receive buffer
  62. **/
  63. struct adxrs450_state {
  64. struct spi_device *us;
  65. struct mutex buf_lock;
  66. __be32 tx __aligned(IIO_DMA_MINALIGN);
  67. __be32 rx;
  68. };
  69. /**
  70. * adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
  71. * @indio_dev: device associated with child of actual iio_dev
  72. * @reg_address: the address of the lower of the two registers, which should be
  73. * an even address, the second register's address is reg_address + 1.
  74. * @val: somewhere to pass back the value read
  75. **/
  76. static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
  77. u8 reg_address,
  78. u16 *val)
  79. {
  80. struct adxrs450_state *st = iio_priv(indio_dev);
  81. u32 tx;
  82. int ret;
  83. struct spi_transfer xfers[] = {
  84. {
  85. .tx_buf = &st->tx,
  86. .bits_per_word = 8,
  87. .len = sizeof(st->tx),
  88. .cs_change = 1,
  89. }, {
  90. .rx_buf = &st->rx,
  91. .bits_per_word = 8,
  92. .len = sizeof(st->rx),
  93. },
  94. };
  95. mutex_lock(&st->buf_lock);
  96. tx = ADXRS450_READ_DATA | (reg_address << 17);
  97. if (!(hweight32(tx) & 1))
  98. tx |= ADXRS450_P;
  99. st->tx = cpu_to_be32(tx);
  100. ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  101. if (ret) {
  102. dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
  103. reg_address);
  104. goto error_ret;
  105. }
  106. *val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
  107. error_ret:
  108. mutex_unlock(&st->buf_lock);
  109. return ret;
  110. }
  111. /**
  112. * adxrs450_spi_write_reg_16() - write 2 bytes data to a register pair
  113. * @indio_dev: device associated with child of actual actual iio_dev
  114. * @reg_address: the address of the lower of the two registers,which should be
  115. * an even address, the second register's address is reg_address + 1.
  116. * @val: value to be written.
  117. **/
  118. static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
  119. u8 reg_address,
  120. u16 val)
  121. {
  122. struct adxrs450_state *st = iio_priv(indio_dev);
  123. u32 tx;
  124. int ret;
  125. mutex_lock(&st->buf_lock);
  126. tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
  127. if (!(hweight32(tx) & 1))
  128. tx |= ADXRS450_P;
  129. st->tx = cpu_to_be32(tx);
  130. ret = spi_write(st->us, &st->tx, sizeof(st->tx));
  131. if (ret)
  132. dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
  133. reg_address);
  134. usleep_range(100, 1000); /* enforce sequential transfer delay 0.1ms */
  135. mutex_unlock(&st->buf_lock);
  136. return ret;
  137. }
  138. /**
  139. * adxrs450_spi_sensor_data() - read 2 bytes sensor data
  140. * @indio_dev: device associated with child of actual iio_dev
  141. * @val: somewhere to pass back the value read
  142. **/
  143. static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
  144. {
  145. struct adxrs450_state *st = iio_priv(indio_dev);
  146. int ret;
  147. struct spi_transfer xfers[] = {
  148. {
  149. .tx_buf = &st->tx,
  150. .bits_per_word = 8,
  151. .len = sizeof(st->tx),
  152. .cs_change = 1,
  153. }, {
  154. .rx_buf = &st->rx,
  155. .bits_per_word = 8,
  156. .len = sizeof(st->rx),
  157. },
  158. };
  159. mutex_lock(&st->buf_lock);
  160. st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
  161. ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  162. if (ret) {
  163. dev_err(&st->us->dev, "Problem while reading sensor data\n");
  164. goto error_ret;
  165. }
  166. *val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
  167. error_ret:
  168. mutex_unlock(&st->buf_lock);
  169. return ret;
  170. }
  171. /**
  172. * adxrs450_spi_initial() - use for initializing procedure.
  173. * @st: device instance specific data
  174. * @val: somewhere to pass back the value read
  175. * @chk: Whether to perform fault check
  176. **/
  177. static int adxrs450_spi_initial(struct adxrs450_state *st,
  178. u32 *val, char chk)
  179. {
  180. int ret;
  181. u32 tx;
  182. struct spi_transfer xfers = {
  183. .tx_buf = &st->tx,
  184. .rx_buf = &st->rx,
  185. .bits_per_word = 8,
  186. .len = sizeof(st->tx),
  187. };
  188. mutex_lock(&st->buf_lock);
  189. tx = ADXRS450_SENSOR_DATA;
  190. if (chk)
  191. tx |= (ADXRS450_CHK | ADXRS450_P);
  192. st->tx = cpu_to_be32(tx);
  193. ret = spi_sync_transfer(st->us, &xfers, 1);
  194. if (ret) {
  195. dev_err(&st->us->dev, "Problem while reading initializing data\n");
  196. goto error_ret;
  197. }
  198. *val = be32_to_cpu(st->rx);
  199. error_ret:
  200. mutex_unlock(&st->buf_lock);
  201. return ret;
  202. }
  203. /* Recommended Startup Sequence by spec */
  204. static int adxrs450_initial_setup(struct iio_dev *indio_dev)
  205. {
  206. u32 t;
  207. u16 data;
  208. int ret;
  209. struct adxrs450_state *st = iio_priv(indio_dev);
  210. msleep(ADXRS450_STARTUP_DELAY*2);
  211. ret = adxrs450_spi_initial(st, &t, 1);
  212. if (ret)
  213. return ret;
  214. if (t != 0x01)
  215. dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
  216. msleep(ADXRS450_STARTUP_DELAY);
  217. ret = adxrs450_spi_initial(st, &t, 0);
  218. if (ret)
  219. return ret;
  220. msleep(ADXRS450_STARTUP_DELAY);
  221. ret = adxrs450_spi_initial(st, &t, 0);
  222. if (ret)
  223. return ret;
  224. if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
  225. dev_err(&st->us->dev, "The second response is not correct!\n");
  226. return -EIO;
  227. }
  228. ret = adxrs450_spi_initial(st, &t, 0);
  229. if (ret)
  230. return ret;
  231. if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
  232. dev_err(&st->us->dev, "The third response is not correct!\n");
  233. return -EIO;
  234. }
  235. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
  236. if (ret)
  237. return ret;
  238. if (data & 0x0fff) {
  239. dev_err(&st->us->dev, "The device is not in normal status!\n");
  240. return -EINVAL;
  241. }
  242. return 0;
  243. }
  244. static int adxrs450_write_raw(struct iio_dev *indio_dev,
  245. struct iio_chan_spec const *chan,
  246. int val,
  247. int val2,
  248. long mask)
  249. {
  250. int ret;
  251. switch (mask) {
  252. case IIO_CHAN_INFO_CALIBBIAS:
  253. if (val < -0x400 || val >= 0x400)
  254. return -EINVAL;
  255. ret = adxrs450_spi_write_reg_16(indio_dev,
  256. ADXRS450_DNC1, val);
  257. break;
  258. default:
  259. ret = -EINVAL;
  260. break;
  261. }
  262. return ret;
  263. }
  264. static int adxrs450_read_raw(struct iio_dev *indio_dev,
  265. struct iio_chan_spec const *chan,
  266. int *val,
  267. int *val2,
  268. long mask)
  269. {
  270. int ret;
  271. s16 t;
  272. switch (mask) {
  273. case IIO_CHAN_INFO_RAW:
  274. switch (chan->type) {
  275. case IIO_ANGL_VEL:
  276. ret = adxrs450_spi_sensor_data(indio_dev, &t);
  277. if (ret)
  278. break;
  279. *val = t;
  280. ret = IIO_VAL_INT;
  281. break;
  282. case IIO_TEMP:
  283. ret = adxrs450_spi_read_reg_16(indio_dev,
  284. ADXRS450_TEMP1, &t);
  285. if (ret)
  286. break;
  287. *val = (t >> 6) + 225;
  288. ret = IIO_VAL_INT;
  289. break;
  290. default:
  291. ret = -EINVAL;
  292. break;
  293. }
  294. break;
  295. case IIO_CHAN_INFO_SCALE:
  296. switch (chan->type) {
  297. case IIO_ANGL_VEL:
  298. *val = 0;
  299. *val2 = 218166;
  300. return IIO_VAL_INT_PLUS_NANO;
  301. case IIO_TEMP:
  302. *val = 200;
  303. *val2 = 0;
  304. return IIO_VAL_INT;
  305. default:
  306. return -EINVAL;
  307. }
  308. case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
  309. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
  310. if (ret)
  311. break;
  312. *val = t;
  313. ret = IIO_VAL_INT;
  314. break;
  315. case IIO_CHAN_INFO_CALIBBIAS:
  316. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
  317. if (ret)
  318. break;
  319. *val = sign_extend32(t, 9);
  320. ret = IIO_VAL_INT;
  321. break;
  322. default:
  323. ret = -EINVAL;
  324. break;
  325. }
  326. return ret;
  327. }
  328. static const struct iio_chan_spec adxrs450_channels[2][2] = {
  329. [ID_ADXRS450] = {
  330. {
  331. .type = IIO_ANGL_VEL,
  332. .modified = 1,
  333. .channel2 = IIO_MOD_Z,
  334. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  335. BIT(IIO_CHAN_INFO_CALIBBIAS) |
  336. BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) |
  337. BIT(IIO_CHAN_INFO_SCALE),
  338. }, {
  339. .type = IIO_TEMP,
  340. .indexed = 1,
  341. .channel = 0,
  342. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  343. BIT(IIO_CHAN_INFO_SCALE),
  344. }
  345. },
  346. [ID_ADXRS453] = {
  347. {
  348. .type = IIO_ANGL_VEL,
  349. .modified = 1,
  350. .channel2 = IIO_MOD_Z,
  351. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  352. BIT(IIO_CHAN_INFO_SCALE) |
  353. BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW),
  354. }, {
  355. .type = IIO_TEMP,
  356. .indexed = 1,
  357. .channel = 0,
  358. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  359. BIT(IIO_CHAN_INFO_SCALE),
  360. }
  361. },
  362. };
  363. static const struct iio_info adxrs450_info = {
  364. .read_raw = &adxrs450_read_raw,
  365. .write_raw = &adxrs450_write_raw,
  366. };
  367. static int adxrs450_probe(struct spi_device *spi)
  368. {
  369. int ret;
  370. struct adxrs450_state *st;
  371. struct iio_dev *indio_dev;
  372. /* setup the industrialio driver allocated elements */
  373. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  374. if (!indio_dev)
  375. return -ENOMEM;
  376. st = iio_priv(indio_dev);
  377. st->us = spi;
  378. mutex_init(&st->buf_lock);
  379. /* This is only used for removal purposes */
  380. spi_set_drvdata(spi, indio_dev);
  381. indio_dev->info = &adxrs450_info;
  382. indio_dev->modes = INDIO_DIRECT_MODE;
  383. indio_dev->channels =
  384. adxrs450_channels[spi_get_device_id(spi)->driver_data];
  385. indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
  386. indio_dev->name = spi->dev.driver->name;
  387. ret = devm_iio_device_register(&spi->dev, indio_dev);
  388. if (ret)
  389. return ret;
  390. /* Get the device into a sane initial state */
  391. ret = adxrs450_initial_setup(indio_dev);
  392. if (ret)
  393. return ret;
  394. return 0;
  395. }
  396. static const struct spi_device_id adxrs450_id[] = {
  397. {"adxrs450", ID_ADXRS450},
  398. {"adxrs453", ID_ADXRS453},
  399. {}
  400. };
  401. MODULE_DEVICE_TABLE(spi, adxrs450_id);
  402. static struct spi_driver adxrs450_driver = {
  403. .driver = {
  404. .name = "adxrs450",
  405. },
  406. .probe = adxrs450_probe,
  407. .id_table = adxrs450_id,
  408. };
  409. module_spi_driver(adxrs450_driver);
  410. MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
  411. MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
  412. MODULE_LICENSE("GPL v2");