afe4404.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters
  4. *
  5. * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
  6. * Andrew F. Davis <afd@ti.com>
  7. */
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/i2c.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/regmap.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/buffer.h>
  20. #include <linux/iio/trigger.h>
  21. #include <linux/iio/triggered_buffer.h>
  22. #include <linux/iio/trigger_consumer.h>
  23. #include "afe440x.h"
  24. #define AFE4404_DRIVER_NAME "afe4404"
  25. /* AFE4404 registers */
  26. #define AFE4404_TIA_GAIN_SEP 0x20
  27. #define AFE4404_TIA_GAIN 0x21
  28. #define AFE4404_PROG_TG_STC 0x34
  29. #define AFE4404_PROG_TG_ENDC 0x35
  30. #define AFE4404_LED3LEDSTC 0x36
  31. #define AFE4404_LED3LEDENDC 0x37
  32. #define AFE4404_CLKDIV_PRF 0x39
  33. #define AFE4404_OFFDAC 0x3a
  34. #define AFE4404_DEC 0x3d
  35. #define AFE4404_AVG_LED2_ALED2VAL 0x3f
  36. #define AFE4404_AVG_LED1_ALED1VAL 0x40
  37. /* AFE4404 CONTROL2 register fields */
  38. #define AFE440X_CONTROL2_OSC_ENABLE BIT(9)
  39. enum afe4404_fields {
  40. /* Gains */
  41. F_TIA_GAIN_SEP, F_TIA_CF_SEP,
  42. F_TIA_GAIN, TIA_CF,
  43. /* LED Current */
  44. F_ILED1, F_ILED2, F_ILED3,
  45. /* Offset DAC */
  46. F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2,
  47. /* sentinel */
  48. F_MAX_FIELDS
  49. };
  50. static const struct reg_field afe4404_reg_fields[] = {
  51. /* Gains */
  52. [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2),
  53. [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5),
  54. [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2),
  55. [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5),
  56. /* LED Current */
  57. [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5),
  58. [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11),
  59. [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17),
  60. /* Offset DAC */
  61. [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4),
  62. [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9),
  63. [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14),
  64. [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19),
  65. };
  66. /**
  67. * struct afe4404_data - AFE4404 device instance data
  68. * @dev: Device structure
  69. * @regmap: Register map of the device
  70. * @fields: Register fields of the device
  71. * @regulator: Pointer to the regulator for the IC
  72. * @trig: IIO trigger for this device
  73. * @irq: ADC_RDY line interrupt number
  74. * @buffer: Used to construct a scan to push to the iio buffer.
  75. */
  76. struct afe4404_data {
  77. struct device *dev;
  78. struct regmap *regmap;
  79. struct regmap_field *fields[F_MAX_FIELDS];
  80. struct regulator *regulator;
  81. struct iio_trigger *trig;
  82. int irq;
  83. s32 buffer[10] __aligned(8);
  84. };
  85. enum afe4404_chan_id {
  86. LED2 = 1,
  87. ALED2,
  88. LED1,
  89. ALED1,
  90. LED2_ALED2,
  91. LED1_ALED1,
  92. };
  93. static const unsigned int afe4404_channel_values[] = {
  94. [LED2] = AFE440X_LED2VAL,
  95. [ALED2] = AFE440X_ALED2VAL,
  96. [LED1] = AFE440X_LED1VAL,
  97. [ALED1] = AFE440X_ALED1VAL,
  98. [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
  99. [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
  100. };
  101. static const unsigned int afe4404_channel_leds[] = {
  102. [LED2] = F_ILED2,
  103. [ALED2] = F_ILED3,
  104. [LED1] = F_ILED1,
  105. };
  106. static const unsigned int afe4404_channel_offdacs[] = {
  107. [LED2] = F_OFFDAC_LED2,
  108. [ALED2] = F_OFFDAC_AMB2,
  109. [LED1] = F_OFFDAC_LED1,
  110. [ALED1] = F_OFFDAC_AMB1,
  111. };
  112. static const struct iio_chan_spec afe4404_channels[] = {
  113. /* ADC values */
  114. AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)),
  115. AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)),
  116. AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)),
  117. AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)),
  118. AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
  119. AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
  120. /* LED current */
  121. AFE440X_CURRENT_CHAN(LED2),
  122. AFE440X_CURRENT_CHAN(ALED2),
  123. AFE440X_CURRENT_CHAN(LED1),
  124. };
  125. static const struct afe440x_val_table afe4404_res_table[] = {
  126. { .integer = 500000, .fract = 0 },
  127. { .integer = 250000, .fract = 0 },
  128. { .integer = 100000, .fract = 0 },
  129. { .integer = 50000, .fract = 0 },
  130. { .integer = 25000, .fract = 0 },
  131. { .integer = 10000, .fract = 0 },
  132. { .integer = 1000000, .fract = 0 },
  133. { .integer = 2000000, .fract = 0 },
  134. };
  135. AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table);
  136. static const struct afe440x_val_table afe4404_cap_table[] = {
  137. { .integer = 0, .fract = 5000 },
  138. { .integer = 0, .fract = 2500 },
  139. { .integer = 0, .fract = 10000 },
  140. { .integer = 0, .fract = 7500 },
  141. { .integer = 0, .fract = 20000 },
  142. { .integer = 0, .fract = 17500 },
  143. { .integer = 0, .fract = 25000 },
  144. { .integer = 0, .fract = 22500 },
  145. };
  146. AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table);
  147. static ssize_t afe440x_show_register(struct device *dev,
  148. struct device_attribute *attr,
  149. char *buf)
  150. {
  151. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  152. struct afe4404_data *afe = iio_priv(indio_dev);
  153. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  154. unsigned int reg_val;
  155. int vals[2];
  156. int ret;
  157. ret = regmap_field_read(afe->fields[afe440x_attr->field], &reg_val);
  158. if (ret)
  159. return ret;
  160. if (reg_val >= afe440x_attr->table_size)
  161. return -EINVAL;
  162. vals[0] = afe440x_attr->val_table[reg_val].integer;
  163. vals[1] = afe440x_attr->val_table[reg_val].fract;
  164. return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
  165. }
  166. static ssize_t afe440x_store_register(struct device *dev,
  167. struct device_attribute *attr,
  168. const char *buf, size_t count)
  169. {
  170. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  171. struct afe4404_data *afe = iio_priv(indio_dev);
  172. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  173. int val, integer, fract, ret;
  174. ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
  175. if (ret)
  176. return ret;
  177. for (val = 0; val < afe440x_attr->table_size; val++)
  178. if (afe440x_attr->val_table[val].integer == integer &&
  179. afe440x_attr->val_table[val].fract == fract)
  180. break;
  181. if (val == afe440x_attr->table_size)
  182. return -EINVAL;
  183. ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
  184. if (ret)
  185. return ret;
  186. return count;
  187. }
  188. static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
  189. static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
  190. static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
  191. static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
  192. static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table);
  193. static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table);
  194. static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table);
  195. static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table);
  196. static struct attribute *afe440x_attributes[] = {
  197. &dev_attr_in_intensity_resistance_available.attr,
  198. &dev_attr_in_intensity_capacitance_available.attr,
  199. &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
  200. &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
  201. &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
  202. &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
  203. &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
  204. &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
  205. &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
  206. &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
  207. NULL
  208. };
  209. static const struct attribute_group afe440x_attribute_group = {
  210. .attrs = afe440x_attributes
  211. };
  212. static int afe4404_read_raw(struct iio_dev *indio_dev,
  213. struct iio_chan_spec const *chan,
  214. int *val, int *val2, long mask)
  215. {
  216. struct afe4404_data *afe = iio_priv(indio_dev);
  217. unsigned int value_reg, led_field, offdac_field;
  218. int ret;
  219. switch (chan->type) {
  220. case IIO_INTENSITY:
  221. switch (mask) {
  222. case IIO_CHAN_INFO_RAW:
  223. value_reg = afe4404_channel_values[chan->address];
  224. ret = regmap_read(afe->regmap, value_reg, val);
  225. if (ret)
  226. return ret;
  227. return IIO_VAL_INT;
  228. case IIO_CHAN_INFO_OFFSET:
  229. offdac_field = afe4404_channel_offdacs[chan->address];
  230. ret = regmap_field_read(afe->fields[offdac_field], val);
  231. if (ret)
  232. return ret;
  233. return IIO_VAL_INT;
  234. }
  235. break;
  236. case IIO_CURRENT:
  237. switch (mask) {
  238. case IIO_CHAN_INFO_RAW:
  239. led_field = afe4404_channel_leds[chan->address];
  240. ret = regmap_field_read(afe->fields[led_field], val);
  241. if (ret)
  242. return ret;
  243. return IIO_VAL_INT;
  244. case IIO_CHAN_INFO_SCALE:
  245. *val = 0;
  246. *val2 = 800000;
  247. return IIO_VAL_INT_PLUS_MICRO;
  248. }
  249. break;
  250. default:
  251. break;
  252. }
  253. return -EINVAL;
  254. }
  255. static int afe4404_write_raw(struct iio_dev *indio_dev,
  256. struct iio_chan_spec const *chan,
  257. int val, int val2, long mask)
  258. {
  259. struct afe4404_data *afe = iio_priv(indio_dev);
  260. unsigned int led_field, offdac_field;
  261. switch (chan->type) {
  262. case IIO_INTENSITY:
  263. switch (mask) {
  264. case IIO_CHAN_INFO_OFFSET:
  265. offdac_field = afe4404_channel_offdacs[chan->address];
  266. return regmap_field_write(afe->fields[offdac_field], val);
  267. }
  268. break;
  269. case IIO_CURRENT:
  270. switch (mask) {
  271. case IIO_CHAN_INFO_RAW:
  272. led_field = afe4404_channel_leds[chan->address];
  273. return regmap_field_write(afe->fields[led_field], val);
  274. }
  275. break;
  276. default:
  277. break;
  278. }
  279. return -EINVAL;
  280. }
  281. static const struct iio_info afe4404_iio_info = {
  282. .attrs = &afe440x_attribute_group,
  283. .read_raw = afe4404_read_raw,
  284. .write_raw = afe4404_write_raw,
  285. };
  286. static irqreturn_t afe4404_trigger_handler(int irq, void *private)
  287. {
  288. struct iio_poll_func *pf = private;
  289. struct iio_dev *indio_dev = pf->indio_dev;
  290. struct afe4404_data *afe = iio_priv(indio_dev);
  291. int ret, bit, i = 0;
  292. iio_for_each_active_channel(indio_dev, bit) {
  293. ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
  294. &afe->buffer[i++]);
  295. if (ret)
  296. goto err;
  297. }
  298. iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
  299. pf->timestamp);
  300. err:
  301. iio_trigger_notify_done(indio_dev->trig);
  302. return IRQ_HANDLED;
  303. }
  304. static void afe4404_regulator_disable(void *data)
  305. {
  306. struct regulator *regulator = data;
  307. regulator_disable(regulator);
  308. }
  309. /* Default timings from data-sheet */
  310. #define AFE4404_TIMING_PAIRS \
  311. { AFE440X_PRPCOUNT, 39999 }, \
  312. { AFE440X_LED2LEDSTC, 0 }, \
  313. { AFE440X_LED2LEDENDC, 398 }, \
  314. { AFE440X_LED2STC, 80 }, \
  315. { AFE440X_LED2ENDC, 398 }, \
  316. { AFE440X_ADCRSTSTCT0, 5600 }, \
  317. { AFE440X_ADCRSTENDCT0, 5606 }, \
  318. { AFE440X_LED2CONVST, 5607 }, \
  319. { AFE440X_LED2CONVEND, 6066 }, \
  320. { AFE4404_LED3LEDSTC, 400 }, \
  321. { AFE4404_LED3LEDENDC, 798 }, \
  322. { AFE440X_ALED2STC, 480 }, \
  323. { AFE440X_ALED2ENDC, 798 }, \
  324. { AFE440X_ADCRSTSTCT1, 6068 }, \
  325. { AFE440X_ADCRSTENDCT1, 6074 }, \
  326. { AFE440X_ALED2CONVST, 6075 }, \
  327. { AFE440X_ALED2CONVEND, 6534 }, \
  328. { AFE440X_LED1LEDSTC, 800 }, \
  329. { AFE440X_LED1LEDENDC, 1198 }, \
  330. { AFE440X_LED1STC, 880 }, \
  331. { AFE440X_LED1ENDC, 1198 }, \
  332. { AFE440X_ADCRSTSTCT2, 6536 }, \
  333. { AFE440X_ADCRSTENDCT2, 6542 }, \
  334. { AFE440X_LED1CONVST, 6543 }, \
  335. { AFE440X_LED1CONVEND, 7003 }, \
  336. { AFE440X_ALED1STC, 1280 }, \
  337. { AFE440X_ALED1ENDC, 1598 }, \
  338. { AFE440X_ADCRSTSTCT3, 7005 }, \
  339. { AFE440X_ADCRSTENDCT3, 7011 }, \
  340. { AFE440X_ALED1CONVST, 7012 }, \
  341. { AFE440X_ALED1CONVEND, 7471 }, \
  342. { AFE440X_PDNCYCLESTC, 7671 }, \
  343. { AFE440X_PDNCYCLEENDC, 39199 }
  344. static const struct reg_sequence afe4404_reg_sequences[] = {
  345. AFE4404_TIMING_PAIRS,
  346. { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
  347. { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN },
  348. { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE },
  349. };
  350. static const struct regmap_range afe4404_yes_ranges[] = {
  351. regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
  352. regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL),
  353. };
  354. static const struct regmap_access_table afe4404_volatile_table = {
  355. .yes_ranges = afe4404_yes_ranges,
  356. .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges),
  357. };
  358. static const struct regmap_config afe4404_regmap_config = {
  359. .reg_bits = 8,
  360. .val_bits = 24,
  361. .max_register = AFE4404_AVG_LED1_ALED1VAL,
  362. .cache_type = REGCACHE_RBTREE,
  363. .volatile_table = &afe4404_volatile_table,
  364. };
  365. static const struct of_device_id afe4404_of_match[] = {
  366. { .compatible = "ti,afe4404", },
  367. { /* sentinel */ }
  368. };
  369. MODULE_DEVICE_TABLE(of, afe4404_of_match);
  370. static int afe4404_suspend(struct device *dev)
  371. {
  372. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  373. struct afe4404_data *afe = iio_priv(indio_dev);
  374. int ret;
  375. ret = regmap_set_bits(afe->regmap, AFE440X_CONTROL2,
  376. AFE440X_CONTROL2_PDN_AFE);
  377. if (ret)
  378. return ret;
  379. ret = regulator_disable(afe->regulator);
  380. if (ret) {
  381. dev_err(dev, "Unable to disable regulator\n");
  382. return ret;
  383. }
  384. return 0;
  385. }
  386. static int afe4404_resume(struct device *dev)
  387. {
  388. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  389. struct afe4404_data *afe = iio_priv(indio_dev);
  390. int ret;
  391. ret = regulator_enable(afe->regulator);
  392. if (ret) {
  393. dev_err(dev, "Unable to enable regulator\n");
  394. return ret;
  395. }
  396. ret = regmap_clear_bits(afe->regmap, AFE440X_CONTROL2,
  397. AFE440X_CONTROL2_PDN_AFE);
  398. if (ret)
  399. return ret;
  400. return 0;
  401. }
  402. static DEFINE_SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend,
  403. afe4404_resume);
  404. static int afe4404_probe(struct i2c_client *client)
  405. {
  406. struct iio_dev *indio_dev;
  407. struct afe4404_data *afe;
  408. int i, ret;
  409. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe));
  410. if (!indio_dev)
  411. return -ENOMEM;
  412. afe = iio_priv(indio_dev);
  413. i2c_set_clientdata(client, indio_dev);
  414. afe->dev = &client->dev;
  415. afe->irq = client->irq;
  416. afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config);
  417. if (IS_ERR(afe->regmap)) {
  418. dev_err(afe->dev, "Unable to allocate register map\n");
  419. return PTR_ERR(afe->regmap);
  420. }
  421. for (i = 0; i < F_MAX_FIELDS; i++) {
  422. afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
  423. afe4404_reg_fields[i]);
  424. if (IS_ERR(afe->fields[i])) {
  425. dev_err(afe->dev, "Unable to allocate regmap fields\n");
  426. return PTR_ERR(afe->fields[i]);
  427. }
  428. }
  429. afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
  430. if (IS_ERR(afe->regulator))
  431. return dev_err_probe(afe->dev, PTR_ERR(afe->regulator),
  432. "Unable to get regulator\n");
  433. ret = regulator_enable(afe->regulator);
  434. if (ret) {
  435. dev_err(afe->dev, "Unable to enable regulator\n");
  436. return ret;
  437. }
  438. ret = devm_add_action_or_reset(afe->dev, afe4404_regulator_disable, afe->regulator);
  439. if (ret) {
  440. dev_err(afe->dev, "Unable to enable regulator\n");
  441. return ret;
  442. }
  443. ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
  444. AFE440X_CONTROL0_SW_RESET);
  445. if (ret) {
  446. dev_err(afe->dev, "Unable to reset device\n");
  447. return ret;
  448. }
  449. ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences,
  450. ARRAY_SIZE(afe4404_reg_sequences));
  451. if (ret) {
  452. dev_err(afe->dev, "Unable to set register defaults\n");
  453. return ret;
  454. }
  455. indio_dev->modes = INDIO_DIRECT_MODE;
  456. indio_dev->channels = afe4404_channels;
  457. indio_dev->num_channels = ARRAY_SIZE(afe4404_channels);
  458. indio_dev->name = AFE4404_DRIVER_NAME;
  459. indio_dev->info = &afe4404_iio_info;
  460. if (afe->irq > 0) {
  461. afe->trig = devm_iio_trigger_alloc(afe->dev,
  462. "%s-dev%d",
  463. indio_dev->name,
  464. iio_device_id(indio_dev));
  465. if (!afe->trig) {
  466. dev_err(afe->dev, "Unable to allocate IIO trigger\n");
  467. return -ENOMEM;
  468. }
  469. iio_trigger_set_drvdata(afe->trig, indio_dev);
  470. ret = devm_iio_trigger_register(afe->dev, afe->trig);
  471. if (ret) {
  472. dev_err(afe->dev, "Unable to register IIO trigger\n");
  473. return ret;
  474. }
  475. ret = devm_request_threaded_irq(afe->dev, afe->irq,
  476. iio_trigger_generic_data_rdy_poll,
  477. NULL, IRQF_ONESHOT,
  478. AFE4404_DRIVER_NAME,
  479. afe->trig);
  480. if (ret) {
  481. dev_err(afe->dev, "Unable to request IRQ\n");
  482. return ret;
  483. }
  484. }
  485. ret = devm_iio_triggered_buffer_setup(afe->dev, indio_dev,
  486. &iio_pollfunc_store_time,
  487. afe4404_trigger_handler, NULL);
  488. if (ret) {
  489. dev_err(afe->dev, "Unable to setup buffer\n");
  490. return ret;
  491. }
  492. ret = devm_iio_device_register(afe->dev, indio_dev);
  493. if (ret) {
  494. dev_err(afe->dev, "Unable to register IIO device\n");
  495. return ret;
  496. }
  497. return 0;
  498. }
  499. static const struct i2c_device_id afe4404_ids[] = {
  500. { "afe4404" },
  501. { /* sentinel */ }
  502. };
  503. MODULE_DEVICE_TABLE(i2c, afe4404_ids);
  504. static struct i2c_driver afe4404_i2c_driver = {
  505. .driver = {
  506. .name = AFE4404_DRIVER_NAME,
  507. .of_match_table = afe4404_of_match,
  508. .pm = pm_sleep_ptr(&afe4404_pm_ops),
  509. },
  510. .probe = afe4404_probe,
  511. .id_table = afe4404_ids,
  512. };
  513. module_i2c_driver(afe4404_i2c_driver);
  514. MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
  515. MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE");
  516. MODULE_LICENSE("GPL v2");