max44000.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MAX44000 Ambient and Infrared Proximity Sensor
  4. *
  5. * Copyright (c) 2016, Intel Corporation.
  6. *
  7. * Data sheet: https://datasheets.maximintegrated.com/en/ds/MAX44000.pdf
  8. *
  9. * 7-bit I2C slave address 0x4a
  10. */
  11. #include <linux/module.h>
  12. #include <linux/mod_devicetable.h>
  13. #include <linux/init.h>
  14. #include <linux/i2c.h>
  15. #include <linux/regmap.h>
  16. #include <linux/util_macros.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/buffer.h>
  20. #include <linux/iio/trigger_consumer.h>
  21. #include <linux/iio/triggered_buffer.h>
  22. #define MAX44000_DRV_NAME "max44000"
  23. /* Registers in datasheet order */
  24. #define MAX44000_REG_STATUS 0x00
  25. #define MAX44000_REG_CFG_MAIN 0x01
  26. #define MAX44000_REG_CFG_RX 0x02
  27. #define MAX44000_REG_CFG_TX 0x03
  28. #define MAX44000_REG_ALS_DATA_HI 0x04
  29. #define MAX44000_REG_ALS_DATA_LO 0x05
  30. #define MAX44000_REG_PRX_DATA 0x16
  31. #define MAX44000_REG_ALS_UPTHR_HI 0x06
  32. #define MAX44000_REG_ALS_UPTHR_LO 0x07
  33. #define MAX44000_REG_ALS_LOTHR_HI 0x08
  34. #define MAX44000_REG_ALS_LOTHR_LO 0x09
  35. #define MAX44000_REG_PST 0x0a
  36. #define MAX44000_REG_PRX_IND 0x0b
  37. #define MAX44000_REG_PRX_THR 0x0c
  38. #define MAX44000_REG_TRIM_GAIN_GREEN 0x0f
  39. #define MAX44000_REG_TRIM_GAIN_IR 0x10
  40. /* REG_CFG bits */
  41. #define MAX44000_CFG_ALSINTE 0x01
  42. #define MAX44000_CFG_PRXINTE 0x02
  43. #define MAX44000_CFG_MASK 0x1c
  44. #define MAX44000_CFG_MODE_SHUTDOWN 0x00
  45. #define MAX44000_CFG_MODE_ALS_GIR 0x04
  46. #define MAX44000_CFG_MODE_ALS_G 0x08
  47. #define MAX44000_CFG_MODE_ALS_IR 0x0c
  48. #define MAX44000_CFG_MODE_ALS_PRX 0x10
  49. #define MAX44000_CFG_MODE_PRX 0x14
  50. #define MAX44000_CFG_TRIM 0x20
  51. /*
  52. * Upper 4 bits are not documented but start as 1 on powerup
  53. * Setting them to 0 causes proximity to misbehave so set them to 1
  54. */
  55. #define MAX44000_REG_CFG_RX_DEFAULT 0xf0
  56. /* REG_RX bits */
  57. #define MAX44000_CFG_RX_ALSTIM_MASK 0x0c
  58. #define MAX44000_CFG_RX_ALSTIM_SHIFT 2
  59. #define MAX44000_CFG_RX_ALSPGA_MASK 0x03
  60. #define MAX44000_CFG_RX_ALSPGA_SHIFT 0
  61. /* REG_TX bits */
  62. #define MAX44000_LED_CURRENT_MASK 0xf
  63. #define MAX44000_LED_CURRENT_MAX 11
  64. #define MAX44000_LED_CURRENT_DEFAULT 6
  65. #define MAX44000_ALSDATA_OVERFLOW 0x4000
  66. struct max44000_data {
  67. struct mutex lock;
  68. struct regmap *regmap;
  69. /* Ensure naturally aligned timestamp */
  70. struct {
  71. u16 channels[2];
  72. aligned_s64 ts;
  73. } scan;
  74. };
  75. /* Default scale is set to the minimum of 0.03125 or 1 / (1 << 5) lux */
  76. #define MAX44000_ALS_TO_LUX_DEFAULT_FRACTION_LOG2 5
  77. /* Scale can be multiplied by up to 128x via ALSPGA for measurement gain */
  78. static const int max44000_alspga_shift[] = {0, 2, 4, 7};
  79. #define MAX44000_ALSPGA_MAX_SHIFT 7
  80. /*
  81. * Scale can be multiplied by up to 64x via ALSTIM because of lost resolution
  82. *
  83. * This scaling factor is hidden from userspace and instead accounted for when
  84. * reading raw values from the device.
  85. *
  86. * This makes it possible to cleanly expose ALSPGA as IIO_CHAN_INFO_SCALE and
  87. * ALSTIM as IIO_CHAN_INFO_INT_TIME without the values affecting each other.
  88. *
  89. * Handling this internally is also required for buffer support because the
  90. * channel's scan_type can't be modified dynamically.
  91. */
  92. #define MAX44000_ALSTIM_SHIFT(alstim) (2 * (alstim))
  93. /* Available integration times with pretty manual alignment: */
  94. static const int max44000_int_time_avail_ns_array[] = {
  95. 100000000,
  96. 25000000,
  97. 6250000,
  98. 1562500,
  99. };
  100. static const char max44000_int_time_avail_str[] =
  101. "0.100 "
  102. "0.025 "
  103. "0.00625 "
  104. "0.0015625";
  105. /* Available scales (internal to ulux) with pretty manual alignment: */
  106. static const int max44000_scale_avail_ulux_array[] = {
  107. 31250,
  108. 125000,
  109. 500000,
  110. 4000000,
  111. };
  112. static const char max44000_scale_avail_str[] =
  113. "0.03125 "
  114. "0.125 "
  115. "0.5 "
  116. "4";
  117. #define MAX44000_SCAN_INDEX_ALS 0
  118. #define MAX44000_SCAN_INDEX_PRX 1
  119. static const struct iio_chan_spec max44000_channels[] = {
  120. {
  121. .type = IIO_LIGHT,
  122. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  123. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
  124. BIT(IIO_CHAN_INFO_INT_TIME),
  125. .scan_index = MAX44000_SCAN_INDEX_ALS,
  126. .scan_type = {
  127. .sign = 'u',
  128. .realbits = 14,
  129. .storagebits = 16,
  130. }
  131. },
  132. {
  133. .type = IIO_PROXIMITY,
  134. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  135. .scan_index = MAX44000_SCAN_INDEX_PRX,
  136. .scan_type = {
  137. .sign = 'u',
  138. .realbits = 8,
  139. .storagebits = 16,
  140. }
  141. },
  142. IIO_CHAN_SOFT_TIMESTAMP(2),
  143. {
  144. .type = IIO_CURRENT,
  145. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  146. BIT(IIO_CHAN_INFO_SCALE),
  147. .extend_name = "led",
  148. .output = 1,
  149. .scan_index = -1,
  150. },
  151. };
  152. static int max44000_read_alstim(struct max44000_data *data)
  153. {
  154. unsigned int val;
  155. int ret;
  156. ret = regmap_read(data->regmap, MAX44000_REG_CFG_RX, &val);
  157. if (ret < 0)
  158. return ret;
  159. return (val & MAX44000_CFG_RX_ALSTIM_MASK) >> MAX44000_CFG_RX_ALSTIM_SHIFT;
  160. }
  161. static int max44000_write_alstim(struct max44000_data *data, int val)
  162. {
  163. return regmap_write_bits(data->regmap, MAX44000_REG_CFG_RX,
  164. MAX44000_CFG_RX_ALSTIM_MASK,
  165. val << MAX44000_CFG_RX_ALSTIM_SHIFT);
  166. }
  167. static int max44000_read_alspga(struct max44000_data *data)
  168. {
  169. unsigned int val;
  170. int ret;
  171. ret = regmap_read(data->regmap, MAX44000_REG_CFG_RX, &val);
  172. if (ret < 0)
  173. return ret;
  174. return (val & MAX44000_CFG_RX_ALSPGA_MASK) >> MAX44000_CFG_RX_ALSPGA_SHIFT;
  175. }
  176. static int max44000_write_alspga(struct max44000_data *data, int val)
  177. {
  178. return regmap_write_bits(data->regmap, MAX44000_REG_CFG_RX,
  179. MAX44000_CFG_RX_ALSPGA_MASK,
  180. val << MAX44000_CFG_RX_ALSPGA_SHIFT);
  181. }
  182. static int max44000_read_alsval(struct max44000_data *data)
  183. {
  184. u16 regval;
  185. __be16 val;
  186. int alstim, ret;
  187. ret = regmap_bulk_read(data->regmap, MAX44000_REG_ALS_DATA_HI,
  188. &val, sizeof(val));
  189. if (ret < 0)
  190. return ret;
  191. alstim = ret = max44000_read_alstim(data);
  192. if (ret < 0)
  193. return ret;
  194. regval = be16_to_cpu(val);
  195. /*
  196. * Overflow is explained on datasheet page 17.
  197. *
  198. * It's a warning that either the G or IR channel has become saturated
  199. * and that the value in the register is likely incorrect.
  200. *
  201. * The recommendation is to change the scale (ALSPGA).
  202. * The driver just returns the max representable value.
  203. */
  204. if (regval & MAX44000_ALSDATA_OVERFLOW)
  205. return 0x3FFF;
  206. return regval << MAX44000_ALSTIM_SHIFT(alstim);
  207. }
  208. static int max44000_write_led_current_raw(struct max44000_data *data, int val)
  209. {
  210. /* Maybe we should clamp the value instead? */
  211. if (val < 0 || val > MAX44000_LED_CURRENT_MAX)
  212. return -ERANGE;
  213. if (val >= 8)
  214. val += 4;
  215. return regmap_write_bits(data->regmap, MAX44000_REG_CFG_TX,
  216. MAX44000_LED_CURRENT_MASK, val);
  217. }
  218. static int max44000_read_led_current_raw(struct max44000_data *data)
  219. {
  220. unsigned int regval;
  221. int ret;
  222. ret = regmap_read(data->regmap, MAX44000_REG_CFG_TX, &regval);
  223. if (ret < 0)
  224. return ret;
  225. regval &= MAX44000_LED_CURRENT_MASK;
  226. if (regval >= 8)
  227. regval -= 4;
  228. return regval;
  229. }
  230. static int max44000_read_raw(struct iio_dev *indio_dev,
  231. struct iio_chan_spec const *chan,
  232. int *val, int *val2, long mask)
  233. {
  234. struct max44000_data *data = iio_priv(indio_dev);
  235. int alstim, alspga;
  236. unsigned int regval;
  237. int ret;
  238. switch (mask) {
  239. case IIO_CHAN_INFO_RAW:
  240. switch (chan->type) {
  241. case IIO_LIGHT:
  242. mutex_lock(&data->lock);
  243. ret = max44000_read_alsval(data);
  244. mutex_unlock(&data->lock);
  245. if (ret < 0)
  246. return ret;
  247. *val = ret;
  248. return IIO_VAL_INT;
  249. case IIO_PROXIMITY:
  250. mutex_lock(&data->lock);
  251. ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, &regval);
  252. mutex_unlock(&data->lock);
  253. if (ret < 0)
  254. return ret;
  255. *val = regval;
  256. return IIO_VAL_INT;
  257. case IIO_CURRENT:
  258. mutex_lock(&data->lock);
  259. ret = max44000_read_led_current_raw(data);
  260. mutex_unlock(&data->lock);
  261. if (ret < 0)
  262. return ret;
  263. *val = ret;
  264. return IIO_VAL_INT;
  265. default:
  266. return -EINVAL;
  267. }
  268. case IIO_CHAN_INFO_SCALE:
  269. switch (chan->type) {
  270. case IIO_CURRENT:
  271. /* Output register is in 10s of miliamps */
  272. *val = 10;
  273. return IIO_VAL_INT;
  274. case IIO_LIGHT:
  275. mutex_lock(&data->lock);
  276. alspga = ret = max44000_read_alspga(data);
  277. mutex_unlock(&data->lock);
  278. if (ret < 0)
  279. return ret;
  280. /* Avoid negative shifts */
  281. *val = (1 << MAX44000_ALSPGA_MAX_SHIFT);
  282. *val2 = MAX44000_ALS_TO_LUX_DEFAULT_FRACTION_LOG2
  283. + MAX44000_ALSPGA_MAX_SHIFT
  284. - max44000_alspga_shift[alspga];
  285. return IIO_VAL_FRACTIONAL_LOG2;
  286. default:
  287. return -EINVAL;
  288. }
  289. case IIO_CHAN_INFO_INT_TIME:
  290. mutex_lock(&data->lock);
  291. alstim = ret = max44000_read_alstim(data);
  292. mutex_unlock(&data->lock);
  293. if (ret < 0)
  294. return ret;
  295. *val = 0;
  296. *val2 = max44000_int_time_avail_ns_array[alstim];
  297. return IIO_VAL_INT_PLUS_NANO;
  298. default:
  299. return -EINVAL;
  300. }
  301. }
  302. static int max44000_write_raw(struct iio_dev *indio_dev,
  303. struct iio_chan_spec const *chan,
  304. int val, int val2, long mask)
  305. {
  306. struct max44000_data *data = iio_priv(indio_dev);
  307. int ret;
  308. if (mask == IIO_CHAN_INFO_RAW && chan->type == IIO_CURRENT) {
  309. mutex_lock(&data->lock);
  310. ret = max44000_write_led_current_raw(data, val);
  311. mutex_unlock(&data->lock);
  312. return ret;
  313. } else if (mask == IIO_CHAN_INFO_INT_TIME && chan->type == IIO_LIGHT) {
  314. s64 valns = val * NSEC_PER_SEC + val2;
  315. int alstim = find_closest_descending(valns,
  316. max44000_int_time_avail_ns_array,
  317. ARRAY_SIZE(max44000_int_time_avail_ns_array));
  318. mutex_lock(&data->lock);
  319. ret = max44000_write_alstim(data, alstim);
  320. mutex_unlock(&data->lock);
  321. return ret;
  322. } else if (mask == IIO_CHAN_INFO_SCALE && chan->type == IIO_LIGHT) {
  323. s64 valus = val * USEC_PER_SEC + val2;
  324. int alspga = find_closest(valus,
  325. max44000_scale_avail_ulux_array,
  326. ARRAY_SIZE(max44000_scale_avail_ulux_array));
  327. mutex_lock(&data->lock);
  328. ret = max44000_write_alspga(data, alspga);
  329. mutex_unlock(&data->lock);
  330. return ret;
  331. }
  332. return -EINVAL;
  333. }
  334. static int max44000_write_raw_get_fmt(struct iio_dev *indio_dev,
  335. struct iio_chan_spec const *chan,
  336. long mask)
  337. {
  338. if (mask == IIO_CHAN_INFO_INT_TIME && chan->type == IIO_LIGHT)
  339. return IIO_VAL_INT_PLUS_NANO;
  340. else if (mask == IIO_CHAN_INFO_SCALE && chan->type == IIO_LIGHT)
  341. return IIO_VAL_INT_PLUS_MICRO;
  342. else
  343. return IIO_VAL_INT;
  344. }
  345. static IIO_CONST_ATTR(illuminance_integration_time_available, max44000_int_time_avail_str);
  346. static IIO_CONST_ATTR(illuminance_scale_available, max44000_scale_avail_str);
  347. static struct attribute *max44000_attributes[] = {
  348. &iio_const_attr_illuminance_integration_time_available.dev_attr.attr,
  349. &iio_const_attr_illuminance_scale_available.dev_attr.attr,
  350. NULL
  351. };
  352. static const struct attribute_group max44000_attribute_group = {
  353. .attrs = max44000_attributes,
  354. };
  355. static const struct iio_info max44000_info = {
  356. .read_raw = max44000_read_raw,
  357. .write_raw = max44000_write_raw,
  358. .write_raw_get_fmt = max44000_write_raw_get_fmt,
  359. .attrs = &max44000_attribute_group,
  360. };
  361. static bool max44000_readable_reg(struct device *dev, unsigned int reg)
  362. {
  363. switch (reg) {
  364. case MAX44000_REG_STATUS:
  365. case MAX44000_REG_CFG_MAIN:
  366. case MAX44000_REG_CFG_RX:
  367. case MAX44000_REG_CFG_TX:
  368. case MAX44000_REG_ALS_DATA_HI:
  369. case MAX44000_REG_ALS_DATA_LO:
  370. case MAX44000_REG_PRX_DATA:
  371. case MAX44000_REG_ALS_UPTHR_HI:
  372. case MAX44000_REG_ALS_UPTHR_LO:
  373. case MAX44000_REG_ALS_LOTHR_HI:
  374. case MAX44000_REG_ALS_LOTHR_LO:
  375. case MAX44000_REG_PST:
  376. case MAX44000_REG_PRX_IND:
  377. case MAX44000_REG_PRX_THR:
  378. case MAX44000_REG_TRIM_GAIN_GREEN:
  379. case MAX44000_REG_TRIM_GAIN_IR:
  380. return true;
  381. default:
  382. return false;
  383. }
  384. }
  385. static bool max44000_writeable_reg(struct device *dev, unsigned int reg)
  386. {
  387. switch (reg) {
  388. case MAX44000_REG_CFG_MAIN:
  389. case MAX44000_REG_CFG_RX:
  390. case MAX44000_REG_CFG_TX:
  391. case MAX44000_REG_ALS_UPTHR_HI:
  392. case MAX44000_REG_ALS_UPTHR_LO:
  393. case MAX44000_REG_ALS_LOTHR_HI:
  394. case MAX44000_REG_ALS_LOTHR_LO:
  395. case MAX44000_REG_PST:
  396. case MAX44000_REG_PRX_IND:
  397. case MAX44000_REG_PRX_THR:
  398. case MAX44000_REG_TRIM_GAIN_GREEN:
  399. case MAX44000_REG_TRIM_GAIN_IR:
  400. return true;
  401. default:
  402. return false;
  403. }
  404. }
  405. static bool max44000_volatile_reg(struct device *dev, unsigned int reg)
  406. {
  407. switch (reg) {
  408. case MAX44000_REG_STATUS:
  409. case MAX44000_REG_ALS_DATA_HI:
  410. case MAX44000_REG_ALS_DATA_LO:
  411. case MAX44000_REG_PRX_DATA:
  412. return true;
  413. default:
  414. return false;
  415. }
  416. }
  417. static bool max44000_precious_reg(struct device *dev, unsigned int reg)
  418. {
  419. return reg == MAX44000_REG_STATUS;
  420. }
  421. static const struct regmap_config max44000_regmap_config = {
  422. .reg_bits = 8,
  423. .val_bits = 8,
  424. .max_register = MAX44000_REG_PRX_DATA,
  425. .readable_reg = max44000_readable_reg,
  426. .writeable_reg = max44000_writeable_reg,
  427. .volatile_reg = max44000_volatile_reg,
  428. .precious_reg = max44000_precious_reg,
  429. .use_single_read = true,
  430. .use_single_write = true,
  431. .cache_type = REGCACHE_RBTREE,
  432. };
  433. static irqreturn_t max44000_trigger_handler(int irq, void *p)
  434. {
  435. struct iio_poll_func *pf = p;
  436. struct iio_dev *indio_dev = pf->indio_dev;
  437. struct max44000_data *data = iio_priv(indio_dev);
  438. int index = 0;
  439. unsigned int regval;
  440. int ret;
  441. mutex_lock(&data->lock);
  442. if (test_bit(MAX44000_SCAN_INDEX_ALS, indio_dev->active_scan_mask)) {
  443. ret = max44000_read_alsval(data);
  444. if (ret < 0)
  445. goto out_unlock;
  446. data->scan.channels[index++] = ret;
  447. }
  448. if (test_bit(MAX44000_SCAN_INDEX_PRX, indio_dev->active_scan_mask)) {
  449. ret = regmap_read(data->regmap, MAX44000_REG_PRX_DATA, &regval);
  450. if (ret < 0)
  451. goto out_unlock;
  452. data->scan.channels[index] = regval;
  453. }
  454. mutex_unlock(&data->lock);
  455. iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
  456. iio_get_time_ns(indio_dev));
  457. iio_trigger_notify_done(indio_dev->trig);
  458. return IRQ_HANDLED;
  459. out_unlock:
  460. mutex_unlock(&data->lock);
  461. iio_trigger_notify_done(indio_dev->trig);
  462. return IRQ_HANDLED;
  463. }
  464. static int max44000_probe(struct i2c_client *client)
  465. {
  466. struct max44000_data *data;
  467. struct iio_dev *indio_dev;
  468. int ret, reg;
  469. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  470. if (!indio_dev)
  471. return -ENOMEM;
  472. data = iio_priv(indio_dev);
  473. data->regmap = devm_regmap_init_i2c(client, &max44000_regmap_config);
  474. if (IS_ERR(data->regmap)) {
  475. dev_err(&client->dev, "regmap_init failed!\n");
  476. return PTR_ERR(data->regmap);
  477. }
  478. mutex_init(&data->lock);
  479. indio_dev->info = &max44000_info;
  480. indio_dev->name = MAX44000_DRV_NAME;
  481. indio_dev->channels = max44000_channels;
  482. indio_dev->num_channels = ARRAY_SIZE(max44000_channels);
  483. /*
  484. * The device doesn't have a reset function so we just clear some
  485. * important bits at probe time to ensure sane operation.
  486. *
  487. * Since we don't support interrupts/events the threshold values are
  488. * not important. We also don't touch trim values.
  489. */
  490. /* Reset ALS scaling bits */
  491. ret = regmap_write(data->regmap, MAX44000_REG_CFG_RX,
  492. MAX44000_REG_CFG_RX_DEFAULT);
  493. if (ret < 0) {
  494. dev_err(&client->dev, "failed to write default CFG_RX: %d\n",
  495. ret);
  496. return ret;
  497. }
  498. /*
  499. * By default the LED pulse used for the proximity sensor is disabled.
  500. * Set a middle value so that we get some sort of valid data by default.
  501. */
  502. ret = max44000_write_led_current_raw(data, MAX44000_LED_CURRENT_DEFAULT);
  503. if (ret < 0) {
  504. dev_err(&client->dev, "failed to write init config: %d\n", ret);
  505. return ret;
  506. }
  507. /* Reset CFG bits to ALS_PRX mode which allows easy reading of both values. */
  508. reg = MAX44000_CFG_TRIM | MAX44000_CFG_MODE_ALS_PRX;
  509. ret = regmap_write(data->regmap, MAX44000_REG_CFG_MAIN, reg);
  510. if (ret < 0) {
  511. dev_err(&client->dev, "failed to write init config: %d\n", ret);
  512. return ret;
  513. }
  514. /* Read status at least once to clear any stale interrupt bits. */
  515. ret = regmap_read(data->regmap, MAX44000_REG_STATUS, &reg);
  516. if (ret < 0) {
  517. dev_err(&client->dev, "failed to read init status: %d\n", ret);
  518. return ret;
  519. }
  520. ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL,
  521. max44000_trigger_handler, NULL);
  522. if (ret < 0) {
  523. dev_err(&client->dev, "iio triggered buffer setup failed\n");
  524. return ret;
  525. }
  526. return devm_iio_device_register(&client->dev, indio_dev);
  527. }
  528. static const struct i2c_device_id max44000_id[] = {
  529. { "max44000" },
  530. { }
  531. };
  532. MODULE_DEVICE_TABLE(i2c, max44000_id);
  533. static const struct acpi_device_id max44000_acpi_match[] = {
  534. {"MAX44000", 0},
  535. { }
  536. };
  537. MODULE_DEVICE_TABLE(acpi, max44000_acpi_match);
  538. static struct i2c_driver max44000_driver = {
  539. .driver = {
  540. .name = MAX44000_DRV_NAME,
  541. .acpi_match_table = max44000_acpi_match,
  542. },
  543. .probe = max44000_probe,
  544. .id_table = max44000_id,
  545. };
  546. module_i2c_driver(max44000_driver);
  547. MODULE_AUTHOR("Crestez Dan Leonard <leonard.crestez@intel.com>");
  548. MODULE_DESCRIPTION("MAX44000 Ambient and Infrared Proximity Sensor");
  549. MODULE_LICENSE("GPL v2");