bmp280.h 14 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #include <linux/bitops.h>
  3. #include <linux/device.h>
  4. #include <linux/regmap.h>
  5. #include <linux/regulator/consumer.h>
  6. #include <linux/iio/iio.h>
  7. /* BMP580 specific registers */
  8. #define BMP580_REG_CMD 0x7E
  9. #define BMP580_REG_EFF_OSR 0x38
  10. #define BMP580_REG_ODR_CONFIG 0x37
  11. #define BMP580_REG_OSR_CONFIG 0x36
  12. #define BMP580_REG_IF_CONFIG 0x13
  13. #define BMP580_REG_REV_ID 0x02
  14. #define BMP580_REG_CHIP_ID 0x01
  15. /* OOR allows to configure a pressure alarm */
  16. #define BMP580_REG_OOR_CONFIG 0x35
  17. #define BMP580_REG_OOR_RANGE 0x34
  18. #define BMP580_REG_OOR_THR_MSB 0x33
  19. #define BMP580_REG_OOR_THR_LSB 0x32
  20. /* DSP registers (IIR filters) */
  21. #define BMP580_REG_DSP_IIR 0x31
  22. #define BMP580_REG_DSP_CONFIG 0x30
  23. /* NVM access registers */
  24. #define BMP580_REG_NVM_DATA_MSB 0x2D
  25. #define BMP580_REG_NVM_DATA_LSB 0x2C
  26. #define BMP580_REG_NVM_ADDR 0x2B
  27. /* Status registers */
  28. #define BMP580_REG_STATUS 0x28
  29. #define BMP580_REG_INT_STATUS 0x27
  30. #define BMP580_REG_CHIP_STATUS 0x11
  31. /* Data registers */
  32. #define BMP580_REG_FIFO_DATA 0x29
  33. #define BMP580_REG_PRESS_MSB 0x22
  34. #define BMP580_REG_PRESS_LSB 0x21
  35. #define BMP580_REG_PRESS_XLSB 0x20
  36. #define BMP580_REG_TEMP_MSB 0x1F
  37. #define BMP580_REG_TEMP_LSB 0x1E
  38. #define BMP580_REG_TEMP_XLSB 0x1D
  39. /* FIFO config registers */
  40. #define BMP580_REG_FIFO_SEL 0x18
  41. #define BMP580_REG_FIFO_COUNT 0x17
  42. #define BMP580_REG_FIFO_CONFIG 0x16
  43. /* Interruptions config registers */
  44. #define BMP580_REG_INT_SOURCE 0x15
  45. #define BMP580_REG_INT_CONFIG 0x14
  46. #define BMP580_CMD_NOOP 0x00
  47. #define BMP580_CMD_EXTMODE_SEQ_0 0x73
  48. #define BMP580_CMD_EXTMODE_SEQ_1 0xB4
  49. #define BMP580_CMD_EXTMODE_SEQ_2 0x69
  50. #define BMP580_CMD_NVM_OP_SEQ_0 0x5D
  51. #define BMP580_CMD_NVM_READ_SEQ_1 0xA5
  52. #define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0
  53. #define BMP580_CMD_SOFT_RESET 0xB6
  54. #define BMP580_INT_STATUS_POR_MASK BIT(4)
  55. #define BMP580_STATUS_CORE_RDY_MASK BIT(0)
  56. #define BMP580_STATUS_NVM_RDY_MASK BIT(1)
  57. #define BMP580_STATUS_NVM_ERR_MASK BIT(2)
  58. #define BMP580_STATUS_NVM_CMD_ERR_MASK BIT(3)
  59. #define BMP580_OSR_PRESS_MASK GENMASK(5, 3)
  60. #define BMP580_OSR_TEMP_MASK GENMASK(2, 0)
  61. #define BMP580_OSR_PRESS_EN BIT(6)
  62. #define BMP580_EFF_OSR_PRESS_MASK GENMASK(5, 3)
  63. #define BMP580_EFF_OSR_TEMP_MASK GENMASK(2, 0)
  64. #define BMP580_EFF_OSR_VALID_ODR BIT(7)
  65. #define BMP580_ODR_MASK GENMASK(6, 2)
  66. #define BMP580_MODE_MASK GENMASK(1, 0)
  67. #define BMP580_MODE_SLEEP 0
  68. #define BMP580_MODE_NORMAL 1
  69. #define BMP580_MODE_FORCED 2
  70. #define BMP580_MODE_CONTINOUS 3
  71. #define BMP580_ODR_DEEPSLEEP_DIS BIT(7)
  72. #define BMP580_DSP_COMP_MASK GENMASK(1, 0)
  73. #define BMP580_DSP_COMP_DIS 0
  74. #define BMP580_DSP_TEMP_COMP_EN 1
  75. /*
  76. * In section 7.27 of datasheet, modes 2 and 3 are technically the same.
  77. * Pressure compensation means also enabling temperature compensation
  78. */
  79. #define BMP580_DSP_PRESS_COMP_EN 2
  80. #define BMP580_DSP_PRESS_TEMP_COMP_EN 3
  81. #define BMP580_DSP_IIR_FORCED_FLUSH BIT(2)
  82. #define BMP580_DSP_SHDW_IIR_TEMP_EN BIT(3)
  83. #define BMP580_DSP_FIFO_IIR_TEMP_EN BIT(4)
  84. #define BMP580_DSP_SHDW_IIR_PRESS_EN BIT(5)
  85. #define BMP580_DSP_FIFO_IIR_PRESS_EN BIT(6)
  86. #define BMP580_DSP_OOR_IIR_PRESS_EN BIT(7)
  87. #define BMP580_DSP_IIR_PRESS_MASK GENMASK(5, 3)
  88. #define BMP580_DSP_IIR_TEMP_MASK GENMASK(2, 0)
  89. #define BMP580_FILTER_OFF 0
  90. #define BMP580_FILTER_1X 1
  91. #define BMP580_FILTER_3X 2
  92. #define BMP580_FILTER_7X 3
  93. #define BMP580_FILTER_15X 4
  94. #define BMP580_FILTER_31X 5
  95. #define BMP580_FILTER_63X 6
  96. #define BMP580_FILTER_127X 7
  97. #define BMP580_NVM_ROW_ADDR_MASK GENMASK(5, 0)
  98. #define BMP580_NVM_PROG_EN BIT(6)
  99. #define BMP580_TEMP_SKIPPED 0x7f7f7f
  100. #define BMP580_PRESS_SKIPPED 0x7f7f7f
  101. /* BMP380 specific registers */
  102. #define BMP380_REG_CMD 0x7E
  103. #define BMP380_REG_CONFIG 0x1F
  104. #define BMP380_REG_ODR 0x1D
  105. #define BMP380_REG_OSR 0x1C
  106. #define BMP380_REG_POWER_CONTROL 0x1B
  107. #define BMP380_REG_IF_CONFIG 0x1A
  108. #define BMP380_REG_INT_CONTROL 0x19
  109. #define BMP380_REG_INT_STATUS 0x11
  110. #define BMP380_REG_EVENT 0x10
  111. #define BMP380_REG_STATUS 0x03
  112. #define BMP380_REG_ERROR 0x02
  113. #define BMP380_REG_ID 0x00
  114. #define BMP380_REG_FIFO_CONFIG_1 0x18
  115. #define BMP380_REG_FIFO_CONFIG_2 0x17
  116. #define BMP380_REG_FIFO_WATERMARK_MSB 0x16
  117. #define BMP380_REG_FIFO_WATERMARK_LSB 0x15
  118. #define BMP380_REG_FIFO_DATA 0x14
  119. #define BMP380_REG_FIFO_LENGTH_MSB 0x13
  120. #define BMP380_REG_FIFO_LENGTH_LSB 0x12
  121. #define BMP380_REG_SENSOR_TIME_MSB 0x0E
  122. #define BMP380_REG_SENSOR_TIME_LSB 0x0D
  123. #define BMP380_REG_SENSOR_TIME_XLSB 0x0C
  124. #define BMP380_REG_TEMP_MSB 0x09
  125. #define BMP380_REG_TEMP_LSB 0x08
  126. #define BMP380_REG_TEMP_XLSB 0x07
  127. #define BMP380_REG_PRESS_MSB 0x06
  128. #define BMP380_REG_PRESS_LSB 0x05
  129. #define BMP380_REG_PRESS_XLSB 0x04
  130. #define BMP380_REG_CALIB_TEMP_START 0x31
  131. #define BMP380_CALIB_REG_COUNT 21
  132. #define BMP380_FILTER_MASK GENMASK(3, 1)
  133. #define BMP380_FILTER_OFF 0
  134. #define BMP380_FILTER_1X 1
  135. #define BMP380_FILTER_3X 2
  136. #define BMP380_FILTER_7X 3
  137. #define BMP380_FILTER_15X 4
  138. #define BMP380_FILTER_31X 5
  139. #define BMP380_FILTER_63X 6
  140. #define BMP380_FILTER_127X 7
  141. #define BMP380_OSRS_TEMP_MASK GENMASK(5, 3)
  142. #define BMP380_OSRS_PRESS_MASK GENMASK(2, 0)
  143. #define BMP380_ODRS_MASK GENMASK(4, 0)
  144. #define BMP380_CTRL_SENSORS_MASK GENMASK(1, 0)
  145. #define BMP380_CTRL_SENSORS_PRESS_EN BIT(0)
  146. #define BMP380_CTRL_SENSORS_TEMP_EN BIT(1)
  147. #define BMP380_MODE_MASK GENMASK(5, 4)
  148. #define BMP380_MODE_SLEEP 0
  149. #define BMP380_MODE_FORCED 1
  150. #define BMP380_MODE_NORMAL 3
  151. #define BMP380_MIN_TEMP -4000
  152. #define BMP380_MAX_TEMP 8500
  153. #define BMP380_MIN_PRES 3000000
  154. #define BMP380_MAX_PRES 12500000
  155. #define BMP380_CMD_NOOP 0x00
  156. #define BMP380_CMD_EXTMODE_EN_MID 0x34
  157. #define BMP380_CMD_FIFO_FLUSH 0xB0
  158. #define BMP380_CMD_SOFT_RESET 0xB6
  159. #define BMP380_STATUS_CMD_RDY_MASK BIT(4)
  160. #define BMP380_STATUS_DRDY_PRESS_MASK BIT(5)
  161. #define BMP380_STATUS_DRDY_TEMP_MASK BIT(6)
  162. #define BMP380_ERR_FATAL_MASK BIT(0)
  163. #define BMP380_ERR_CMD_MASK BIT(1)
  164. #define BMP380_ERR_CONF_MASK BIT(2)
  165. #define BMP380_TEMP_SKIPPED 0x800000
  166. #define BMP380_PRESS_SKIPPED 0x800000
  167. /* BMP280 specific registers */
  168. #define BMP280_REG_TEMP_XLSB 0xFC
  169. #define BMP280_REG_TEMP_LSB 0xFB
  170. #define BMP280_REG_TEMP_MSB 0xFA
  171. #define BMP280_REG_PRESS_XLSB 0xF9
  172. #define BMP280_REG_PRESS_LSB 0xF8
  173. #define BMP280_REG_PRESS_MSB 0xF7
  174. /* Helper mask to truncate excess 4 bits on pressure and temp readings */
  175. #define BMP280_MEAS_TRIM_MASK GENMASK(24, 4)
  176. #define BMP280_REG_CONFIG 0xF5
  177. #define BMP280_REG_CTRL_MEAS 0xF4
  178. #define BMP280_REG_STATUS 0xF3
  179. #define BMP280_REG_COMP_TEMP_START 0x88
  180. #define BMP280_COMP_TEMP_REG_COUNT 6
  181. #define BMP280_REG_COMP_PRESS_START 0x8E
  182. #define BMP280_COMP_PRESS_REG_COUNT 18
  183. #define BMP280_CONTIGUOUS_CALIB_REGS (BMP280_COMP_TEMP_REG_COUNT + \
  184. BMP280_COMP_PRESS_REG_COUNT)
  185. #define BMP280_FILTER_MASK GENMASK(4, 2)
  186. #define BMP280_FILTER_OFF 0
  187. #define BMP280_FILTER_2X 1
  188. #define BMP280_FILTER_4X 2
  189. #define BMP280_FILTER_8X 3
  190. #define BMP280_FILTER_16X 4
  191. #define BMP280_OSRS_TEMP_MASK GENMASK(7, 5)
  192. #define BMP280_OSRS_TEMP_SKIP 0
  193. #define BMP280_OSRS_TEMP_1X 1
  194. #define BMP280_OSRS_TEMP_2X 2
  195. #define BMP280_OSRS_TEMP_4X 3
  196. #define BMP280_OSRS_TEMP_8X 4
  197. #define BMP280_OSRS_TEMP_16X 5
  198. #define BMP280_OSRS_PRESS_MASK GENMASK(4, 2)
  199. #define BMP280_OSRS_PRESS_SKIP 0
  200. #define BMP280_OSRS_PRESS_1X 1
  201. #define BMP280_OSRS_PRESS_2X 2
  202. #define BMP280_OSRS_PRESS_4X 3
  203. #define BMP280_OSRS_PRESS_8X 4
  204. #define BMP280_OSRS_PRESS_16X 5
  205. #define BMP280_MODE_MASK GENMASK(1, 0)
  206. #define BMP280_MODE_SLEEP 0
  207. #define BMP280_MODE_FORCED 1
  208. #define BMP280_MODE_NORMAL 3
  209. /* BME280 specific registers */
  210. #define BME280_REG_HUMIDITY_LSB 0xFE
  211. #define BME280_REG_HUMIDITY_MSB 0xFD
  212. #define BME280_REG_CTRL_HUMIDITY 0xF2
  213. /* Due to non linear mapping, and data sizes we can't do a bulk read */
  214. #define BME280_REG_COMP_H1 0xA1
  215. #define BME280_REG_COMP_H2 0xE1
  216. #define BME280_REG_COMP_H3 0xE3
  217. #define BME280_REG_COMP_H4 0xE4
  218. #define BME280_REG_COMP_H5 0xE5
  219. #define BME280_REG_COMP_H6 0xE7
  220. #define BME280_COMP_H5_MASK GENMASK(15, 4)
  221. #define BME280_OSRS_HUMIDITY_MASK GENMASK(2, 0)
  222. #define BME280_OSRS_HUMIDITY_SKIP 0
  223. #define BME280_OSRS_HUMIDITY_1X 1
  224. #define BME280_OSRS_HUMIDITY_2X 2
  225. #define BME280_OSRS_HUMIDITY_4X 3
  226. #define BME280_OSRS_HUMIDITY_8X 4
  227. #define BME280_OSRS_HUMIDITY_16X 5
  228. /* BMP180 specific registers */
  229. #define BMP180_REG_OUT_XLSB 0xF8
  230. #define BMP180_REG_OUT_LSB 0xF7
  231. #define BMP180_REG_OUT_MSB 0xF6
  232. #define BMP180_REG_CALIB_START 0xAA
  233. #define BMP180_REG_CALIB_COUNT 22
  234. #define BMP180_MEAS_CTRL_MASK GENMASK(4, 0)
  235. #define BMP180_MEAS_TEMP 0x0E
  236. #define BMP180_MEAS_PRESS 0x14
  237. #define BMP180_MEAS_SCO BIT(5)
  238. #define BMP180_OSRS_PRESS_MASK GENMASK(7, 6)
  239. #define BMP180_MEAS_PRESS_1X 0
  240. #define BMP180_MEAS_PRESS_2X 1
  241. #define BMP180_MEAS_PRESS_4X 2
  242. #define BMP180_MEAS_PRESS_8X 3
  243. /* BMP180 and BMP280 common registers */
  244. #define BMP280_REG_CTRL_MEAS 0xF4
  245. #define BMP280_REG_RESET 0xE0
  246. #define BMP280_REG_ID 0xD0
  247. #define BMP380_CHIP_ID 0x50
  248. #define BMP580_CHIP_ID 0x50
  249. #define BMP580_CHIP_ID_ALT 0x51
  250. #define BMP180_CHIP_ID 0x55
  251. #define BMP280_CHIP_ID 0x58
  252. #define BMP390_CHIP_ID 0x60
  253. #define BME280_CHIP_ID 0x60
  254. #define BMP280_SOFT_RESET_VAL 0xB6
  255. /* BMP280 register skipped special values */
  256. #define BMP280_TEMP_SKIPPED 0x80000
  257. #define BMP280_PRESS_SKIPPED 0x80000
  258. #define BMP280_HUMIDITY_SKIPPED 0x8000
  259. /* Number of bytes for each value */
  260. #define BMP280_NUM_PRESS_BYTES 3
  261. #define BMP280_NUM_TEMP_BYTES 3
  262. #define BME280_NUM_HUMIDITY_BYTES 2
  263. #define BMP280_BURST_READ_BYTES (BMP280_NUM_PRESS_BYTES + \
  264. BMP280_NUM_TEMP_BYTES)
  265. #define BME280_BURST_READ_BYTES (BMP280_NUM_PRESS_BYTES + \
  266. BMP280_NUM_TEMP_BYTES + \
  267. BME280_NUM_HUMIDITY_BYTES)
  268. /* Core exported structs */
  269. static const char *const bmp280_supply_names[] = {
  270. "vddd", "vdda"
  271. };
  272. #define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names)
  273. struct bmp180_calib {
  274. s16 AC1;
  275. s16 AC2;
  276. s16 AC3;
  277. u16 AC4;
  278. u16 AC5;
  279. u16 AC6;
  280. s16 B1;
  281. s16 B2;
  282. s16 MB;
  283. s16 MC;
  284. s16 MD;
  285. };
  286. /* See datasheet Section 4.2.2. */
  287. struct bmp280_calib {
  288. u16 T1;
  289. s16 T2;
  290. s16 T3;
  291. u16 P1;
  292. s16 P2;
  293. s16 P3;
  294. s16 P4;
  295. s16 P5;
  296. s16 P6;
  297. s16 P7;
  298. s16 P8;
  299. s16 P9;
  300. u8 H1;
  301. s16 H2;
  302. u8 H3;
  303. s16 H4;
  304. s16 H5;
  305. s8 H6;
  306. };
  307. /* See datasheet Section 3.11.1. */
  308. struct bmp380_calib {
  309. u16 T1;
  310. u16 T2;
  311. s8 T3;
  312. s16 P1;
  313. s16 P2;
  314. s8 P3;
  315. s8 P4;
  316. u16 P5;
  317. u16 P6;
  318. s8 P7;
  319. s8 P8;
  320. s16 P9;
  321. s8 P10;
  322. s8 P11;
  323. };
  324. struct bmp280_data {
  325. struct device *dev;
  326. struct mutex lock;
  327. struct regmap *regmap;
  328. struct completion done;
  329. bool use_eoc;
  330. const struct bmp280_chip_info *chip_info;
  331. union {
  332. struct bmp180_calib bmp180;
  333. struct bmp280_calib bmp280;
  334. struct bmp380_calib bmp380;
  335. } calib;
  336. struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES];
  337. unsigned int start_up_time; /* in microseconds */
  338. /* log of base 2 of oversampling rate */
  339. u8 oversampling_press;
  340. u8 oversampling_temp;
  341. u8 oversampling_humid;
  342. u8 iir_filter_coeff;
  343. /*
  344. * BMP380 devices introduce sampling frequency configuration. See
  345. * datasheet sections 3.3.3. and 4.3.19 for more details.
  346. *
  347. * BMx280 devices allowed indirect configuration of sampling frequency
  348. * changing the t_standby duration between measurements, as detailed on
  349. * section 3.6.3 of the datasheet.
  350. */
  351. int sampling_freq;
  352. /*
  353. * Data to push to userspace triggered buffer. Up to 3 channels and
  354. * s64 timestamp, aligned.
  355. */
  356. s32 sensor_data[6] __aligned(8);
  357. /*
  358. * DMA (thus cache coherency maintenance) may require the
  359. * transfer buffers to live in their own cache lines.
  360. */
  361. union {
  362. /* Sensor data buffer */
  363. u8 buf[BME280_BURST_READ_BYTES];
  364. /* Calibration data buffers */
  365. __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2];
  366. __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2];
  367. u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT];
  368. /* Miscellaneous, endianness-aware data buffers */
  369. __le16 le16;
  370. __be16 be16;
  371. } __aligned(IIO_DMA_MINALIGN);
  372. };
  373. struct bmp280_chip_info {
  374. unsigned int id_reg;
  375. const u8 *chip_id;
  376. int num_chip_id;
  377. const struct regmap_config *regmap_config;
  378. bool spi_read_extra_byte;
  379. const struct iio_chan_spec *channels;
  380. int num_channels;
  381. unsigned int start_up_time;
  382. const unsigned long *avail_scan_masks;
  383. const int *oversampling_temp_avail;
  384. int num_oversampling_temp_avail;
  385. int oversampling_temp_default;
  386. const int *oversampling_press_avail;
  387. int num_oversampling_press_avail;
  388. int oversampling_press_default;
  389. const int *oversampling_humid_avail;
  390. int num_oversampling_humid_avail;
  391. int oversampling_humid_default;
  392. const int *iir_filter_coeffs_avail;
  393. int num_iir_filter_coeffs_avail;
  394. int iir_filter_coeff_default;
  395. const int (*sampling_freq_avail)[2];
  396. int num_sampling_freq_avail;
  397. int sampling_freq_default;
  398. const int *temp_coeffs;
  399. const int temp_coeffs_type;
  400. const int *press_coeffs;
  401. const int press_coeffs_type;
  402. const int *humid_coeffs;
  403. const int humid_coeffs_type;
  404. int (*chip_config)(struct bmp280_data *data);
  405. int (*read_temp)(struct bmp280_data *data, s32 *adc_temp);
  406. int (*read_press)(struct bmp280_data *data, u32 *adc_press);
  407. int (*read_humid)(struct bmp280_data *data, u32 *adc_humidity);
  408. int (*read_calib)(struct bmp280_data *data);
  409. int (*preinit)(struct bmp280_data *data);
  410. irqreturn_t (*trigger_handler)(int irq, void *p);
  411. };
  412. /* Chip infos for each variant */
  413. extern const struct bmp280_chip_info bmp180_chip_info;
  414. extern const struct bmp280_chip_info bmp280_chip_info;
  415. extern const struct bmp280_chip_info bme280_chip_info;
  416. extern const struct bmp280_chip_info bmp380_chip_info;
  417. extern const struct bmp280_chip_info bmp580_chip_info;
  418. /* Regmap configurations */
  419. extern const struct regmap_config bmp180_regmap_config;
  420. extern const struct regmap_config bmp280_regmap_config;
  421. extern const struct regmap_config bme280_regmap_config;
  422. extern const struct regmap_config bmp380_regmap_config;
  423. extern const struct regmap_config bmp580_regmap_config;
  424. /* Probe called from different transports */
  425. int bmp280_common_probe(struct device *dev,
  426. struct regmap *regmap,
  427. const struct bmp280_chip_info *chip_info,
  428. const char *name,
  429. int irq);
  430. /* PM ops */
  431. extern const struct dev_pm_ops bmp280_dev_pm_ops;