pcc.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2014 Linaro Ltd.
  4. * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
  5. *
  6. * PCC (Platform Communication Channel) is defined in the ACPI 5.0+
  7. * specification. It is a mailbox like mechanism to allow clients
  8. * such as CPPC (Collaborative Processor Performance Control), RAS
  9. * (Reliability, Availability and Serviceability) and MPST (Memory
  10. * Node Power State Table) to talk to the platform (e.g. BMC) through
  11. * shared memory regions as defined in the PCC table entries. The PCC
  12. * specification supports a Doorbell mechanism for the PCC clients
  13. * to notify the platform about new data. This Doorbell information
  14. * is also specified in each PCC table entry.
  15. *
  16. * Typical high level flow of operation is:
  17. *
  18. * PCC Reads:
  19. * * Client tries to acquire a channel lock.
  20. * * After it is acquired it writes READ cmd in communication region cmd
  21. * address.
  22. * * Client issues mbox_send_message() which rings the PCC doorbell
  23. * for its PCC channel.
  24. * * If command completes, then client has control over channel and
  25. * it can proceed with its reads.
  26. * * Client releases lock.
  27. *
  28. * PCC Writes:
  29. * * Client tries to acquire channel lock.
  30. * * Client writes to its communication region after it acquires a
  31. * channel lock.
  32. * * Client writes WRITE cmd in communication region cmd address.
  33. * * Client issues mbox_send_message() which rings the PCC doorbell
  34. * for its PCC channel.
  35. * * If command completes, then writes have succeeded and it can release
  36. * the channel lock.
  37. *
  38. * There is a Nominal latency defined for each channel which indicates
  39. * how long to wait until a command completes. If command is not complete
  40. * the client needs to retry or assume failure.
  41. *
  42. * For more details about PCC, please see the ACPI specification from
  43. * http://www.uefi.org/ACPIv5.1 Section 14.
  44. *
  45. * This file implements PCC as a Mailbox controller and allows for PCC
  46. * clients to be implemented as its Mailbox Client Channels.
  47. */
  48. #include <linux/acpi.h>
  49. #include <linux/delay.h>
  50. #include <linux/io.h>
  51. #include <linux/init.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/list.h>
  54. #include <linux/log2.h>
  55. #include <linux/platform_device.h>
  56. #include <linux/mailbox_controller.h>
  57. #include <linux/mailbox_client.h>
  58. #include <linux/io-64-nonatomic-lo-hi.h>
  59. #include <acpi/pcc.h>
  60. #include "mailbox.h"
  61. #define MBOX_IRQ_NAME "pcc-mbox"
  62. /**
  63. * struct pcc_chan_reg - PCC register bundle
  64. *
  65. * @vaddr: cached virtual address for this register
  66. * @gas: pointer to the generic address structure for this register
  67. * @preserve_mask: bitmask to preserve when writing to this register
  68. * @set_mask: bitmask to set when writing to this register
  69. * @status_mask: bitmask to determine and/or update the status for this register
  70. */
  71. struct pcc_chan_reg {
  72. void __iomem *vaddr;
  73. struct acpi_generic_address *gas;
  74. u64 preserve_mask;
  75. u64 set_mask;
  76. u64 status_mask;
  77. };
  78. /**
  79. * struct pcc_chan_info - PCC channel specific information
  80. *
  81. * @chan: PCC channel information with Shared Memory Region info
  82. * @db: PCC register bundle for the doorbell register
  83. * @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge
  84. * register
  85. * @cmd_complete: PCC register bundle for the command complete check register
  86. * @cmd_update: PCC register bundle for the command complete update register
  87. * @error: PCC register bundle for the error status register
  88. * @plat_irq: platform interrupt
  89. * @type: PCC subspace type
  90. * @plat_irq_flags: platform interrupt flags
  91. * @chan_in_use: this flag is used just to check if the interrupt needs
  92. * handling when it is shared. Since only one transfer can occur
  93. * at a time and mailbox takes care of locking, this flag can be
  94. * accessed without a lock. Note: the type only support the
  95. * communication from OSPM to Platform, like type3, use it, and
  96. * other types completely ignore it.
  97. */
  98. struct pcc_chan_info {
  99. struct pcc_mbox_chan chan;
  100. struct pcc_chan_reg db;
  101. struct pcc_chan_reg plat_irq_ack;
  102. struct pcc_chan_reg cmd_complete;
  103. struct pcc_chan_reg cmd_update;
  104. struct pcc_chan_reg error;
  105. int plat_irq;
  106. u8 type;
  107. unsigned int plat_irq_flags;
  108. bool chan_in_use;
  109. };
  110. #define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan)
  111. static struct pcc_chan_info *chan_info;
  112. static int pcc_chan_count;
  113. static int pcc_send_data(struct mbox_chan *chan, void *data);
  114. /*
  115. * PCC can be used with perf critical drivers such as CPPC
  116. * So it makes sense to locally cache the virtual address and
  117. * use it to read/write to PCC registers such as doorbell register
  118. *
  119. * The below read_register and write_registers are used to read and
  120. * write from perf critical registers such as PCC doorbell register
  121. */
  122. static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
  123. {
  124. switch (bit_width) {
  125. case 8:
  126. *val = readb(vaddr);
  127. break;
  128. case 16:
  129. *val = readw(vaddr);
  130. break;
  131. case 32:
  132. *val = readl(vaddr);
  133. break;
  134. case 64:
  135. *val = readq(vaddr);
  136. break;
  137. }
  138. }
  139. static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
  140. {
  141. switch (bit_width) {
  142. case 8:
  143. writeb(val, vaddr);
  144. break;
  145. case 16:
  146. writew(val, vaddr);
  147. break;
  148. case 32:
  149. writel(val, vaddr);
  150. break;
  151. case 64:
  152. writeq(val, vaddr);
  153. break;
  154. }
  155. }
  156. static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val)
  157. {
  158. int ret = 0;
  159. if (!reg->gas) {
  160. *val = 0;
  161. return 0;
  162. }
  163. if (reg->vaddr)
  164. read_register(reg->vaddr, val, reg->gas->bit_width);
  165. else
  166. ret = acpi_read(val, reg->gas);
  167. return ret;
  168. }
  169. static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val)
  170. {
  171. int ret = 0;
  172. if (!reg->gas)
  173. return 0;
  174. if (reg->vaddr)
  175. write_register(reg->vaddr, val, reg->gas->bit_width);
  176. else
  177. ret = acpi_write(val, reg->gas);
  178. return ret;
  179. }
  180. static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg)
  181. {
  182. int ret = 0;
  183. u64 val;
  184. ret = pcc_chan_reg_read(reg, &val);
  185. if (ret)
  186. return ret;
  187. val &= reg->preserve_mask;
  188. val |= reg->set_mask;
  189. return pcc_chan_reg_write(reg, val);
  190. }
  191. /**
  192. * pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number
  193. * @interrupt: GSI number.
  194. * @flags: interrupt flags
  195. *
  196. * Returns: a valid linux IRQ number on success
  197. * 0 or -EINVAL on failure
  198. */
  199. static int pcc_map_interrupt(u32 interrupt, u32 flags)
  200. {
  201. int trigger, polarity;
  202. if (!interrupt)
  203. return 0;
  204. trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
  205. : ACPI_LEVEL_SENSITIVE;
  206. polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
  207. : ACPI_ACTIVE_HIGH;
  208. return acpi_register_gsi(NULL, interrupt, trigger, polarity);
  209. }
  210. static bool pcc_chan_plat_irq_can_be_shared(struct pcc_chan_info *pchan)
  211. {
  212. return (pchan->plat_irq_flags & ACPI_PCCT_INTERRUPT_MODE) ==
  213. ACPI_LEVEL_SENSITIVE;
  214. }
  215. static bool pcc_mbox_cmd_complete_check(struct pcc_chan_info *pchan)
  216. {
  217. u64 val;
  218. int ret;
  219. ret = pcc_chan_reg_read(&pchan->cmd_complete, &val);
  220. if (ret)
  221. return false;
  222. if (!pchan->cmd_complete.gas)
  223. return true;
  224. /*
  225. * Judge if the channel respond the interrupt based on the value of
  226. * command complete.
  227. */
  228. val &= pchan->cmd_complete.status_mask;
  229. /*
  230. * If this is PCC slave subspace channel, and the command complete
  231. * bit 0 indicates that Platform is sending a notification and OSPM
  232. * needs to respond this interrupt to process this command.
  233. */
  234. if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
  235. return !val;
  236. return !!val;
  237. }
  238. static void check_and_ack(struct pcc_chan_info *pchan, struct mbox_chan *chan)
  239. {
  240. struct acpi_pcct_ext_pcc_shared_memory pcc_hdr;
  241. if (pchan->type != ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
  242. return;
  243. /* If the memory region has not been mapped, we cannot
  244. * determine if we need to send the message, but we still
  245. * need to set the cmd_update flag before returning.
  246. */
  247. if (pchan->chan.shmem == NULL) {
  248. pcc_chan_reg_read_modify_write(&pchan->cmd_update);
  249. return;
  250. }
  251. memcpy_fromio(&pcc_hdr, pchan->chan.shmem,
  252. sizeof(struct acpi_pcct_ext_pcc_shared_memory));
  253. /*
  254. * The PCC slave subspace channel needs to set the command complete bit
  255. * after processing message. If the PCC_ACK_FLAG is set, it should also
  256. * ring the doorbell.
  257. *
  258. * The PCC master subspace channel clears chan_in_use to free channel.
  259. */
  260. if (le32_to_cpup(&pcc_hdr.flags) & PCC_ACK_FLAG_MASK)
  261. pcc_send_data(chan, NULL);
  262. else
  263. pcc_chan_reg_read_modify_write(&pchan->cmd_update);
  264. }
  265. /**
  266. * pcc_mbox_irq - PCC mailbox interrupt handler
  267. * @irq: interrupt number
  268. * @p: data/cookie passed from the caller to identify the channel
  269. *
  270. * Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not
  271. */
  272. static irqreturn_t pcc_mbox_irq(int irq, void *p)
  273. {
  274. struct pcc_chan_info *pchan;
  275. struct mbox_chan *chan = p;
  276. u64 val;
  277. int ret;
  278. pchan = chan->con_priv;
  279. if (pcc_chan_reg_read_modify_write(&pchan->plat_irq_ack))
  280. return IRQ_NONE;
  281. if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE &&
  282. !pchan->chan_in_use)
  283. return IRQ_NONE;
  284. if (!pcc_mbox_cmd_complete_check(pchan))
  285. return IRQ_NONE;
  286. ret = pcc_chan_reg_read(&pchan->error, &val);
  287. if (ret)
  288. return IRQ_NONE;
  289. val &= pchan->error.status_mask;
  290. if (val) {
  291. val &= ~pchan->error.status_mask;
  292. pcc_chan_reg_write(&pchan->error, val);
  293. return IRQ_NONE;
  294. }
  295. /*
  296. * Clear this flag after updating interrupt ack register and just
  297. * before mbox_chan_received_data() which might call pcc_send_data()
  298. * where the flag is set again to start new transfer. This is
  299. * required to avoid any possible race in updatation of this flag.
  300. */
  301. pchan->chan_in_use = false;
  302. mbox_chan_received_data(chan, NULL);
  303. check_and_ack(pchan, chan);
  304. return IRQ_HANDLED;
  305. }
  306. /**
  307. * pcc_mbox_request_channel - PCC clients call this function to
  308. * request a pointer to their PCC subspace, from which they
  309. * can get the details of communicating with the remote.
  310. * @cl: Pointer to Mailbox client, so we know where to bind the
  311. * Channel.
  312. * @subspace_id: The PCC Subspace index as parsed in the PCC client
  313. * ACPI package. This is used to lookup the array of PCC
  314. * subspaces as parsed by the PCC Mailbox controller.
  315. *
  316. * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR.
  317. */
  318. struct pcc_mbox_chan *
  319. pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id)
  320. {
  321. struct pcc_chan_info *pchan;
  322. struct mbox_chan *chan;
  323. int rc;
  324. if (subspace_id < 0 || subspace_id >= pcc_chan_count)
  325. return ERR_PTR(-ENOENT);
  326. pchan = chan_info + subspace_id;
  327. chan = pchan->chan.mchan;
  328. if (IS_ERR(chan) || chan->cl) {
  329. pr_err("Channel not found for idx: %d\n", subspace_id);
  330. return ERR_PTR(-EBUSY);
  331. }
  332. rc = mbox_bind_client(chan, cl);
  333. if (rc)
  334. return ERR_PTR(rc);
  335. return &pchan->chan;
  336. }
  337. EXPORT_SYMBOL_GPL(pcc_mbox_request_channel);
  338. /**
  339. * pcc_mbox_free_channel - Clients call this to free their Channel.
  340. *
  341. * @pchan: Pointer to the PCC mailbox channel as returned by
  342. * pcc_mbox_request_channel()
  343. */
  344. void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan)
  345. {
  346. struct mbox_chan *chan = pchan->mchan;
  347. struct pcc_chan_info *pchan_info;
  348. struct pcc_mbox_chan *pcc_mbox_chan;
  349. if (!chan || !chan->cl)
  350. return;
  351. pchan_info = chan->con_priv;
  352. pcc_mbox_chan = &pchan_info->chan;
  353. if (pcc_mbox_chan->shmem) {
  354. iounmap(pcc_mbox_chan->shmem);
  355. pcc_mbox_chan->shmem = NULL;
  356. }
  357. mbox_free_channel(chan);
  358. }
  359. EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
  360. int pcc_mbox_ioremap(struct mbox_chan *chan)
  361. {
  362. struct pcc_chan_info *pchan_info;
  363. struct pcc_mbox_chan *pcc_mbox_chan;
  364. if (!chan || !chan->cl)
  365. return -1;
  366. pchan_info = chan->con_priv;
  367. pcc_mbox_chan = &pchan_info->chan;
  368. pcc_mbox_chan->shmem = acpi_os_ioremap(pcc_mbox_chan->shmem_base_addr,
  369. pcc_mbox_chan->shmem_size);
  370. if (!pcc_mbox_chan->shmem)
  371. return -ENXIO;
  372. return 0;
  373. }
  374. EXPORT_SYMBOL_GPL(pcc_mbox_ioremap);
  375. /**
  376. * pcc_send_data - Called from Mailbox Controller code. Used
  377. * here only to ring the channel doorbell. The PCC client
  378. * specific read/write is done in the client driver in
  379. * order to maintain atomicity over PCC channel once
  380. * OS has control over it. See above for flow of operations.
  381. * @chan: Pointer to Mailbox channel over which to send data.
  382. * @data: Client specific data written over channel. Used here
  383. * only for debug after PCC transaction completes.
  384. *
  385. * Return: Err if something failed else 0 for success.
  386. */
  387. static int pcc_send_data(struct mbox_chan *chan, void *data)
  388. {
  389. int ret;
  390. struct pcc_chan_info *pchan = chan->con_priv;
  391. ret = pcc_chan_reg_read_modify_write(&pchan->cmd_update);
  392. if (ret)
  393. return ret;
  394. ret = pcc_chan_reg_read_modify_write(&pchan->db);
  395. if (!ret && pchan->plat_irq > 0)
  396. pchan->chan_in_use = true;
  397. return ret;
  398. }
  399. /**
  400. * pcc_startup - Called from Mailbox Controller code. Used here
  401. * to request the interrupt.
  402. * @chan: Pointer to Mailbox channel to startup.
  403. *
  404. * Return: Err if something failed else 0 for success.
  405. */
  406. static int pcc_startup(struct mbox_chan *chan)
  407. {
  408. struct pcc_chan_info *pchan = chan->con_priv;
  409. unsigned long irqflags;
  410. int rc;
  411. if (pchan->plat_irq > 0) {
  412. irqflags = pcc_chan_plat_irq_can_be_shared(pchan) ?
  413. IRQF_SHARED | IRQF_ONESHOT : 0;
  414. rc = devm_request_irq(chan->mbox->dev, pchan->plat_irq, pcc_mbox_irq,
  415. irqflags, MBOX_IRQ_NAME, chan);
  416. if (unlikely(rc)) {
  417. dev_err(chan->mbox->dev, "failed to register PCC interrupt %d\n",
  418. pchan->plat_irq);
  419. return rc;
  420. }
  421. }
  422. return 0;
  423. }
  424. /**
  425. * pcc_shutdown - Called from Mailbox Controller code. Used here
  426. * to free the interrupt.
  427. * @chan: Pointer to Mailbox channel to shutdown.
  428. */
  429. static void pcc_shutdown(struct mbox_chan *chan)
  430. {
  431. struct pcc_chan_info *pchan = chan->con_priv;
  432. if (pchan->plat_irq > 0)
  433. devm_free_irq(chan->mbox->dev, pchan->plat_irq, chan);
  434. }
  435. static const struct mbox_chan_ops pcc_chan_ops = {
  436. .send_data = pcc_send_data,
  437. .startup = pcc_startup,
  438. .shutdown = pcc_shutdown,
  439. };
  440. /**
  441. * parse_pcc_subspace - Count PCC subspaces defined
  442. * @header: Pointer to the ACPI subtable header under the PCCT.
  443. * @end: End of subtable entry.
  444. *
  445. * Return: If we find a PCC subspace entry of a valid type, return 0.
  446. * Otherwise, return -EINVAL.
  447. *
  448. * This gets called for each entry in the PCC table.
  449. */
  450. static int parse_pcc_subspace(union acpi_subtable_headers *header,
  451. const unsigned long end)
  452. {
  453. struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header;
  454. if (ss->header.type < ACPI_PCCT_TYPE_RESERVED)
  455. return 0;
  456. return -EINVAL;
  457. }
  458. static int
  459. pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas,
  460. u64 preserve_mask, u64 set_mask, u64 status_mask, char *name)
  461. {
  462. if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
  463. if (!(gas->bit_width >= 8 && gas->bit_width <= 64 &&
  464. is_power_of_2(gas->bit_width))) {
  465. pr_err("Error: Cannot access register of %u bit width",
  466. gas->bit_width);
  467. return -EFAULT;
  468. }
  469. reg->vaddr = acpi_os_ioremap(gas->address, gas->bit_width / 8);
  470. if (!reg->vaddr) {
  471. pr_err("Failed to ioremap PCC %s register\n", name);
  472. return -ENOMEM;
  473. }
  474. }
  475. reg->gas = gas;
  476. reg->preserve_mask = preserve_mask;
  477. reg->set_mask = set_mask;
  478. reg->status_mask = status_mask;
  479. return 0;
  480. }
  481. /**
  482. * pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register
  483. *
  484. * @pchan: Pointer to the PCC channel info structure.
  485. * @pcct_entry: Pointer to the ACPI subtable header.
  486. *
  487. * Return: 0 for Success, else errno.
  488. *
  489. * There should be one entry per PCC channel. This gets called for each
  490. * entry in the PCC table. This uses PCCY Type1 structure for all applicable
  491. * types(Type 1-4) to fetch irq
  492. */
  493. static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan,
  494. struct acpi_subtable_header *pcct_entry)
  495. {
  496. int ret = 0;
  497. struct acpi_pcct_hw_reduced *pcct_ss;
  498. if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE ||
  499. pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE)
  500. return 0;
  501. pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
  502. pchan->plat_irq = pcc_map_interrupt(pcct_ss->platform_interrupt,
  503. (u32)pcct_ss->flags);
  504. if (pchan->plat_irq <= 0) {
  505. pr_err("PCC GSI %d not registered\n",
  506. pcct_ss->platform_interrupt);
  507. return -EINVAL;
  508. }
  509. pchan->plat_irq_flags = pcct_ss->flags;
  510. if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
  511. struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss;
  512. ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
  513. &pcct2_ss->platform_ack_register,
  514. pcct2_ss->ack_preserve_mask,
  515. pcct2_ss->ack_write_mask, 0,
  516. "PLAT IRQ ACK");
  517. } else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE ||
  518. pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) {
  519. struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss;
  520. ret = pcc_chan_reg_init(&pchan->plat_irq_ack,
  521. &pcct_ext->platform_ack_register,
  522. pcct_ext->ack_preserve_mask,
  523. pcct_ext->ack_set_mask, 0,
  524. "PLAT IRQ ACK");
  525. }
  526. if (pcc_chan_plat_irq_can_be_shared(pchan) &&
  527. !pchan->plat_irq_ack.gas) {
  528. pr_err("PCC subspace has level IRQ with no ACK register\n");
  529. return -EINVAL;
  530. }
  531. return ret;
  532. }
  533. /**
  534. * pcc_parse_subspace_db_reg - Parse the PCC doorbell register
  535. *
  536. * @pchan: Pointer to the PCC channel info structure.
  537. * @pcct_entry: Pointer to the ACPI subtable header.
  538. *
  539. * Return: 0 for Success, else errno.
  540. */
  541. static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan,
  542. struct acpi_subtable_header *pcct_entry)
  543. {
  544. int ret = 0;
  545. if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
  546. struct acpi_pcct_subspace *pcct_ss;
  547. pcct_ss = (struct acpi_pcct_subspace *)pcct_entry;
  548. ret = pcc_chan_reg_init(&pchan->db,
  549. &pcct_ss->doorbell_register,
  550. pcct_ss->preserve_mask,
  551. pcct_ss->write_mask, 0, "Doorbell");
  552. } else {
  553. struct acpi_pcct_ext_pcc_master *pcct_ext;
  554. pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry;
  555. ret = pcc_chan_reg_init(&pchan->db,
  556. &pcct_ext->doorbell_register,
  557. pcct_ext->preserve_mask,
  558. pcct_ext->write_mask, 0, "Doorbell");
  559. if (ret)
  560. return ret;
  561. ret = pcc_chan_reg_init(&pchan->cmd_complete,
  562. &pcct_ext->cmd_complete_register,
  563. 0, 0, pcct_ext->cmd_complete_mask,
  564. "Command Complete Check");
  565. if (ret)
  566. return ret;
  567. ret = pcc_chan_reg_init(&pchan->cmd_update,
  568. &pcct_ext->cmd_update_register,
  569. pcct_ext->cmd_update_preserve_mask,
  570. pcct_ext->cmd_update_set_mask, 0,
  571. "Command Complete Update");
  572. if (ret)
  573. return ret;
  574. ret = pcc_chan_reg_init(&pchan->error,
  575. &pcct_ext->error_status_register,
  576. 0, 0, pcct_ext->error_status_mask,
  577. "Error Status");
  578. }
  579. return ret;
  580. }
  581. /**
  582. * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information
  583. *
  584. * @pchan: Pointer to the PCC channel info structure.
  585. * @pcct_entry: Pointer to the ACPI subtable header.
  586. *
  587. */
  588. static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan,
  589. struct acpi_subtable_header *pcct_entry)
  590. {
  591. if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) {
  592. struct acpi_pcct_subspace *pcct_ss =
  593. (struct acpi_pcct_subspace *)pcct_entry;
  594. pchan->chan.shmem_base_addr = pcct_ss->base_address;
  595. pchan->chan.shmem_size = pcct_ss->length;
  596. pchan->chan.latency = pcct_ss->latency;
  597. pchan->chan.max_access_rate = pcct_ss->max_access_rate;
  598. pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time;
  599. } else {
  600. struct acpi_pcct_ext_pcc_master *pcct_ext =
  601. (struct acpi_pcct_ext_pcc_master *)pcct_entry;
  602. pchan->chan.shmem_base_addr = pcct_ext->base_address;
  603. pchan->chan.shmem_size = pcct_ext->length;
  604. pchan->chan.latency = pcct_ext->latency;
  605. pchan->chan.max_access_rate = pcct_ext->max_access_rate;
  606. pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time;
  607. }
  608. }
  609. /**
  610. * acpi_pcc_probe - Parse the ACPI tree for the PCCT.
  611. *
  612. * Return: 0 for Success, else errno.
  613. */
  614. static int __init acpi_pcc_probe(void)
  615. {
  616. int count, i, rc = 0;
  617. acpi_status status;
  618. struct acpi_table_header *pcct_tbl;
  619. struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED];
  620. status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
  621. if (ACPI_FAILURE(status) || !pcct_tbl)
  622. return -ENODEV;
  623. /* Set up the subtable handlers */
  624. for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE;
  625. i < ACPI_PCCT_TYPE_RESERVED; i++) {
  626. proc[i].id = i;
  627. proc[i].count = 0;
  628. proc[i].handler = parse_pcc_subspace;
  629. }
  630. count = acpi_table_parse_entries_array(ACPI_SIG_PCCT,
  631. sizeof(struct acpi_table_pcct), proc,
  632. ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES);
  633. if (count <= 0 || count > MAX_PCC_SUBSPACES) {
  634. if (count < 0)
  635. pr_warn("Error parsing PCC subspaces from PCCT\n");
  636. else
  637. pr_warn("Invalid PCCT: %d PCC subspaces\n", count);
  638. rc = -EINVAL;
  639. } else {
  640. pcc_chan_count = count;
  641. }
  642. acpi_put_table(pcct_tbl);
  643. return rc;
  644. }
  645. /**
  646. * pcc_mbox_probe - Called when we find a match for the
  647. * PCCT platform device. This is purely used to represent
  648. * the PCCT as a virtual device for registering with the
  649. * generic Mailbox framework.
  650. *
  651. * @pdev: Pointer to platform device returned when a match
  652. * is found.
  653. *
  654. * Return: 0 for Success, else errno.
  655. */
  656. static int pcc_mbox_probe(struct platform_device *pdev)
  657. {
  658. struct device *dev = &pdev->dev;
  659. struct mbox_controller *pcc_mbox_ctrl;
  660. struct mbox_chan *pcc_mbox_channels;
  661. struct acpi_table_header *pcct_tbl;
  662. struct acpi_subtable_header *pcct_entry;
  663. struct acpi_table_pcct *acpi_pcct_tbl;
  664. acpi_status status = AE_OK;
  665. int i, rc, count = pcc_chan_count;
  666. /* Search for PCCT */
  667. status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl);
  668. if (ACPI_FAILURE(status) || !pcct_tbl)
  669. return -ENODEV;
  670. pcc_mbox_channels = devm_kcalloc(dev, count, sizeof(*pcc_mbox_channels),
  671. GFP_KERNEL);
  672. if (!pcc_mbox_channels) {
  673. rc = -ENOMEM;
  674. goto err;
  675. }
  676. chan_info = devm_kcalloc(dev, count, sizeof(*chan_info), GFP_KERNEL);
  677. if (!chan_info) {
  678. rc = -ENOMEM;
  679. goto err;
  680. }
  681. pcc_mbox_ctrl = devm_kzalloc(dev, sizeof(*pcc_mbox_ctrl), GFP_KERNEL);
  682. if (!pcc_mbox_ctrl) {
  683. rc = -ENOMEM;
  684. goto err;
  685. }
  686. /* Point to the first PCC subspace entry */
  687. pcct_entry = (struct acpi_subtable_header *) (
  688. (unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct));
  689. acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl;
  690. if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL)
  691. pcc_mbox_ctrl->txdone_irq = true;
  692. for (i = 0; i < count; i++) {
  693. struct pcc_chan_info *pchan = chan_info + i;
  694. pcc_mbox_channels[i].con_priv = pchan;
  695. pchan->chan.mchan = &pcc_mbox_channels[i];
  696. if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE &&
  697. !pcc_mbox_ctrl->txdone_irq) {
  698. pr_err("Platform Interrupt flag must be set to 1");
  699. rc = -EINVAL;
  700. goto err;
  701. }
  702. if (pcc_mbox_ctrl->txdone_irq) {
  703. rc = pcc_parse_subspace_irq(pchan, pcct_entry);
  704. if (rc < 0)
  705. goto err;
  706. }
  707. rc = pcc_parse_subspace_db_reg(pchan, pcct_entry);
  708. if (rc < 0)
  709. goto err;
  710. pcc_parse_subspace_shmem(pchan, pcct_entry);
  711. pchan->type = pcct_entry->type;
  712. pcct_entry = (struct acpi_subtable_header *)
  713. ((unsigned long) pcct_entry + pcct_entry->length);
  714. }
  715. pcc_mbox_ctrl->num_chans = count;
  716. pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl->num_chans);
  717. pcc_mbox_ctrl->chans = pcc_mbox_channels;
  718. pcc_mbox_ctrl->ops = &pcc_chan_ops;
  719. pcc_mbox_ctrl->dev = dev;
  720. pr_info("Registering PCC driver as Mailbox controller\n");
  721. rc = mbox_controller_register(pcc_mbox_ctrl);
  722. if (rc)
  723. pr_err("Err registering PCC as Mailbox controller: %d\n", rc);
  724. else
  725. return 0;
  726. err:
  727. acpi_put_table(pcct_tbl);
  728. return rc;
  729. }
  730. static struct platform_driver pcc_mbox_driver = {
  731. .probe = pcc_mbox_probe,
  732. .driver = {
  733. .name = "PCCT",
  734. },
  735. };
  736. static int __init pcc_init(void)
  737. {
  738. int ret;
  739. struct platform_device *pcc_pdev;
  740. if (acpi_disabled)
  741. return -ENODEV;
  742. /* Check if PCC support is available. */
  743. ret = acpi_pcc_probe();
  744. if (ret) {
  745. pr_debug("ACPI PCC probe failed.\n");
  746. return -ENODEV;
  747. }
  748. pcc_pdev = platform_create_bundle(&pcc_mbox_driver,
  749. pcc_mbox_probe, NULL, 0, NULL, 0);
  750. if (IS_ERR(pcc_pdev)) {
  751. pr_debug("Err creating PCC platform bundle\n");
  752. pcc_chan_count = 0;
  753. return PTR_ERR(pcc_pdev);
  754. }
  755. return 0;
  756. }
  757. /*
  758. * Make PCC init postcore so that users of this mailbox
  759. * such as the ACPI Processor driver have it available
  760. * at their init.
  761. */
  762. postcore_initcall(pcc_init);