renesas_sdhi_sys_dmac.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * DMA support use of SYS DMAC with SDHI SD/SDIO controller
  4. *
  5. * Copyright (C) 2016-19 Renesas Electronics Corporation
  6. * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
  7. * Copyright (C) 2017 Horms Solutions, Simon Horman
  8. * Copyright (C) 2010-2011 Guennadi Liakhovetski
  9. */
  10. #include <linux/device.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/dmaengine.h>
  13. #include <linux/mmc/host.h>
  14. #include <linux/mod_devicetable.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/pagemap.h>
  18. #include <linux/platform_data/tmio.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/scatterlist.h>
  22. #include <linux/sys_soc.h>
  23. #include "renesas_sdhi.h"
  24. #include "tmio_mmc.h"
  25. #define TMIO_MMC_MIN_DMA_LEN 8
  26. static const struct renesas_sdhi_of_data of_default_cfg = {
  27. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  28. };
  29. static const struct renesas_sdhi_of_data of_rz_compatible = {
  30. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
  31. TMIO_MMC_HAVE_CBSY,
  32. .tmio_ocr_mask = MMC_VDD_32_33,
  33. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  34. MMC_CAP_WAIT_WHILE_BUSY,
  35. };
  36. static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
  37. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
  38. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  39. MMC_CAP_WAIT_WHILE_BUSY,
  40. .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
  41. };
  42. /* Definitions for sampling clocks */
  43. static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
  44. {
  45. .clk_rate = 156000000,
  46. .tap = 0x00000703,
  47. },
  48. {
  49. .clk_rate = 0,
  50. .tap = 0x00000300,
  51. },
  52. };
  53. static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
  54. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
  55. TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
  56. .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
  57. MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY,
  58. .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
  59. .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
  60. .dma_rx_offset = 0x2000,
  61. .scc_offset = 0x0300,
  62. .taps = rcar_gen2_scc_taps,
  63. .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
  64. .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE,
  65. };
  66. static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
  67. { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
  68. { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
  69. { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
  70. { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
  71. { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
  72. { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
  73. { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
  74. { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
  75. { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
  76. { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
  77. { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
  78. { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
  79. { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
  80. { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
  81. { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
  82. { .compatible = "renesas,sdhi-shmobile" },
  83. {},
  84. };
  85. MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
  86. static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
  87. bool enable)
  88. {
  89. struct renesas_sdhi *priv = host_to_priv(host);
  90. if (!host->chan_tx || !host->chan_rx)
  91. return;
  92. if (priv->dma_priv.enable)
  93. priv->dma_priv.enable(host, enable);
  94. }
  95. static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
  96. {
  97. renesas_sdhi_sys_dmac_enable_dma(host, false);
  98. if (host->chan_rx)
  99. dmaengine_terminate_sync(host->chan_rx);
  100. if (host->chan_tx)
  101. dmaengine_terminate_sync(host->chan_tx);
  102. renesas_sdhi_sys_dmac_enable_dma(host, true);
  103. }
  104. static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
  105. {
  106. struct renesas_sdhi *priv = host_to_priv(host);
  107. complete(&priv->dma_priv.dma_dataend);
  108. }
  109. static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
  110. {
  111. struct tmio_mmc_host *host = arg;
  112. struct renesas_sdhi *priv = host_to_priv(host);
  113. spin_lock_irq(&host->lock);
  114. if (!host->data)
  115. goto out;
  116. if (host->data->flags & MMC_DATA_READ)
  117. dma_unmap_sg(host->chan_rx->device->dev,
  118. host->sg_ptr, host->sg_len,
  119. DMA_FROM_DEVICE);
  120. else
  121. dma_unmap_sg(host->chan_tx->device->dev,
  122. host->sg_ptr, host->sg_len,
  123. DMA_TO_DEVICE);
  124. spin_unlock_irq(&host->lock);
  125. wait_for_completion(&priv->dma_priv.dma_dataend);
  126. spin_lock_irq(&host->lock);
  127. tmio_mmc_do_data_irq(host);
  128. out:
  129. spin_unlock_irq(&host->lock);
  130. }
  131. static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
  132. {
  133. struct renesas_sdhi *priv = host_to_priv(host);
  134. struct scatterlist *sg = host->sg_ptr, *sg_tmp;
  135. struct dma_async_tx_descriptor *desc = NULL;
  136. struct dma_chan *chan = host->chan_rx;
  137. dma_cookie_t cookie;
  138. int ret, i;
  139. bool aligned = true, multiple = true;
  140. unsigned int align = 1; /* 2-byte alignment */
  141. for_each_sg(sg, sg_tmp, host->sg_len, i) {
  142. if (sg_tmp->offset & align)
  143. aligned = false;
  144. if (sg_tmp->length & align) {
  145. multiple = false;
  146. break;
  147. }
  148. }
  149. if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
  150. (align & PAGE_MASK))) || !multiple) {
  151. ret = -EINVAL;
  152. goto pio;
  153. }
  154. if (sg->length < TMIO_MMC_MIN_DMA_LEN)
  155. return;
  156. /* The only sg element can be unaligned, use our bounce buffer then */
  157. if (!aligned) {
  158. sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
  159. host->sg_ptr = &host->bounce_sg;
  160. sg = host->sg_ptr;
  161. }
  162. ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
  163. if (ret > 0)
  164. desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
  165. DMA_CTRL_ACK);
  166. if (desc) {
  167. reinit_completion(&priv->dma_priv.dma_dataend);
  168. desc->callback = renesas_sdhi_sys_dmac_dma_callback;
  169. desc->callback_param = host;
  170. cookie = dmaengine_submit(desc);
  171. if (cookie < 0) {
  172. desc = NULL;
  173. ret = cookie;
  174. }
  175. host->dma_on = true;
  176. }
  177. pio:
  178. if (!desc) {
  179. /* DMA failed, fall back to PIO */
  180. renesas_sdhi_sys_dmac_enable_dma(host, false);
  181. if (ret >= 0)
  182. ret = -EIO;
  183. host->chan_rx = NULL;
  184. dma_release_channel(chan);
  185. /* Free the Tx channel too */
  186. chan = host->chan_tx;
  187. if (chan) {
  188. host->chan_tx = NULL;
  189. dma_release_channel(chan);
  190. }
  191. dev_warn(&host->pdev->dev,
  192. "DMA failed: %d, falling back to PIO\n", ret);
  193. }
  194. }
  195. static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
  196. {
  197. struct renesas_sdhi *priv = host_to_priv(host);
  198. struct scatterlist *sg = host->sg_ptr, *sg_tmp;
  199. struct dma_async_tx_descriptor *desc = NULL;
  200. struct dma_chan *chan = host->chan_tx;
  201. dma_cookie_t cookie;
  202. int ret, i;
  203. bool aligned = true, multiple = true;
  204. unsigned int align = 1; /* 2-byte alignment */
  205. for_each_sg(sg, sg_tmp, host->sg_len, i) {
  206. if (sg_tmp->offset & align)
  207. aligned = false;
  208. if (sg_tmp->length & align) {
  209. multiple = false;
  210. break;
  211. }
  212. }
  213. if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
  214. (align & PAGE_MASK))) || !multiple) {
  215. ret = -EINVAL;
  216. goto pio;
  217. }
  218. if (sg->length < TMIO_MMC_MIN_DMA_LEN)
  219. return;
  220. /* The only sg element can be unaligned, use our bounce buffer then */
  221. if (!aligned) {
  222. void *sg_vaddr = kmap_local_page(sg_page(sg));
  223. sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
  224. memcpy(host->bounce_buf, sg_vaddr + sg->offset, host->bounce_sg.length);
  225. kunmap_local(sg_vaddr);
  226. host->sg_ptr = &host->bounce_sg;
  227. sg = host->sg_ptr;
  228. }
  229. ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
  230. if (ret > 0)
  231. desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
  232. DMA_CTRL_ACK);
  233. if (desc) {
  234. reinit_completion(&priv->dma_priv.dma_dataend);
  235. desc->callback = renesas_sdhi_sys_dmac_dma_callback;
  236. desc->callback_param = host;
  237. cookie = dmaengine_submit(desc);
  238. if (cookie < 0) {
  239. desc = NULL;
  240. ret = cookie;
  241. }
  242. host->dma_on = true;
  243. }
  244. pio:
  245. if (!desc) {
  246. /* DMA failed, fall back to PIO */
  247. renesas_sdhi_sys_dmac_enable_dma(host, false);
  248. if (ret >= 0)
  249. ret = -EIO;
  250. host->chan_tx = NULL;
  251. dma_release_channel(chan);
  252. /* Free the Rx channel too */
  253. chan = host->chan_rx;
  254. if (chan) {
  255. host->chan_rx = NULL;
  256. dma_release_channel(chan);
  257. }
  258. dev_warn(&host->pdev->dev,
  259. "DMA failed: %d, falling back to PIO\n", ret);
  260. }
  261. }
  262. static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
  263. struct mmc_data *data)
  264. {
  265. if (data->flags & MMC_DATA_READ) {
  266. if (host->chan_rx)
  267. renesas_sdhi_sys_dmac_start_dma_rx(host);
  268. } else {
  269. if (host->chan_tx)
  270. renesas_sdhi_sys_dmac_start_dma_tx(host);
  271. }
  272. }
  273. static void renesas_sdhi_sys_dmac_issue_work_fn(struct work_struct *work)
  274. {
  275. struct tmio_mmc_host *host = from_work(host, work, dma_issue);
  276. struct dma_chan *chan = NULL;
  277. spin_lock_irq(&host->lock);
  278. if (host->data) {
  279. if (host->data->flags & MMC_DATA_READ)
  280. chan = host->chan_rx;
  281. else
  282. chan = host->chan_tx;
  283. }
  284. spin_unlock_irq(&host->lock);
  285. tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
  286. if (chan)
  287. dma_async_issue_pending(chan);
  288. }
  289. static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
  290. struct tmio_mmc_data *pdata)
  291. {
  292. struct renesas_sdhi *priv = host_to_priv(host);
  293. /* We can only either use DMA for both Tx and Rx or not use it at all */
  294. if (!host->pdev->dev.of_node &&
  295. (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
  296. return;
  297. if (!host->chan_tx && !host->chan_rx) {
  298. struct resource *res = platform_get_resource(host->pdev,
  299. IORESOURCE_MEM, 0);
  300. struct dma_slave_config cfg = {};
  301. dma_cap_mask_t mask;
  302. int ret;
  303. if (!res)
  304. return;
  305. dma_cap_zero(mask);
  306. dma_cap_set(DMA_SLAVE, mask);
  307. host->chan_tx = dma_request_slave_channel_compat(mask,
  308. priv->dma_priv.filter, pdata->chan_priv_tx,
  309. &host->pdev->dev, "tx");
  310. dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
  311. host->chan_tx);
  312. if (!host->chan_tx)
  313. return;
  314. cfg.direction = DMA_MEM_TO_DEV;
  315. cfg.dst_addr = res->start +
  316. (CTL_SD_DATA_PORT << host->bus_shift);
  317. cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
  318. if (!cfg.dst_addr_width)
  319. cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  320. cfg.src_addr = 0;
  321. ret = dmaengine_slave_config(host->chan_tx, &cfg);
  322. if (ret < 0)
  323. goto ecfgtx;
  324. host->chan_rx = dma_request_slave_channel_compat(mask,
  325. priv->dma_priv.filter, pdata->chan_priv_rx,
  326. &host->pdev->dev, "rx");
  327. dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
  328. host->chan_rx);
  329. if (!host->chan_rx)
  330. goto ereqrx;
  331. cfg.direction = DMA_DEV_TO_MEM;
  332. cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
  333. cfg.src_addr_width = priv->dma_priv.dma_buswidth;
  334. if (!cfg.src_addr_width)
  335. cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  336. cfg.dst_addr = 0;
  337. ret = dmaengine_slave_config(host->chan_rx, &cfg);
  338. if (ret < 0)
  339. goto ecfgrx;
  340. host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
  341. if (!host->bounce_buf)
  342. goto ebouncebuf;
  343. init_completion(&priv->dma_priv.dma_dataend);
  344. INIT_WORK(&host->dma_issue,
  345. renesas_sdhi_sys_dmac_issue_work_fn);
  346. }
  347. renesas_sdhi_sys_dmac_enable_dma(host, true);
  348. return;
  349. ebouncebuf:
  350. ecfgrx:
  351. dma_release_channel(host->chan_rx);
  352. host->chan_rx = NULL;
  353. ereqrx:
  354. ecfgtx:
  355. dma_release_channel(host->chan_tx);
  356. host->chan_tx = NULL;
  357. }
  358. static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
  359. {
  360. if (host->chan_tx) {
  361. struct dma_chan *chan = host->chan_tx;
  362. host->chan_tx = NULL;
  363. dma_release_channel(chan);
  364. }
  365. if (host->chan_rx) {
  366. struct dma_chan *chan = host->chan_rx;
  367. host->chan_rx = NULL;
  368. dma_release_channel(chan);
  369. }
  370. if (host->bounce_buf) {
  371. free_pages((unsigned long)host->bounce_buf, 0);
  372. host->bounce_buf = NULL;
  373. }
  374. }
  375. static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
  376. .start = renesas_sdhi_sys_dmac_start_dma,
  377. .enable = renesas_sdhi_sys_dmac_enable_dma,
  378. .request = renesas_sdhi_sys_dmac_request_dma,
  379. .release = renesas_sdhi_sys_dmac_release_dma,
  380. .abort = renesas_sdhi_sys_dmac_abort_dma,
  381. .dataend = renesas_sdhi_sys_dmac_dataend_dma,
  382. };
  383. static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
  384. {
  385. return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops,
  386. of_device_get_match_data(&pdev->dev), NULL);
  387. }
  388. static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
  389. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  390. pm_runtime_force_resume)
  391. SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
  392. tmio_mmc_host_runtime_resume,
  393. NULL)
  394. };
  395. static struct platform_driver renesas_sys_dmac_sdhi_driver = {
  396. .driver = {
  397. .name = "sh_mobile_sdhi",
  398. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  399. .pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
  400. .of_match_table = renesas_sdhi_sys_dmac_of_match,
  401. },
  402. .probe = renesas_sdhi_sys_dmac_probe,
  403. .remove_new = renesas_sdhi_remove,
  404. };
  405. module_platform_driver(renesas_sys_dmac_sdhi_driver);
  406. MODULE_DESCRIPTION("Renesas SDHI driver");
  407. MODULE_AUTHOR("Magnus Damm");
  408. MODULE_LICENSE("GPL v2");
  409. MODULE_ALIAS("platform:sh_mobile_sdhi");