felix.c 64 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright 2019-2021 NXP
  3. *
  4. * This is an umbrella module for all network switches that are
  5. * register-compatible with Ocelot and that perform I/O to their host CPU
  6. * through an NPI (Node Processor Interface) Ethernet port.
  7. */
  8. #include <uapi/linux/if_bridge.h>
  9. #include <soc/mscc/ocelot_vcap.h>
  10. #include <soc/mscc/ocelot_qsys.h>
  11. #include <soc/mscc/ocelot_sys.h>
  12. #include <soc/mscc/ocelot_dev.h>
  13. #include <soc/mscc/ocelot_ana.h>
  14. #include <soc/mscc/ocelot_ptp.h>
  15. #include <soc/mscc/ocelot.h>
  16. #include <linux/dsa/8021q.h>
  17. #include <linux/dsa/ocelot.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/ptp_classify.h>
  20. #include <linux/module.h>
  21. #include <linux/of_net.h>
  22. #include <linux/pci.h>
  23. #include <linux/of.h>
  24. #include <net/pkt_sched.h>
  25. #include <net/dsa.h>
  26. #include "felix.h"
  27. /* Translate the DSA database API into the ocelot switch library API,
  28. * which uses VID 0 for all ports that aren't part of a bridge,
  29. * and expects the bridge_dev to be NULL in that case.
  30. */
  31. static struct net_device *felix_classify_db(struct dsa_db db)
  32. {
  33. switch (db.type) {
  34. case DSA_DB_PORT:
  35. case DSA_DB_LAG:
  36. return NULL;
  37. case DSA_DB_BRIDGE:
  38. return db.bridge.dev;
  39. default:
  40. return ERR_PTR(-EOPNOTSUPP);
  41. }
  42. }
  43. static int felix_cpu_port_for_conduit(struct dsa_switch *ds,
  44. struct net_device *conduit)
  45. {
  46. struct ocelot *ocelot = ds->priv;
  47. struct dsa_port *cpu_dp;
  48. int lag;
  49. if (netif_is_lag_master(conduit)) {
  50. mutex_lock(&ocelot->fwd_domain_lock);
  51. lag = ocelot_bond_get_id(ocelot, conduit);
  52. mutex_unlock(&ocelot->fwd_domain_lock);
  53. return lag;
  54. }
  55. cpu_dp = conduit->dsa_ptr;
  56. return cpu_dp->index;
  57. }
  58. /**
  59. * felix_update_tag_8021q_rx_rule - Update VCAP ES0 tag_8021q rule after
  60. * vlan_filtering change
  61. * @outer_tagging_rule: Pointer to VCAP filter on which the update is performed
  62. * @vlan_filtering: Current bridge VLAN filtering setting
  63. *
  64. * Source port identification for tag_8021q is done using VCAP ES0 rules on the
  65. * CPU port(s). The ES0 tag B (inner tag from the packet) can be configured as
  66. * either:
  67. * - push_inner_tag=0: the inner tag is never pushed into the frame
  68. * (and we lose info about the classified VLAN). This is
  69. * good when the classified VLAN is a discardable quantity
  70. * for the software RX path: it is either set to
  71. * OCELOT_STANDALONE_PVID, or to
  72. * ocelot_vlan_unaware_pvid(bridge).
  73. * - push_inner_tag=1: the inner tag is always pushed. This is good when the
  74. * classified VLAN is not a discardable quantity (the port
  75. * is under a VLAN-aware bridge, and software needs to
  76. * continue processing the packet in the same VLAN as the
  77. * hardware).
  78. * The point is that what is good for a VLAN-unaware port is not good for a
  79. * VLAN-aware port, and vice versa. Thus, the RX tagging rules must be kept in
  80. * sync with the VLAN filtering state of the port.
  81. */
  82. static void
  83. felix_update_tag_8021q_rx_rule(struct ocelot_vcap_filter *outer_tagging_rule,
  84. bool vlan_filtering)
  85. {
  86. if (vlan_filtering)
  87. outer_tagging_rule->action.push_inner_tag = OCELOT_ES0_TAG;
  88. else
  89. outer_tagging_rule->action.push_inner_tag = OCELOT_NO_ES0_TAG;
  90. }
  91. /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
  92. * the tagger can perform RX source port identification.
  93. */
  94. static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,
  95. int upstream, u16 vid,
  96. bool vlan_filtering)
  97. {
  98. struct ocelot_vcap_filter *outer_tagging_rule;
  99. struct ocelot *ocelot = ds->priv;
  100. unsigned long cookie;
  101. int key_length, err;
  102. key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
  103. outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
  104. GFP_KERNEL);
  105. if (!outer_tagging_rule)
  106. return -ENOMEM;
  107. cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
  108. outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
  109. outer_tagging_rule->prio = 1;
  110. outer_tagging_rule->id.cookie = cookie;
  111. outer_tagging_rule->id.tc_offload = false;
  112. outer_tagging_rule->block_id = VCAP_ES0;
  113. outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
  114. outer_tagging_rule->lookup = 0;
  115. outer_tagging_rule->ingress_port.value = port;
  116. outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
  117. outer_tagging_rule->egress_port.value = upstream;
  118. outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
  119. outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
  120. outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
  121. outer_tagging_rule->action.tag_a_vid_sel = 1;
  122. outer_tagging_rule->action.vid_a_val = vid;
  123. felix_update_tag_8021q_rx_rule(outer_tagging_rule, vlan_filtering);
  124. outer_tagging_rule->action.tag_b_tpid_sel = OCELOT_TAG_TPID_SEL_8021Q;
  125. /* Leave TAG_B_VID_SEL at 0 (Classified VID + VID_B_VAL). Since we also
  126. * leave VID_B_VAL at 0, this makes ES0 tag B (the inner tag) equal to
  127. * the classified VID, which we need to see in the DSA tagger's receive
  128. * path. Note: the inner tag is only visible in the packet when pushed
  129. * (push_inner_tag == OCELOT_ES0_TAG).
  130. */
  131. err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
  132. if (err)
  133. kfree(outer_tagging_rule);
  134. return err;
  135. }
  136. static int felix_tag_8021q_vlan_del_rx(struct dsa_switch *ds, int port,
  137. int upstream, u16 vid)
  138. {
  139. struct ocelot_vcap_filter *outer_tagging_rule;
  140. struct ocelot_vcap_block *block_vcap_es0;
  141. struct ocelot *ocelot = ds->priv;
  142. unsigned long cookie;
  143. block_vcap_es0 = &ocelot->block[VCAP_ES0];
  144. cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);
  145. outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
  146. cookie, false);
  147. if (!outer_tagging_rule)
  148. return -ENOENT;
  149. return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
  150. }
  151. /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
  152. * rules for steering those tagged packets towards the correct destination port
  153. */
  154. static int felix_tag_8021q_vlan_add_tx(struct dsa_switch *ds, int port,
  155. u16 vid)
  156. {
  157. struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
  158. unsigned long cpu_ports = dsa_cpu_ports(ds);
  159. struct ocelot *ocelot = ds->priv;
  160. unsigned long cookie;
  161. int err;
  162. untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
  163. if (!untagging_rule)
  164. return -ENOMEM;
  165. redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
  166. if (!redirect_rule) {
  167. kfree(untagging_rule);
  168. return -ENOMEM;
  169. }
  170. cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
  171. untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
  172. untagging_rule->ingress_port_mask = cpu_ports;
  173. untagging_rule->vlan.vid.value = vid;
  174. untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
  175. untagging_rule->prio = 1;
  176. untagging_rule->id.cookie = cookie;
  177. untagging_rule->id.tc_offload = false;
  178. untagging_rule->block_id = VCAP_IS1;
  179. untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
  180. untagging_rule->lookup = 0;
  181. untagging_rule->action.vlan_pop_cnt_ena = true;
  182. untagging_rule->action.vlan_pop_cnt = 1;
  183. untagging_rule->action.pag_override_mask = 0xff;
  184. untagging_rule->action.pag_val = port;
  185. err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
  186. if (err) {
  187. kfree(untagging_rule);
  188. kfree(redirect_rule);
  189. return err;
  190. }
  191. cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
  192. redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
  193. redirect_rule->ingress_port_mask = cpu_ports;
  194. redirect_rule->pag = port;
  195. redirect_rule->prio = 1;
  196. redirect_rule->id.cookie = cookie;
  197. redirect_rule->id.tc_offload = false;
  198. redirect_rule->block_id = VCAP_IS2;
  199. redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
  200. redirect_rule->lookup = 0;
  201. redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
  202. redirect_rule->action.port_mask = BIT(port);
  203. err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
  204. if (err) {
  205. ocelot_vcap_filter_del(ocelot, untagging_rule);
  206. kfree(redirect_rule);
  207. return err;
  208. }
  209. return 0;
  210. }
  211. static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid)
  212. {
  213. struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
  214. struct ocelot_vcap_block *block_vcap_is1;
  215. struct ocelot_vcap_block *block_vcap_is2;
  216. struct ocelot *ocelot = ds->priv;
  217. unsigned long cookie;
  218. int err;
  219. block_vcap_is1 = &ocelot->block[VCAP_IS1];
  220. block_vcap_is2 = &ocelot->block[VCAP_IS2];
  221. cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
  222. untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
  223. cookie, false);
  224. if (!untagging_rule)
  225. return -ENOENT;
  226. err = ocelot_vcap_filter_del(ocelot, untagging_rule);
  227. if (err)
  228. return err;
  229. cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
  230. redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
  231. cookie, false);
  232. if (!redirect_rule)
  233. return -ENOENT;
  234. return ocelot_vcap_filter_del(ocelot, redirect_rule);
  235. }
  236. static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
  237. u16 flags)
  238. {
  239. struct dsa_port *dp = dsa_to_port(ds, port);
  240. struct dsa_port *cpu_dp;
  241. int err;
  242. /* tag_8021q.c assumes we are implementing this via port VLAN
  243. * membership, which we aren't. So we don't need to add any VCAP filter
  244. * for the CPU port.
  245. */
  246. if (!dsa_port_is_user(dp))
  247. return 0;
  248. dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  249. err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid,
  250. dsa_port_is_vlan_filtering(dp));
  251. if (err)
  252. return err;
  253. }
  254. err = felix_tag_8021q_vlan_add_tx(ds, port, vid);
  255. if (err)
  256. goto add_tx_failed;
  257. return 0;
  258. add_tx_failed:
  259. dsa_switch_for_each_cpu_port(cpu_dp, ds)
  260. felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
  261. return err;
  262. }
  263. static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
  264. {
  265. struct dsa_port *dp = dsa_to_port(ds, port);
  266. struct dsa_port *cpu_dp;
  267. int err;
  268. if (!dsa_port_is_user(dp))
  269. return 0;
  270. dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  271. err = felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp->index, vid);
  272. if (err)
  273. return err;
  274. }
  275. err = felix_tag_8021q_vlan_del_tx(ds, port, vid);
  276. if (err)
  277. goto del_tx_failed;
  278. return 0;
  279. del_tx_failed:
  280. dsa_switch_for_each_cpu_port(cpu_dp, ds)
  281. felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid,
  282. dsa_port_is_vlan_filtering(dp));
  283. return err;
  284. }
  285. static int felix_update_tag_8021q_rx_rules(struct dsa_switch *ds, int port,
  286. bool vlan_filtering)
  287. {
  288. struct ocelot_vcap_filter *outer_tagging_rule;
  289. struct ocelot_vcap_block *block_vcap_es0;
  290. struct ocelot *ocelot = ds->priv;
  291. struct dsa_port *cpu_dp;
  292. unsigned long cookie;
  293. int err;
  294. block_vcap_es0 = &ocelot->block[VCAP_ES0];
  295. dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  296. cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port,
  297. cpu_dp->index);
  298. outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
  299. cookie, false);
  300. felix_update_tag_8021q_rx_rule(outer_tagging_rule, vlan_filtering);
  301. err = ocelot_vcap_filter_replace(ocelot, outer_tagging_rule);
  302. if (err)
  303. return err;
  304. }
  305. return 0;
  306. }
  307. static int felix_trap_get_cpu_port(struct dsa_switch *ds,
  308. const struct ocelot_vcap_filter *trap)
  309. {
  310. struct dsa_port *dp;
  311. int first_port;
  312. if (WARN_ON(!trap->ingress_port_mask))
  313. return -1;
  314. first_port = __ffs(trap->ingress_port_mask);
  315. dp = dsa_to_port(ds, first_port);
  316. return dp->cpu_dp->index;
  317. }
  318. /* On switches with no extraction IRQ wired, trapped packets need to be
  319. * replicated over Ethernet as well, otherwise we'd get no notification of
  320. * their arrival when using the ocelot-8021q tagging protocol.
  321. */
  322. static int felix_update_trapping_destinations(struct dsa_switch *ds,
  323. bool using_tag_8021q)
  324. {
  325. struct ocelot *ocelot = ds->priv;
  326. struct felix *felix = ocelot_to_felix(ocelot);
  327. struct ocelot_vcap_block *block_vcap_is2;
  328. struct ocelot_vcap_filter *trap;
  329. enum ocelot_mask_mode mask_mode;
  330. unsigned long port_mask;
  331. bool cpu_copy_ena;
  332. int err;
  333. if (!felix->info->quirk_no_xtr_irq)
  334. return 0;
  335. /* We are sure that "cpu" was found, otherwise
  336. * dsa_tree_setup_default_cpu() would have failed earlier.
  337. */
  338. block_vcap_is2 = &ocelot->block[VCAP_IS2];
  339. /* Make sure all traps are set up for that destination */
  340. list_for_each_entry(trap, &block_vcap_is2->rules, list) {
  341. if (!trap->is_trap)
  342. continue;
  343. /* Figure out the current trapping destination */
  344. if (using_tag_8021q) {
  345. /* Redirect to the tag_8021q CPU port. If timestamps
  346. * are necessary, also copy trapped packets to the CPU
  347. * port module.
  348. */
  349. mask_mode = OCELOT_MASK_MODE_REDIRECT;
  350. port_mask = BIT(felix_trap_get_cpu_port(ds, trap));
  351. cpu_copy_ena = !!trap->take_ts;
  352. } else {
  353. /* Trap packets only to the CPU port module, which is
  354. * redirected to the NPI port (the DSA CPU port)
  355. */
  356. mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
  357. port_mask = 0;
  358. cpu_copy_ena = true;
  359. }
  360. if (trap->action.mask_mode == mask_mode &&
  361. trap->action.port_mask == port_mask &&
  362. trap->action.cpu_copy_ena == cpu_copy_ena)
  363. continue;
  364. trap->action.mask_mode = mask_mode;
  365. trap->action.port_mask = port_mask;
  366. trap->action.cpu_copy_ena = cpu_copy_ena;
  367. err = ocelot_vcap_filter_replace(ocelot, trap);
  368. if (err)
  369. return err;
  370. }
  371. return 0;
  372. }
  373. /* The CPU port module is connected to the Node Processor Interface (NPI). This
  374. * is the mode through which frames can be injected from and extracted to an
  375. * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
  376. * running Linux, and this forms a DSA setup together with the enetc or fman
  377. * DSA conduit.
  378. */
  379. static void felix_npi_port_init(struct ocelot *ocelot, int port)
  380. {
  381. ocelot->npi = port;
  382. ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
  383. QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
  384. QSYS_EXT_CPU_CFG);
  385. /* NPI port Injection/Extraction configuration */
  386. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
  387. ocelot->npi_xtr_prefix);
  388. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
  389. ocelot->npi_inj_prefix);
  390. /* Disable transmission of pause frames */
  391. ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
  392. }
  393. static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
  394. {
  395. /* Restore hardware defaults */
  396. int unused_port = ocelot->num_phys_ports + 2;
  397. ocelot->npi = -1;
  398. ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
  399. QSYS_EXT_CPU_CFG);
  400. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
  401. OCELOT_TAG_PREFIX_DISABLED);
  402. ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
  403. OCELOT_TAG_PREFIX_DISABLED);
  404. /* Enable transmission of pause frames */
  405. ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
  406. }
  407. static int felix_tag_npi_setup(struct dsa_switch *ds)
  408. {
  409. struct dsa_port *dp, *first_cpu_dp = NULL;
  410. struct ocelot *ocelot = ds->priv;
  411. dsa_switch_for_each_user_port(dp, ds) {
  412. if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) {
  413. dev_err(ds->dev, "Multiple NPI ports not supported\n");
  414. return -EINVAL;
  415. }
  416. first_cpu_dp = dp->cpu_dp;
  417. }
  418. if (!first_cpu_dp)
  419. return -EINVAL;
  420. felix_npi_port_init(ocelot, first_cpu_dp->index);
  421. return 0;
  422. }
  423. static void felix_tag_npi_teardown(struct dsa_switch *ds)
  424. {
  425. struct ocelot *ocelot = ds->priv;
  426. felix_npi_port_deinit(ocelot, ocelot->npi);
  427. }
  428. static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds)
  429. {
  430. struct ocelot *ocelot = ds->priv;
  431. return BIT(ocelot->num_phys_ports);
  432. }
  433. static int felix_tag_npi_change_conduit(struct dsa_switch *ds, int port,
  434. struct net_device *conduit,
  435. struct netlink_ext_ack *extack)
  436. {
  437. struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
  438. struct ocelot *ocelot = ds->priv;
  439. if (netif_is_lag_master(conduit)) {
  440. NL_SET_ERR_MSG_MOD(extack,
  441. "LAG DSA conduit only supported using ocelot-8021q");
  442. return -EOPNOTSUPP;
  443. }
  444. /* Changing the NPI port breaks user ports still assigned to the old
  445. * one, so only allow it while they're down, and don't allow them to
  446. * come back up until they're all changed to the new one.
  447. */
  448. dsa_switch_for_each_user_port(other_dp, ds) {
  449. struct net_device *user = other_dp->user;
  450. if (other_dp != dp && (user->flags & IFF_UP) &&
  451. dsa_port_to_conduit(other_dp) != conduit) {
  452. NL_SET_ERR_MSG_MOD(extack,
  453. "Cannot change while old conduit still has users");
  454. return -EOPNOTSUPP;
  455. }
  456. }
  457. felix_npi_port_deinit(ocelot, ocelot->npi);
  458. felix_npi_port_init(ocelot, felix_cpu_port_for_conduit(ds, conduit));
  459. return 0;
  460. }
  461. /* Alternatively to using the NPI functionality, that same hardware MAC
  462. * connected internally to the enetc or fman DSA conduit can be configured to
  463. * use the software-defined tag_8021q frame format. As far as the hardware is
  464. * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
  465. * module are now disconnected from it, but can still be accessed through
  466. * register-based MMIO.
  467. */
  468. static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = {
  469. .setup = felix_tag_npi_setup,
  470. .teardown = felix_tag_npi_teardown,
  471. .get_host_fwd_mask = felix_tag_npi_get_host_fwd_mask,
  472. .change_conduit = felix_tag_npi_change_conduit,
  473. };
  474. static int felix_tag_8021q_setup(struct dsa_switch *ds)
  475. {
  476. struct ocelot *ocelot = ds->priv;
  477. struct dsa_port *dp;
  478. int err;
  479. err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
  480. if (err)
  481. return err;
  482. dsa_switch_for_each_cpu_port(dp, ds)
  483. ocelot_port_setup_dsa_8021q_cpu(ocelot, dp->index);
  484. dsa_switch_for_each_user_port(dp, ds)
  485. ocelot_port_assign_dsa_8021q_cpu(ocelot, dp->index,
  486. dp->cpu_dp->index);
  487. dsa_switch_for_each_available_port(dp, ds)
  488. /* This overwrites ocelot_init():
  489. * Do not forward BPDU frames to the CPU port module,
  490. * for 2 reasons:
  491. * - When these packets are injected from the tag_8021q
  492. * CPU port, we want them to go out, not loop back
  493. * into the system.
  494. * - STP traffic ingressing on a user port should go to
  495. * the tag_8021q CPU port, not to the hardware CPU
  496. * port module.
  497. */
  498. ocelot_write_gix(ocelot,
  499. ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
  500. ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
  501. /* The ownership of the CPU port module's queues might have just been
  502. * transferred to the tag_8021q tagger from the NPI-based tagger.
  503. * So there might still be all sorts of crap in the queues. On the
  504. * other hand, the MMIO-based matching of PTP frames is very brittle,
  505. * so we need to be careful that there are no extra frames to be
  506. * dequeued over MMIO, since we would never know to discard them.
  507. */
  508. ocelot_lock_xtr_grp_bh(ocelot, 0);
  509. ocelot_drain_cpu_queue(ocelot, 0);
  510. ocelot_unlock_xtr_grp_bh(ocelot, 0);
  511. /* Problem: when using push_inner_tag=1 for ES0 tag B, we lose info
  512. * about whether the received packets were VLAN-tagged on the wire,
  513. * since they are always tagged on egress towards the CPU port.
  514. *
  515. * Since using push_inner_tag=1 is unavoidable for VLAN-aware bridges,
  516. * we must work around the fallout by untagging in software to make
  517. * untagged reception work more or less as expected.
  518. */
  519. ds->untag_vlan_aware_bridge_pvid = true;
  520. return 0;
  521. }
  522. static void felix_tag_8021q_teardown(struct dsa_switch *ds)
  523. {
  524. struct ocelot *ocelot = ds->priv;
  525. struct dsa_port *dp;
  526. dsa_switch_for_each_available_port(dp, ds)
  527. /* Restore the logic from ocelot_init:
  528. * do not forward BPDU frames to the front ports.
  529. */
  530. ocelot_write_gix(ocelot,
  531. ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
  532. ANA_PORT_CPU_FWD_BPDU_CFG,
  533. dp->index);
  534. dsa_switch_for_each_user_port(dp, ds)
  535. ocelot_port_unassign_dsa_8021q_cpu(ocelot, dp->index);
  536. dsa_switch_for_each_cpu_port(dp, ds)
  537. ocelot_port_teardown_dsa_8021q_cpu(ocelot, dp->index);
  538. dsa_tag_8021q_unregister(ds);
  539. ds->untag_vlan_aware_bridge_pvid = false;
  540. }
  541. static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)
  542. {
  543. return dsa_cpu_ports(ds);
  544. }
  545. static int felix_tag_8021q_change_conduit(struct dsa_switch *ds, int port,
  546. struct net_device *conduit,
  547. struct netlink_ext_ack *extack)
  548. {
  549. int cpu = felix_cpu_port_for_conduit(ds, conduit);
  550. struct ocelot *ocelot = ds->priv;
  551. ocelot_port_unassign_dsa_8021q_cpu(ocelot, port);
  552. ocelot_port_assign_dsa_8021q_cpu(ocelot, port, cpu);
  553. return felix_update_trapping_destinations(ds, true);
  554. }
  555. static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = {
  556. .setup = felix_tag_8021q_setup,
  557. .teardown = felix_tag_8021q_teardown,
  558. .get_host_fwd_mask = felix_tag_8021q_get_host_fwd_mask,
  559. .change_conduit = felix_tag_8021q_change_conduit,
  560. };
  561. static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask,
  562. bool uc, bool mc, bool bc)
  563. {
  564. struct ocelot *ocelot = ds->priv;
  565. unsigned long val;
  566. val = uc ? mask : 0;
  567. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC);
  568. val = mc ? mask : 0;
  569. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC);
  570. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4);
  571. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6);
  572. val = bc ? mask : 0;
  573. ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_BC);
  574. }
  575. static void
  576. felix_migrate_host_flood(struct dsa_switch *ds,
  577. const struct felix_tag_proto_ops *proto_ops,
  578. const struct felix_tag_proto_ops *old_proto_ops)
  579. {
  580. struct ocelot *ocelot = ds->priv;
  581. struct felix *felix = ocelot_to_felix(ocelot);
  582. unsigned long mask;
  583. if (old_proto_ops) {
  584. mask = old_proto_ops->get_host_fwd_mask(ds);
  585. felix_set_host_flood(ds, mask, false, false, false);
  586. }
  587. mask = proto_ops->get_host_fwd_mask(ds);
  588. felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
  589. !!felix->host_flood_mc_mask, true);
  590. }
  591. static int felix_migrate_mdbs(struct dsa_switch *ds,
  592. const struct felix_tag_proto_ops *proto_ops,
  593. const struct felix_tag_proto_ops *old_proto_ops)
  594. {
  595. struct ocelot *ocelot = ds->priv;
  596. unsigned long from, to;
  597. if (!old_proto_ops)
  598. return 0;
  599. from = old_proto_ops->get_host_fwd_mask(ds);
  600. to = proto_ops->get_host_fwd_mask(ds);
  601. return ocelot_migrate_mdbs(ocelot, from, to);
  602. }
  603. /* Configure the shared hardware resources for a transition between
  604. * @old_proto_ops and @proto_ops.
  605. * Manual migration is needed because as far as DSA is concerned, no change of
  606. * the CPU port is taking place here, just of the tagging protocol.
  607. */
  608. static int
  609. felix_tag_proto_setup_shared(struct dsa_switch *ds,
  610. const struct felix_tag_proto_ops *proto_ops,
  611. const struct felix_tag_proto_ops *old_proto_ops)
  612. {
  613. bool using_tag_8021q = (proto_ops == &felix_tag_8021q_proto_ops);
  614. int err;
  615. err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops);
  616. if (err)
  617. return err;
  618. felix_update_trapping_destinations(ds, using_tag_8021q);
  619. felix_migrate_host_flood(ds, proto_ops, old_proto_ops);
  620. return 0;
  621. }
  622. /* This always leaves the switch in a consistent state, because although the
  623. * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
  624. * or the restoration is guaranteed to work.
  625. */
  626. static int felix_change_tag_protocol(struct dsa_switch *ds,
  627. enum dsa_tag_protocol proto)
  628. {
  629. const struct felix_tag_proto_ops *old_proto_ops, *proto_ops;
  630. struct ocelot *ocelot = ds->priv;
  631. struct felix *felix = ocelot_to_felix(ocelot);
  632. int err;
  633. switch (proto) {
  634. case DSA_TAG_PROTO_SEVILLE:
  635. case DSA_TAG_PROTO_OCELOT:
  636. proto_ops = &felix_tag_npi_proto_ops;
  637. break;
  638. case DSA_TAG_PROTO_OCELOT_8021Q:
  639. proto_ops = &felix_tag_8021q_proto_ops;
  640. break;
  641. default:
  642. return -EPROTONOSUPPORT;
  643. }
  644. old_proto_ops = felix->tag_proto_ops;
  645. if (proto_ops == old_proto_ops)
  646. return 0;
  647. err = proto_ops->setup(ds);
  648. if (err)
  649. goto setup_failed;
  650. err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops);
  651. if (err)
  652. goto setup_shared_failed;
  653. if (old_proto_ops)
  654. old_proto_ops->teardown(ds);
  655. felix->tag_proto_ops = proto_ops;
  656. felix->tag_proto = proto;
  657. return 0;
  658. setup_shared_failed:
  659. proto_ops->teardown(ds);
  660. setup_failed:
  661. return err;
  662. }
  663. static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
  664. int port,
  665. enum dsa_tag_protocol mp)
  666. {
  667. struct ocelot *ocelot = ds->priv;
  668. struct felix *felix = ocelot_to_felix(ocelot);
  669. return felix->tag_proto;
  670. }
  671. static void felix_port_set_host_flood(struct dsa_switch *ds, int port,
  672. bool uc, bool mc)
  673. {
  674. struct ocelot *ocelot = ds->priv;
  675. struct felix *felix = ocelot_to_felix(ocelot);
  676. unsigned long mask;
  677. if (uc)
  678. felix->host_flood_uc_mask |= BIT(port);
  679. else
  680. felix->host_flood_uc_mask &= ~BIT(port);
  681. if (mc)
  682. felix->host_flood_mc_mask |= BIT(port);
  683. else
  684. felix->host_flood_mc_mask &= ~BIT(port);
  685. mask = felix->tag_proto_ops->get_host_fwd_mask(ds);
  686. felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask,
  687. !!felix->host_flood_mc_mask, true);
  688. }
  689. static int felix_port_change_conduit(struct dsa_switch *ds, int port,
  690. struct net_device *conduit,
  691. struct netlink_ext_ack *extack)
  692. {
  693. struct ocelot *ocelot = ds->priv;
  694. struct felix *felix = ocelot_to_felix(ocelot);
  695. return felix->tag_proto_ops->change_conduit(ds, port, conduit, extack);
  696. }
  697. static int felix_set_ageing_time(struct dsa_switch *ds,
  698. unsigned int ageing_time)
  699. {
  700. struct ocelot *ocelot = ds->priv;
  701. ocelot_set_ageing_time(ocelot, ageing_time);
  702. return 0;
  703. }
  704. static void felix_port_fast_age(struct dsa_switch *ds, int port)
  705. {
  706. struct ocelot *ocelot = ds->priv;
  707. int err;
  708. err = ocelot_mact_flush(ocelot, port);
  709. if (err)
  710. dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
  711. port, ERR_PTR(err));
  712. }
  713. static int felix_fdb_dump(struct dsa_switch *ds, int port,
  714. dsa_fdb_dump_cb_t *cb, void *data)
  715. {
  716. struct ocelot *ocelot = ds->priv;
  717. return ocelot_fdb_dump(ocelot, port, cb, data);
  718. }
  719. static int felix_fdb_add(struct dsa_switch *ds, int port,
  720. const unsigned char *addr, u16 vid,
  721. struct dsa_db db)
  722. {
  723. struct net_device *bridge_dev = felix_classify_db(db);
  724. struct dsa_port *dp = dsa_to_port(ds, port);
  725. struct ocelot *ocelot = ds->priv;
  726. if (IS_ERR(bridge_dev))
  727. return PTR_ERR(bridge_dev);
  728. if (dsa_port_is_cpu(dp) && !bridge_dev &&
  729. dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
  730. return 0;
  731. if (dsa_port_is_cpu(dp))
  732. port = PGID_CPU;
  733. return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
  734. }
  735. static int felix_fdb_del(struct dsa_switch *ds, int port,
  736. const unsigned char *addr, u16 vid,
  737. struct dsa_db db)
  738. {
  739. struct net_device *bridge_dev = felix_classify_db(db);
  740. struct dsa_port *dp = dsa_to_port(ds, port);
  741. struct ocelot *ocelot = ds->priv;
  742. if (IS_ERR(bridge_dev))
  743. return PTR_ERR(bridge_dev);
  744. if (dsa_port_is_cpu(dp) && !bridge_dev &&
  745. dsa_fdb_present_in_other_db(ds, port, addr, vid, db))
  746. return 0;
  747. if (dsa_port_is_cpu(dp))
  748. port = PGID_CPU;
  749. return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
  750. }
  751. static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
  752. const unsigned char *addr, u16 vid,
  753. struct dsa_db db)
  754. {
  755. struct net_device *bridge_dev = felix_classify_db(db);
  756. struct ocelot *ocelot = ds->priv;
  757. if (IS_ERR(bridge_dev))
  758. return PTR_ERR(bridge_dev);
  759. return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
  760. }
  761. static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
  762. const unsigned char *addr, u16 vid,
  763. struct dsa_db db)
  764. {
  765. struct net_device *bridge_dev = felix_classify_db(db);
  766. struct ocelot *ocelot = ds->priv;
  767. if (IS_ERR(bridge_dev))
  768. return PTR_ERR(bridge_dev);
  769. return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
  770. }
  771. static int felix_mdb_add(struct dsa_switch *ds, int port,
  772. const struct switchdev_obj_port_mdb *mdb,
  773. struct dsa_db db)
  774. {
  775. struct net_device *bridge_dev = felix_classify_db(db);
  776. struct ocelot *ocelot = ds->priv;
  777. if (IS_ERR(bridge_dev))
  778. return PTR_ERR(bridge_dev);
  779. if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
  780. dsa_mdb_present_in_other_db(ds, port, mdb, db))
  781. return 0;
  782. if (port == ocelot->npi)
  783. port = ocelot->num_phys_ports;
  784. return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
  785. }
  786. static int felix_mdb_del(struct dsa_switch *ds, int port,
  787. const struct switchdev_obj_port_mdb *mdb,
  788. struct dsa_db db)
  789. {
  790. struct net_device *bridge_dev = felix_classify_db(db);
  791. struct ocelot *ocelot = ds->priv;
  792. if (IS_ERR(bridge_dev))
  793. return PTR_ERR(bridge_dev);
  794. if (dsa_is_cpu_port(ds, port) && !bridge_dev &&
  795. dsa_mdb_present_in_other_db(ds, port, mdb, db))
  796. return 0;
  797. if (port == ocelot->npi)
  798. port = ocelot->num_phys_ports;
  799. return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
  800. }
  801. static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
  802. u8 state)
  803. {
  804. struct ocelot *ocelot = ds->priv;
  805. return ocelot_bridge_stp_state_set(ocelot, port, state);
  806. }
  807. static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
  808. struct switchdev_brport_flags val,
  809. struct netlink_ext_ack *extack)
  810. {
  811. struct ocelot *ocelot = ds->priv;
  812. return ocelot_port_pre_bridge_flags(ocelot, port, val);
  813. }
  814. static int felix_bridge_flags(struct dsa_switch *ds, int port,
  815. struct switchdev_brport_flags val,
  816. struct netlink_ext_ack *extack)
  817. {
  818. struct ocelot *ocelot = ds->priv;
  819. if (port == ocelot->npi)
  820. port = ocelot->num_phys_ports;
  821. ocelot_port_bridge_flags(ocelot, port, val);
  822. return 0;
  823. }
  824. static int felix_bridge_join(struct dsa_switch *ds, int port,
  825. struct dsa_bridge bridge, bool *tx_fwd_offload,
  826. struct netlink_ext_ack *extack)
  827. {
  828. struct ocelot *ocelot = ds->priv;
  829. return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
  830. extack);
  831. }
  832. static void felix_bridge_leave(struct dsa_switch *ds, int port,
  833. struct dsa_bridge bridge)
  834. {
  835. struct ocelot *ocelot = ds->priv;
  836. ocelot_port_bridge_leave(ocelot, port, bridge.dev);
  837. }
  838. static int felix_lag_join(struct dsa_switch *ds, int port,
  839. struct dsa_lag lag,
  840. struct netdev_lag_upper_info *info,
  841. struct netlink_ext_ack *extack)
  842. {
  843. struct ocelot *ocelot = ds->priv;
  844. int err;
  845. err = ocelot_port_lag_join(ocelot, port, lag.dev, info, extack);
  846. if (err)
  847. return err;
  848. /* Update the logical LAG port that serves as tag_8021q CPU port */
  849. if (!dsa_is_cpu_port(ds, port))
  850. return 0;
  851. return felix_port_change_conduit(ds, port, lag.dev, extack);
  852. }
  853. static int felix_lag_leave(struct dsa_switch *ds, int port,
  854. struct dsa_lag lag)
  855. {
  856. struct ocelot *ocelot = ds->priv;
  857. ocelot_port_lag_leave(ocelot, port, lag.dev);
  858. /* Update the logical LAG port that serves as tag_8021q CPU port */
  859. if (!dsa_is_cpu_port(ds, port))
  860. return 0;
  861. return felix_port_change_conduit(ds, port, lag.dev, NULL);
  862. }
  863. static int felix_lag_change(struct dsa_switch *ds, int port)
  864. {
  865. struct dsa_port *dp = dsa_to_port(ds, port);
  866. struct ocelot *ocelot = ds->priv;
  867. ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
  868. return 0;
  869. }
  870. static int felix_vlan_prepare(struct dsa_switch *ds, int port,
  871. const struct switchdev_obj_port_vlan *vlan,
  872. struct netlink_ext_ack *extack)
  873. {
  874. struct ocelot *ocelot = ds->priv;
  875. u16 flags = vlan->flags;
  876. /* Ocelot switches copy frames as-is to the CPU, so the flags:
  877. * egress-untagged or not, pvid or not, make no difference. This
  878. * behavior is already better than what DSA just tries to approximate
  879. * when it installs the VLAN with the same flags on the CPU port.
  880. * Just accept any configuration, and don't let ocelot deny installing
  881. * multiple native VLANs on the NPI port, because the switch doesn't
  882. * look at the port tag settings towards the NPI interface anyway.
  883. */
  884. if (port == ocelot->npi)
  885. return 0;
  886. return ocelot_vlan_prepare(ocelot, port, vlan->vid,
  887. flags & BRIDGE_VLAN_INFO_PVID,
  888. flags & BRIDGE_VLAN_INFO_UNTAGGED,
  889. extack);
  890. }
  891. static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
  892. struct netlink_ext_ack *extack)
  893. {
  894. struct ocelot *ocelot = ds->priv;
  895. bool using_tag_8021q;
  896. struct felix *felix;
  897. int err;
  898. err = ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
  899. if (err)
  900. return err;
  901. felix = ocelot_to_felix(ocelot);
  902. using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
  903. if (using_tag_8021q) {
  904. err = felix_update_tag_8021q_rx_rules(ds, port, enabled);
  905. if (err)
  906. return err;
  907. }
  908. return 0;
  909. }
  910. static int felix_vlan_add(struct dsa_switch *ds, int port,
  911. const struct switchdev_obj_port_vlan *vlan,
  912. struct netlink_ext_ack *extack)
  913. {
  914. struct ocelot *ocelot = ds->priv;
  915. u16 flags = vlan->flags;
  916. int err;
  917. err = felix_vlan_prepare(ds, port, vlan, extack);
  918. if (err)
  919. return err;
  920. return ocelot_vlan_add(ocelot, port, vlan->vid,
  921. flags & BRIDGE_VLAN_INFO_PVID,
  922. flags & BRIDGE_VLAN_INFO_UNTAGGED);
  923. }
  924. static int felix_vlan_del(struct dsa_switch *ds, int port,
  925. const struct switchdev_obj_port_vlan *vlan)
  926. {
  927. struct ocelot *ocelot = ds->priv;
  928. return ocelot_vlan_del(ocelot, port, vlan->vid);
  929. }
  930. static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
  931. struct phylink_config *config)
  932. {
  933. struct ocelot *ocelot = ds->priv;
  934. config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
  935. MAC_10 | MAC_100 | MAC_1000FD |
  936. MAC_2500FD;
  937. __set_bit(ocelot->ports[port]->phy_mode,
  938. config->supported_interfaces);
  939. }
  940. static void felix_phylink_mac_config(struct phylink_config *config,
  941. unsigned int mode,
  942. const struct phylink_link_state *state)
  943. {
  944. struct dsa_port *dp = dsa_phylink_to_port(config);
  945. struct ocelot *ocelot = dp->ds->priv;
  946. int port = dp->index;
  947. struct felix *felix;
  948. felix = ocelot_to_felix(ocelot);
  949. if (felix->info->phylink_mac_config)
  950. felix->info->phylink_mac_config(ocelot, port, mode, state);
  951. }
  952. static struct phylink_pcs *
  953. felix_phylink_mac_select_pcs(struct phylink_config *config,
  954. phy_interface_t iface)
  955. {
  956. struct dsa_port *dp = dsa_phylink_to_port(config);
  957. struct ocelot *ocelot = dp->ds->priv;
  958. struct phylink_pcs *pcs = NULL;
  959. int port = dp->index;
  960. struct felix *felix;
  961. felix = ocelot_to_felix(ocelot);
  962. if (felix->pcs && felix->pcs[port])
  963. pcs = felix->pcs[port];
  964. return pcs;
  965. }
  966. static void felix_phylink_mac_link_down(struct phylink_config *config,
  967. unsigned int link_an_mode,
  968. phy_interface_t interface)
  969. {
  970. struct dsa_port *dp = dsa_phylink_to_port(config);
  971. struct ocelot *ocelot = dp->ds->priv;
  972. int port = dp->index;
  973. struct felix *felix;
  974. felix = ocelot_to_felix(ocelot);
  975. ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
  976. felix->info->quirks);
  977. }
  978. static void felix_phylink_mac_link_up(struct phylink_config *config,
  979. struct phy_device *phydev,
  980. unsigned int link_an_mode,
  981. phy_interface_t interface,
  982. int speed, int duplex,
  983. bool tx_pause, bool rx_pause)
  984. {
  985. struct dsa_port *dp = dsa_phylink_to_port(config);
  986. struct ocelot *ocelot = dp->ds->priv;
  987. int port = dp->index;
  988. struct felix *felix;
  989. felix = ocelot_to_felix(ocelot);
  990. ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
  991. interface, speed, duplex, tx_pause, rx_pause,
  992. felix->info->quirks);
  993. if (felix->info->port_sched_speed_set)
  994. felix->info->port_sched_speed_set(ocelot, port, speed);
  995. }
  996. static int felix_port_enable(struct dsa_switch *ds, int port,
  997. struct phy_device *phydev)
  998. {
  999. struct dsa_port *dp = dsa_to_port(ds, port);
  1000. struct ocelot *ocelot = ds->priv;
  1001. if (!dsa_port_is_user(dp))
  1002. return 0;
  1003. if (ocelot->npi >= 0) {
  1004. struct net_device *conduit = dsa_port_to_conduit(dp);
  1005. if (felix_cpu_port_for_conduit(ds, conduit) != ocelot->npi) {
  1006. dev_err(ds->dev, "Multiple conduits are not allowed\n");
  1007. return -EINVAL;
  1008. }
  1009. }
  1010. return 0;
  1011. }
  1012. static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
  1013. {
  1014. int i;
  1015. ocelot_rmw_gix(ocelot,
  1016. ANA_PORT_QOS_CFG_QOS_PCP_ENA,
  1017. ANA_PORT_QOS_CFG_QOS_PCP_ENA,
  1018. ANA_PORT_QOS_CFG,
  1019. port);
  1020. for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
  1021. ocelot_rmw_ix(ocelot,
  1022. (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
  1023. ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
  1024. ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
  1025. ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
  1026. ANA_PORT_PCP_DEI_MAP,
  1027. port, i);
  1028. }
  1029. }
  1030. static void felix_get_stats64(struct dsa_switch *ds, int port,
  1031. struct rtnl_link_stats64 *stats)
  1032. {
  1033. struct ocelot *ocelot = ds->priv;
  1034. ocelot_port_get_stats64(ocelot, port, stats);
  1035. }
  1036. static void felix_get_pause_stats(struct dsa_switch *ds, int port,
  1037. struct ethtool_pause_stats *pause_stats)
  1038. {
  1039. struct ocelot *ocelot = ds->priv;
  1040. ocelot_port_get_pause_stats(ocelot, port, pause_stats);
  1041. }
  1042. static void felix_get_rmon_stats(struct dsa_switch *ds, int port,
  1043. struct ethtool_rmon_stats *rmon_stats,
  1044. const struct ethtool_rmon_hist_range **ranges)
  1045. {
  1046. struct ocelot *ocelot = ds->priv;
  1047. ocelot_port_get_rmon_stats(ocelot, port, rmon_stats, ranges);
  1048. }
  1049. static void felix_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
  1050. struct ethtool_eth_ctrl_stats *ctrl_stats)
  1051. {
  1052. struct ocelot *ocelot = ds->priv;
  1053. ocelot_port_get_eth_ctrl_stats(ocelot, port, ctrl_stats);
  1054. }
  1055. static void felix_get_eth_mac_stats(struct dsa_switch *ds, int port,
  1056. struct ethtool_eth_mac_stats *mac_stats)
  1057. {
  1058. struct ocelot *ocelot = ds->priv;
  1059. ocelot_port_get_eth_mac_stats(ocelot, port, mac_stats);
  1060. }
  1061. static void felix_get_eth_phy_stats(struct dsa_switch *ds, int port,
  1062. struct ethtool_eth_phy_stats *phy_stats)
  1063. {
  1064. struct ocelot *ocelot = ds->priv;
  1065. ocelot_port_get_eth_phy_stats(ocelot, port, phy_stats);
  1066. }
  1067. static void felix_get_strings(struct dsa_switch *ds, int port,
  1068. u32 stringset, u8 *data)
  1069. {
  1070. struct ocelot *ocelot = ds->priv;
  1071. return ocelot_get_strings(ocelot, port, stringset, data);
  1072. }
  1073. static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
  1074. {
  1075. struct ocelot *ocelot = ds->priv;
  1076. ocelot_get_ethtool_stats(ocelot, port, data);
  1077. }
  1078. static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
  1079. {
  1080. struct ocelot *ocelot = ds->priv;
  1081. return ocelot_get_sset_count(ocelot, port, sset);
  1082. }
  1083. static int felix_get_ts_info(struct dsa_switch *ds, int port,
  1084. struct kernel_ethtool_ts_info *info)
  1085. {
  1086. struct ocelot *ocelot = ds->priv;
  1087. return ocelot_get_ts_info(ocelot, port, info);
  1088. }
  1089. static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
  1090. [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
  1091. [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
  1092. [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
  1093. [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
  1094. [PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,
  1095. [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
  1096. };
  1097. static int felix_validate_phy_mode(struct felix *felix, int port,
  1098. phy_interface_t phy_mode)
  1099. {
  1100. u32 modes = felix->info->port_modes[port];
  1101. if (felix_phy_match_table[phy_mode] & modes)
  1102. return 0;
  1103. return -EOPNOTSUPP;
  1104. }
  1105. static int felix_parse_ports_node(struct felix *felix,
  1106. struct device_node *ports_node,
  1107. phy_interface_t *port_phy_modes)
  1108. {
  1109. struct device *dev = felix->ocelot.dev;
  1110. for_each_available_child_of_node_scoped(ports_node, child) {
  1111. phy_interface_t phy_mode;
  1112. u32 port;
  1113. int err;
  1114. /* Get switch port number from DT */
  1115. if (of_property_read_u32(child, "reg", &port) < 0) {
  1116. dev_err(dev, "Port number not defined in device tree "
  1117. "(property \"reg\")\n");
  1118. return -ENODEV;
  1119. }
  1120. /* Get PHY mode from DT */
  1121. err = of_get_phy_mode(child, &phy_mode);
  1122. if (err) {
  1123. dev_err(dev, "Failed to read phy-mode or "
  1124. "phy-interface-type property for port %d\n",
  1125. port);
  1126. return -ENODEV;
  1127. }
  1128. err = felix_validate_phy_mode(felix, port, phy_mode);
  1129. if (err < 0) {
  1130. dev_info(dev, "Unsupported PHY mode %s on port %d\n",
  1131. phy_modes(phy_mode), port);
  1132. /* Leave port_phy_modes[port] = 0, which is also
  1133. * PHY_INTERFACE_MODE_NA. This will perform a
  1134. * best-effort to bring up as many ports as possible.
  1135. */
  1136. continue;
  1137. }
  1138. port_phy_modes[port] = phy_mode;
  1139. }
  1140. return 0;
  1141. }
  1142. static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
  1143. {
  1144. struct device *dev = felix->ocelot.dev;
  1145. struct device_node *switch_node;
  1146. struct device_node *ports_node;
  1147. int err;
  1148. switch_node = dev->of_node;
  1149. ports_node = of_get_child_by_name(switch_node, "ports");
  1150. if (!ports_node)
  1151. ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
  1152. if (!ports_node) {
  1153. dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
  1154. return -ENODEV;
  1155. }
  1156. err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
  1157. of_node_put(ports_node);
  1158. return err;
  1159. }
  1160. static struct regmap *felix_request_regmap_by_name(struct felix *felix,
  1161. const char *resource_name)
  1162. {
  1163. struct ocelot *ocelot = &felix->ocelot;
  1164. struct resource res;
  1165. int i;
  1166. /* In an MFD configuration, regmaps are registered directly to the
  1167. * parent device before the child devices are probed, so there is no
  1168. * need to initialize a new one.
  1169. */
  1170. if (!felix->info->resources)
  1171. return dev_get_regmap(ocelot->dev->parent, resource_name);
  1172. for (i = 0; i < felix->info->num_resources; i++) {
  1173. if (strcmp(resource_name, felix->info->resources[i].name))
  1174. continue;
  1175. memcpy(&res, &felix->info->resources[i], sizeof(res));
  1176. res.start += felix->switch_base;
  1177. res.end += felix->switch_base;
  1178. return ocelot_regmap_init(ocelot, &res);
  1179. }
  1180. return ERR_PTR(-ENOENT);
  1181. }
  1182. static struct regmap *felix_request_regmap(struct felix *felix,
  1183. enum ocelot_target target)
  1184. {
  1185. const char *resource_name = felix->info->resource_names[target];
  1186. /* If the driver didn't provide a resource name for the target,
  1187. * the resource is optional.
  1188. */
  1189. if (!resource_name)
  1190. return NULL;
  1191. return felix_request_regmap_by_name(felix, resource_name);
  1192. }
  1193. static struct regmap *felix_request_port_regmap(struct felix *felix, int port)
  1194. {
  1195. char resource_name[32];
  1196. sprintf(resource_name, "port%d", port);
  1197. return felix_request_regmap_by_name(felix, resource_name);
  1198. }
  1199. static int felix_init_structs(struct felix *felix, int num_phys_ports)
  1200. {
  1201. struct ocelot *ocelot = &felix->ocelot;
  1202. phy_interface_t *port_phy_modes;
  1203. struct regmap *target;
  1204. int port, i, err;
  1205. ocelot->num_phys_ports = num_phys_ports;
  1206. ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
  1207. sizeof(struct ocelot_port *), GFP_KERNEL);
  1208. if (!ocelot->ports)
  1209. return -ENOMEM;
  1210. ocelot->map = felix->info->map;
  1211. ocelot->num_mact_rows = felix->info->num_mact_rows;
  1212. ocelot->vcap = felix->info->vcap;
  1213. ocelot->vcap_pol.base = felix->info->vcap_pol_base;
  1214. ocelot->vcap_pol.max = felix->info->vcap_pol_max;
  1215. ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
  1216. ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
  1217. ocelot->ops = felix->info->ops;
  1218. ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
  1219. ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
  1220. ocelot->devlink = felix->ds->devlink;
  1221. port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
  1222. GFP_KERNEL);
  1223. if (!port_phy_modes)
  1224. return -ENOMEM;
  1225. err = felix_parse_dt(felix, port_phy_modes);
  1226. if (err) {
  1227. kfree(port_phy_modes);
  1228. return err;
  1229. }
  1230. for (i = 0; i < TARGET_MAX; i++) {
  1231. target = felix_request_regmap(felix, i);
  1232. if (IS_ERR(target)) {
  1233. dev_err(ocelot->dev,
  1234. "Failed to map device memory space: %pe\n",
  1235. target);
  1236. kfree(port_phy_modes);
  1237. return PTR_ERR(target);
  1238. }
  1239. ocelot->targets[i] = target;
  1240. }
  1241. err = ocelot_regfields_init(ocelot, felix->info->regfields);
  1242. if (err) {
  1243. dev_err(ocelot->dev, "failed to init reg fields map\n");
  1244. kfree(port_phy_modes);
  1245. return err;
  1246. }
  1247. for (port = 0; port < num_phys_ports; port++) {
  1248. struct ocelot_port *ocelot_port;
  1249. ocelot_port = devm_kzalloc(ocelot->dev,
  1250. sizeof(struct ocelot_port),
  1251. GFP_KERNEL);
  1252. if (!ocelot_port) {
  1253. dev_err(ocelot->dev,
  1254. "failed to allocate port memory\n");
  1255. kfree(port_phy_modes);
  1256. return -ENOMEM;
  1257. }
  1258. target = felix_request_port_regmap(felix, port);
  1259. if (IS_ERR(target)) {
  1260. dev_err(ocelot->dev,
  1261. "Failed to map memory space for port %d: %pe\n",
  1262. port, target);
  1263. kfree(port_phy_modes);
  1264. return PTR_ERR(target);
  1265. }
  1266. ocelot_port->phy_mode = port_phy_modes[port];
  1267. ocelot_port->ocelot = ocelot;
  1268. ocelot_port->target = target;
  1269. ocelot_port->index = port;
  1270. ocelot->ports[port] = ocelot_port;
  1271. }
  1272. kfree(port_phy_modes);
  1273. if (felix->info->mdio_bus_alloc) {
  1274. err = felix->info->mdio_bus_alloc(ocelot);
  1275. if (err < 0)
  1276. return err;
  1277. }
  1278. return 0;
  1279. }
  1280. static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
  1281. struct sk_buff *skb)
  1282. {
  1283. struct ocelot_port *ocelot_port = ocelot->ports[port];
  1284. struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
  1285. struct sk_buff *skb_match = NULL, *skb_tmp;
  1286. unsigned long flags;
  1287. if (!clone)
  1288. return;
  1289. spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
  1290. skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
  1291. if (skb != clone)
  1292. continue;
  1293. __skb_unlink(skb, &ocelot_port->tx_skbs);
  1294. skb_match = skb;
  1295. break;
  1296. }
  1297. spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
  1298. WARN_ONCE(!skb_match,
  1299. "Could not find skb clone in TX timestamping list\n");
  1300. }
  1301. #define work_to_xmit_work(w) \
  1302. container_of((w), struct felix_deferred_xmit_work, work)
  1303. static void felix_port_deferred_xmit(struct kthread_work *work)
  1304. {
  1305. struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
  1306. struct dsa_switch *ds = xmit_work->dp->ds;
  1307. struct sk_buff *skb = xmit_work->skb;
  1308. u32 rew_op = ocelot_ptp_rew_op(skb);
  1309. struct ocelot *ocelot = ds->priv;
  1310. int port = xmit_work->dp->index;
  1311. int retries = 10;
  1312. ocelot_lock_inj_grp(ocelot, 0);
  1313. do {
  1314. if (ocelot_can_inject(ocelot, 0))
  1315. break;
  1316. cpu_relax();
  1317. } while (--retries);
  1318. if (!retries) {
  1319. ocelot_unlock_inj_grp(ocelot, 0);
  1320. dev_err(ocelot->dev, "port %d failed to inject skb\n",
  1321. port);
  1322. ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
  1323. kfree_skb(skb);
  1324. return;
  1325. }
  1326. ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
  1327. ocelot_unlock_inj_grp(ocelot, 0);
  1328. consume_skb(skb);
  1329. kfree(xmit_work);
  1330. }
  1331. static int felix_connect_tag_protocol(struct dsa_switch *ds,
  1332. enum dsa_tag_protocol proto)
  1333. {
  1334. struct ocelot_8021q_tagger_data *tagger_data;
  1335. switch (proto) {
  1336. case DSA_TAG_PROTO_OCELOT_8021Q:
  1337. tagger_data = ocelot_8021q_tagger_data(ds);
  1338. tagger_data->xmit_work_fn = felix_port_deferred_xmit;
  1339. return 0;
  1340. case DSA_TAG_PROTO_OCELOT:
  1341. case DSA_TAG_PROTO_SEVILLE:
  1342. return 0;
  1343. default:
  1344. return -EPROTONOSUPPORT;
  1345. }
  1346. }
  1347. static int felix_setup(struct dsa_switch *ds)
  1348. {
  1349. struct ocelot *ocelot = ds->priv;
  1350. struct felix *felix = ocelot_to_felix(ocelot);
  1351. struct dsa_port *dp;
  1352. int err;
  1353. err = felix_init_structs(felix, ds->num_ports);
  1354. if (err)
  1355. return err;
  1356. if (ocelot->targets[HSIO])
  1357. ocelot_pll5_init(ocelot);
  1358. err = ocelot_init(ocelot);
  1359. if (err)
  1360. goto out_mdiobus_free;
  1361. if (ocelot->ptp) {
  1362. err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
  1363. if (err) {
  1364. dev_err(ocelot->dev,
  1365. "Timestamp initialization failed\n");
  1366. ocelot->ptp = 0;
  1367. }
  1368. }
  1369. dsa_switch_for_each_available_port(dp, ds) {
  1370. ocelot_init_port(ocelot, dp->index);
  1371. if (felix->info->configure_serdes)
  1372. felix->info->configure_serdes(ocelot, dp->index,
  1373. dp->dn);
  1374. /* Set the default QoS Classification based on PCP and DEI
  1375. * bits of vlan tag.
  1376. */
  1377. felix_port_qos_map_init(ocelot, dp->index);
  1378. }
  1379. if (felix->info->request_irq) {
  1380. err = felix->info->request_irq(ocelot);
  1381. if (err) {
  1382. dev_err(ocelot->dev, "Failed to request IRQ: %pe\n",
  1383. ERR_PTR(err));
  1384. goto out_deinit_ports;
  1385. }
  1386. }
  1387. err = ocelot_devlink_sb_register(ocelot);
  1388. if (err)
  1389. goto out_deinit_ports;
  1390. /* The initial tag protocol is NPI which won't fail during initial
  1391. * setup, there's no real point in checking for errors.
  1392. */
  1393. felix_change_tag_protocol(ds, felix->tag_proto);
  1394. ds->mtu_enforcement_ingress = true;
  1395. ds->assisted_learning_on_cpu_port = true;
  1396. ds->fdb_isolation = true;
  1397. ds->max_num_bridges = ds->num_ports;
  1398. return 0;
  1399. out_deinit_ports:
  1400. dsa_switch_for_each_available_port(dp, ds)
  1401. ocelot_deinit_port(ocelot, dp->index);
  1402. ocelot_deinit_timestamp(ocelot);
  1403. ocelot_deinit(ocelot);
  1404. out_mdiobus_free:
  1405. if (felix->info->mdio_bus_free)
  1406. felix->info->mdio_bus_free(ocelot);
  1407. return err;
  1408. }
  1409. static void felix_teardown(struct dsa_switch *ds)
  1410. {
  1411. struct ocelot *ocelot = ds->priv;
  1412. struct felix *felix = ocelot_to_felix(ocelot);
  1413. struct dsa_port *dp;
  1414. rtnl_lock();
  1415. if (felix->tag_proto_ops)
  1416. felix->tag_proto_ops->teardown(ds);
  1417. rtnl_unlock();
  1418. dsa_switch_for_each_available_port(dp, ds)
  1419. ocelot_deinit_port(ocelot, dp->index);
  1420. ocelot_devlink_sb_unregister(ocelot);
  1421. ocelot_deinit_timestamp(ocelot);
  1422. ocelot_deinit(ocelot);
  1423. if (felix->info->mdio_bus_free)
  1424. felix->info->mdio_bus_free(ocelot);
  1425. }
  1426. static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
  1427. struct ifreq *ifr)
  1428. {
  1429. struct ocelot *ocelot = ds->priv;
  1430. return ocelot_hwstamp_get(ocelot, port, ifr);
  1431. }
  1432. static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
  1433. struct ifreq *ifr)
  1434. {
  1435. struct ocelot *ocelot = ds->priv;
  1436. struct felix *felix = ocelot_to_felix(ocelot);
  1437. bool using_tag_8021q;
  1438. int err;
  1439. err = ocelot_hwstamp_set(ocelot, port, ifr);
  1440. if (err)
  1441. return err;
  1442. using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
  1443. return felix_update_trapping_destinations(ds, using_tag_8021q);
  1444. }
  1445. static bool felix_check_xtr_pkt(struct ocelot *ocelot)
  1446. {
  1447. struct felix *felix = ocelot_to_felix(ocelot);
  1448. int err = 0, grp = 0;
  1449. if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
  1450. return false;
  1451. if (!felix->info->quirk_no_xtr_irq)
  1452. return false;
  1453. ocelot_lock_xtr_grp(ocelot, grp);
  1454. while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
  1455. struct sk_buff *skb;
  1456. unsigned int type;
  1457. err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
  1458. if (err)
  1459. goto out;
  1460. /* We trap to the CPU port module all PTP frames, but
  1461. * felix_rxtstamp() only gets called for event frames.
  1462. * So we need to avoid sending duplicate general
  1463. * message frames by running a second BPF classifier
  1464. * here and dropping those.
  1465. */
  1466. __skb_push(skb, ETH_HLEN);
  1467. type = ptp_classify_raw(skb);
  1468. __skb_pull(skb, ETH_HLEN);
  1469. if (type == PTP_CLASS_NONE) {
  1470. kfree_skb(skb);
  1471. continue;
  1472. }
  1473. netif_rx(skb);
  1474. }
  1475. out:
  1476. if (err < 0) {
  1477. dev_err_ratelimited(ocelot->dev,
  1478. "Error during packet extraction: %pe\n",
  1479. ERR_PTR(err));
  1480. ocelot_drain_cpu_queue(ocelot, 0);
  1481. }
  1482. ocelot_unlock_xtr_grp(ocelot, grp);
  1483. return true;
  1484. }
  1485. static bool felix_rxtstamp(struct dsa_switch *ds, int port,
  1486. struct sk_buff *skb, unsigned int type)
  1487. {
  1488. u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
  1489. struct skb_shared_hwtstamps *shhwtstamps;
  1490. struct ocelot *ocelot = ds->priv;
  1491. struct timespec64 ts;
  1492. u32 tstamp_hi;
  1493. u64 tstamp;
  1494. switch (type & PTP_CLASS_PMASK) {
  1495. case PTP_CLASS_L2:
  1496. if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L2))
  1497. return false;
  1498. break;
  1499. case PTP_CLASS_IPV4:
  1500. case PTP_CLASS_IPV6:
  1501. if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L4))
  1502. return false;
  1503. break;
  1504. }
  1505. /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
  1506. * for RX timestamping. Then free it, and poll for its copy through
  1507. * MMIO in the CPU port module, and inject that into the stack from
  1508. * ocelot_xtr_poll().
  1509. */
  1510. if (felix_check_xtr_pkt(ocelot)) {
  1511. kfree_skb(skb);
  1512. return true;
  1513. }
  1514. ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
  1515. tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
  1516. tstamp_hi = tstamp >> 32;
  1517. if ((tstamp & 0xffffffff) < tstamp_lo)
  1518. tstamp_hi--;
  1519. tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
  1520. shhwtstamps = skb_hwtstamps(skb);
  1521. memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
  1522. shhwtstamps->hwtstamp = tstamp;
  1523. return false;
  1524. }
  1525. static void felix_txtstamp(struct dsa_switch *ds, int port,
  1526. struct sk_buff *skb)
  1527. {
  1528. struct ocelot *ocelot = ds->priv;
  1529. struct sk_buff *clone = NULL;
  1530. if (!ocelot->ptp)
  1531. return;
  1532. if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
  1533. dev_err_ratelimited(ds->dev,
  1534. "port %d delivering skb without TX timestamp\n",
  1535. port);
  1536. return;
  1537. }
  1538. if (clone)
  1539. OCELOT_SKB_CB(skb)->clone = clone;
  1540. }
  1541. static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
  1542. {
  1543. struct ocelot *ocelot = ds->priv;
  1544. struct ocelot_port *ocelot_port = ocelot->ports[port];
  1545. ocelot_port_set_maxlen(ocelot, port, new_mtu);
  1546. mutex_lock(&ocelot->fwd_domain_lock);
  1547. if (ocelot_port->taprio && ocelot->ops->tas_guard_bands_update)
  1548. ocelot->ops->tas_guard_bands_update(ocelot, port);
  1549. mutex_unlock(&ocelot->fwd_domain_lock);
  1550. return 0;
  1551. }
  1552. static int felix_get_max_mtu(struct dsa_switch *ds, int port)
  1553. {
  1554. struct ocelot *ocelot = ds->priv;
  1555. return ocelot_get_max_mtu(ocelot, port);
  1556. }
  1557. static int felix_cls_flower_add(struct dsa_switch *ds, int port,
  1558. struct flow_cls_offload *cls, bool ingress)
  1559. {
  1560. struct ocelot *ocelot = ds->priv;
  1561. struct felix *felix = ocelot_to_felix(ocelot);
  1562. bool using_tag_8021q;
  1563. int err;
  1564. err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
  1565. if (err)
  1566. return err;
  1567. using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
  1568. return felix_update_trapping_destinations(ds, using_tag_8021q);
  1569. }
  1570. static int felix_cls_flower_del(struct dsa_switch *ds, int port,
  1571. struct flow_cls_offload *cls, bool ingress)
  1572. {
  1573. struct ocelot *ocelot = ds->priv;
  1574. return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
  1575. }
  1576. static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
  1577. struct flow_cls_offload *cls, bool ingress)
  1578. {
  1579. struct ocelot *ocelot = ds->priv;
  1580. return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
  1581. }
  1582. static int felix_port_policer_add(struct dsa_switch *ds, int port,
  1583. struct dsa_mall_policer_tc_entry *policer)
  1584. {
  1585. struct ocelot *ocelot = ds->priv;
  1586. struct ocelot_policer pol = {
  1587. .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
  1588. .burst = policer->burst,
  1589. };
  1590. return ocelot_port_policer_add(ocelot, port, &pol);
  1591. }
  1592. static void felix_port_policer_del(struct dsa_switch *ds, int port)
  1593. {
  1594. struct ocelot *ocelot = ds->priv;
  1595. ocelot_port_policer_del(ocelot, port);
  1596. }
  1597. static int felix_port_mirror_add(struct dsa_switch *ds, int port,
  1598. struct dsa_mall_mirror_tc_entry *mirror,
  1599. bool ingress, struct netlink_ext_ack *extack)
  1600. {
  1601. struct ocelot *ocelot = ds->priv;
  1602. return ocelot_port_mirror_add(ocelot, port, mirror->to_local_port,
  1603. ingress, extack);
  1604. }
  1605. static void felix_port_mirror_del(struct dsa_switch *ds, int port,
  1606. struct dsa_mall_mirror_tc_entry *mirror)
  1607. {
  1608. struct ocelot *ocelot = ds->priv;
  1609. ocelot_port_mirror_del(ocelot, port, mirror->ingress);
  1610. }
  1611. static int felix_port_setup_tc(struct dsa_switch *ds, int port,
  1612. enum tc_setup_type type,
  1613. void *type_data)
  1614. {
  1615. struct ocelot *ocelot = ds->priv;
  1616. struct felix *felix = ocelot_to_felix(ocelot);
  1617. if (felix->info->port_setup_tc)
  1618. return felix->info->port_setup_tc(ds, port, type, type_data);
  1619. else
  1620. return -EOPNOTSUPP;
  1621. }
  1622. static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
  1623. u16 pool_index,
  1624. struct devlink_sb_pool_info *pool_info)
  1625. {
  1626. struct ocelot *ocelot = ds->priv;
  1627. return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
  1628. }
  1629. static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
  1630. u16 pool_index, u32 size,
  1631. enum devlink_sb_threshold_type threshold_type,
  1632. struct netlink_ext_ack *extack)
  1633. {
  1634. struct ocelot *ocelot = ds->priv;
  1635. return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
  1636. threshold_type, extack);
  1637. }
  1638. static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
  1639. unsigned int sb_index, u16 pool_index,
  1640. u32 *p_threshold)
  1641. {
  1642. struct ocelot *ocelot = ds->priv;
  1643. return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
  1644. p_threshold);
  1645. }
  1646. static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
  1647. unsigned int sb_index, u16 pool_index,
  1648. u32 threshold, struct netlink_ext_ack *extack)
  1649. {
  1650. struct ocelot *ocelot = ds->priv;
  1651. return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
  1652. threshold, extack);
  1653. }
  1654. static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
  1655. unsigned int sb_index, u16 tc_index,
  1656. enum devlink_sb_pool_type pool_type,
  1657. u16 *p_pool_index, u32 *p_threshold)
  1658. {
  1659. struct ocelot *ocelot = ds->priv;
  1660. return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
  1661. pool_type, p_pool_index,
  1662. p_threshold);
  1663. }
  1664. static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
  1665. unsigned int sb_index, u16 tc_index,
  1666. enum devlink_sb_pool_type pool_type,
  1667. u16 pool_index, u32 threshold,
  1668. struct netlink_ext_ack *extack)
  1669. {
  1670. struct ocelot *ocelot = ds->priv;
  1671. return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
  1672. pool_type, pool_index, threshold,
  1673. extack);
  1674. }
  1675. static int felix_sb_occ_snapshot(struct dsa_switch *ds,
  1676. unsigned int sb_index)
  1677. {
  1678. struct ocelot *ocelot = ds->priv;
  1679. return ocelot_sb_occ_snapshot(ocelot, sb_index);
  1680. }
  1681. static int felix_sb_occ_max_clear(struct dsa_switch *ds,
  1682. unsigned int sb_index)
  1683. {
  1684. struct ocelot *ocelot = ds->priv;
  1685. return ocelot_sb_occ_max_clear(ocelot, sb_index);
  1686. }
  1687. static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
  1688. unsigned int sb_index, u16 pool_index,
  1689. u32 *p_cur, u32 *p_max)
  1690. {
  1691. struct ocelot *ocelot = ds->priv;
  1692. return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
  1693. p_cur, p_max);
  1694. }
  1695. static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
  1696. unsigned int sb_index, u16 tc_index,
  1697. enum devlink_sb_pool_type pool_type,
  1698. u32 *p_cur, u32 *p_max)
  1699. {
  1700. struct ocelot *ocelot = ds->priv;
  1701. return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
  1702. pool_type, p_cur, p_max);
  1703. }
  1704. static int felix_mrp_add(struct dsa_switch *ds, int port,
  1705. const struct switchdev_obj_mrp *mrp)
  1706. {
  1707. struct ocelot *ocelot = ds->priv;
  1708. return ocelot_mrp_add(ocelot, port, mrp);
  1709. }
  1710. static int felix_mrp_del(struct dsa_switch *ds, int port,
  1711. const struct switchdev_obj_mrp *mrp)
  1712. {
  1713. struct ocelot *ocelot = ds->priv;
  1714. return ocelot_mrp_add(ocelot, port, mrp);
  1715. }
  1716. static int
  1717. felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
  1718. const struct switchdev_obj_ring_role_mrp *mrp)
  1719. {
  1720. struct ocelot *ocelot = ds->priv;
  1721. return ocelot_mrp_add_ring_role(ocelot, port, mrp);
  1722. }
  1723. static int
  1724. felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
  1725. const struct switchdev_obj_ring_role_mrp *mrp)
  1726. {
  1727. struct ocelot *ocelot = ds->priv;
  1728. return ocelot_mrp_del_ring_role(ocelot, port, mrp);
  1729. }
  1730. static int felix_port_get_default_prio(struct dsa_switch *ds, int port)
  1731. {
  1732. struct ocelot *ocelot = ds->priv;
  1733. return ocelot_port_get_default_prio(ocelot, port);
  1734. }
  1735. static int felix_port_set_default_prio(struct dsa_switch *ds, int port,
  1736. u8 prio)
  1737. {
  1738. struct ocelot *ocelot = ds->priv;
  1739. return ocelot_port_set_default_prio(ocelot, port, prio);
  1740. }
  1741. static int felix_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)
  1742. {
  1743. struct ocelot *ocelot = ds->priv;
  1744. return ocelot_port_get_dscp_prio(ocelot, port, dscp);
  1745. }
  1746. static int felix_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
  1747. u8 prio)
  1748. {
  1749. struct ocelot *ocelot = ds->priv;
  1750. return ocelot_port_add_dscp_prio(ocelot, port, dscp, prio);
  1751. }
  1752. static int felix_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,
  1753. u8 prio)
  1754. {
  1755. struct ocelot *ocelot = ds->priv;
  1756. return ocelot_port_del_dscp_prio(ocelot, port, dscp, prio);
  1757. }
  1758. static int felix_get_mm(struct dsa_switch *ds, int port,
  1759. struct ethtool_mm_state *state)
  1760. {
  1761. struct ocelot *ocelot = ds->priv;
  1762. return ocelot_port_get_mm(ocelot, port, state);
  1763. }
  1764. static int felix_set_mm(struct dsa_switch *ds, int port,
  1765. struct ethtool_mm_cfg *cfg,
  1766. struct netlink_ext_ack *extack)
  1767. {
  1768. struct ocelot *ocelot = ds->priv;
  1769. return ocelot_port_set_mm(ocelot, port, cfg, extack);
  1770. }
  1771. static void felix_get_mm_stats(struct dsa_switch *ds, int port,
  1772. struct ethtool_mm_stats *stats)
  1773. {
  1774. struct ocelot *ocelot = ds->priv;
  1775. ocelot_port_get_mm_stats(ocelot, port, stats);
  1776. }
  1777. static const struct phylink_mac_ops felix_phylink_mac_ops = {
  1778. .mac_select_pcs = felix_phylink_mac_select_pcs,
  1779. .mac_config = felix_phylink_mac_config,
  1780. .mac_link_down = felix_phylink_mac_link_down,
  1781. .mac_link_up = felix_phylink_mac_link_up,
  1782. };
  1783. static const struct dsa_switch_ops felix_switch_ops = {
  1784. .get_tag_protocol = felix_get_tag_protocol,
  1785. .change_tag_protocol = felix_change_tag_protocol,
  1786. .connect_tag_protocol = felix_connect_tag_protocol,
  1787. .setup = felix_setup,
  1788. .teardown = felix_teardown,
  1789. .set_ageing_time = felix_set_ageing_time,
  1790. .get_mm = felix_get_mm,
  1791. .set_mm = felix_set_mm,
  1792. .get_mm_stats = felix_get_mm_stats,
  1793. .get_stats64 = felix_get_stats64,
  1794. .get_pause_stats = felix_get_pause_stats,
  1795. .get_rmon_stats = felix_get_rmon_stats,
  1796. .get_eth_ctrl_stats = felix_get_eth_ctrl_stats,
  1797. .get_eth_mac_stats = felix_get_eth_mac_stats,
  1798. .get_eth_phy_stats = felix_get_eth_phy_stats,
  1799. .get_strings = felix_get_strings,
  1800. .get_ethtool_stats = felix_get_ethtool_stats,
  1801. .get_sset_count = felix_get_sset_count,
  1802. .get_ts_info = felix_get_ts_info,
  1803. .phylink_get_caps = felix_phylink_get_caps,
  1804. .port_enable = felix_port_enable,
  1805. .port_fast_age = felix_port_fast_age,
  1806. .port_fdb_dump = felix_fdb_dump,
  1807. .port_fdb_add = felix_fdb_add,
  1808. .port_fdb_del = felix_fdb_del,
  1809. .lag_fdb_add = felix_lag_fdb_add,
  1810. .lag_fdb_del = felix_lag_fdb_del,
  1811. .port_mdb_add = felix_mdb_add,
  1812. .port_mdb_del = felix_mdb_del,
  1813. .port_pre_bridge_flags = felix_pre_bridge_flags,
  1814. .port_bridge_flags = felix_bridge_flags,
  1815. .port_bridge_join = felix_bridge_join,
  1816. .port_bridge_leave = felix_bridge_leave,
  1817. .port_lag_join = felix_lag_join,
  1818. .port_lag_leave = felix_lag_leave,
  1819. .port_lag_change = felix_lag_change,
  1820. .port_stp_state_set = felix_bridge_stp_state_set,
  1821. .port_vlan_filtering = felix_vlan_filtering,
  1822. .port_vlan_add = felix_vlan_add,
  1823. .port_vlan_del = felix_vlan_del,
  1824. .port_hwtstamp_get = felix_hwtstamp_get,
  1825. .port_hwtstamp_set = felix_hwtstamp_set,
  1826. .port_rxtstamp = felix_rxtstamp,
  1827. .port_txtstamp = felix_txtstamp,
  1828. .port_change_mtu = felix_change_mtu,
  1829. .port_max_mtu = felix_get_max_mtu,
  1830. .port_policer_add = felix_port_policer_add,
  1831. .port_policer_del = felix_port_policer_del,
  1832. .port_mirror_add = felix_port_mirror_add,
  1833. .port_mirror_del = felix_port_mirror_del,
  1834. .cls_flower_add = felix_cls_flower_add,
  1835. .cls_flower_del = felix_cls_flower_del,
  1836. .cls_flower_stats = felix_cls_flower_stats,
  1837. .port_setup_tc = felix_port_setup_tc,
  1838. .devlink_sb_pool_get = felix_sb_pool_get,
  1839. .devlink_sb_pool_set = felix_sb_pool_set,
  1840. .devlink_sb_port_pool_get = felix_sb_port_pool_get,
  1841. .devlink_sb_port_pool_set = felix_sb_port_pool_set,
  1842. .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get,
  1843. .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set,
  1844. .devlink_sb_occ_snapshot = felix_sb_occ_snapshot,
  1845. .devlink_sb_occ_max_clear = felix_sb_occ_max_clear,
  1846. .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get,
  1847. .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
  1848. .port_mrp_add = felix_mrp_add,
  1849. .port_mrp_del = felix_mrp_del,
  1850. .port_mrp_add_ring_role = felix_mrp_add_ring_role,
  1851. .port_mrp_del_ring_role = felix_mrp_del_ring_role,
  1852. .tag_8021q_vlan_add = felix_tag_8021q_vlan_add,
  1853. .tag_8021q_vlan_del = felix_tag_8021q_vlan_del,
  1854. .port_get_default_prio = felix_port_get_default_prio,
  1855. .port_set_default_prio = felix_port_set_default_prio,
  1856. .port_get_dscp_prio = felix_port_get_dscp_prio,
  1857. .port_add_dscp_prio = felix_port_add_dscp_prio,
  1858. .port_del_dscp_prio = felix_port_del_dscp_prio,
  1859. .port_set_host_flood = felix_port_set_host_flood,
  1860. .port_change_conduit = felix_port_change_conduit,
  1861. };
  1862. int felix_register_switch(struct device *dev, resource_size_t switch_base,
  1863. int num_flooding_pgids, bool ptp,
  1864. bool mm_supported,
  1865. enum dsa_tag_protocol init_tag_proto,
  1866. const struct felix_info *info)
  1867. {
  1868. struct dsa_switch *ds;
  1869. struct ocelot *ocelot;
  1870. struct felix *felix;
  1871. int err;
  1872. felix = devm_kzalloc(dev, sizeof(*felix), GFP_KERNEL);
  1873. if (!felix)
  1874. return -ENOMEM;
  1875. ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
  1876. if (!ds)
  1877. return -ENOMEM;
  1878. dev_set_drvdata(dev, felix);
  1879. ocelot = &felix->ocelot;
  1880. ocelot->dev = dev;
  1881. ocelot->num_flooding_pgids = num_flooding_pgids;
  1882. ocelot->ptp = ptp;
  1883. ocelot->mm_supported = mm_supported;
  1884. felix->info = info;
  1885. felix->switch_base = switch_base;
  1886. felix->ds = ds;
  1887. felix->tag_proto = init_tag_proto;
  1888. ds->dev = dev;
  1889. ds->num_ports = info->num_ports;
  1890. ds->num_tx_queues = OCELOT_NUM_TC;
  1891. ds->ops = &felix_switch_ops;
  1892. ds->phylink_mac_ops = &felix_phylink_mac_ops;
  1893. ds->priv = ocelot;
  1894. err = dsa_register_switch(ds);
  1895. if (err)
  1896. dev_err_probe(dev, err, "Failed to register DSA switch\n");
  1897. return err;
  1898. }
  1899. EXPORT_SYMBOL_GPL(felix_register_switch);
  1900. struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
  1901. {
  1902. struct felix *felix = ocelot_to_felix(ocelot);
  1903. struct dsa_switch *ds = felix->ds;
  1904. if (!dsa_is_user_port(ds, port))
  1905. return NULL;
  1906. return dsa_to_port(ds, port)->user;
  1907. }
  1908. EXPORT_SYMBOL_GPL(felix_port_to_netdev);
  1909. int felix_netdev_to_port(struct net_device *dev)
  1910. {
  1911. struct dsa_port *dp;
  1912. dp = dsa_port_from_netdev(dev);
  1913. if (IS_ERR(dp))
  1914. return -EINVAL;
  1915. return dp->index;
  1916. }
  1917. EXPORT_SYMBOL_GPL(felix_netdev_to_port);
  1918. MODULE_DESCRIPTION("Felix DSA library");
  1919. MODULE_LICENSE("GPL");